| commit | fcde2bf0b9a0581db9fe5382e0c90f526c011114 | |
| author | Vladimir Zapolskiy <vz@mleia.com> | |
| Wed, 19 Oct 2011 19:39:12 +0000 (19 22:39 +0300) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Wed, 19 Oct 2011 20:42:49 +0000 (19 13:42 -0700) | ||
| tree | 58569442130b97413eb27b98f35e6d374a3c4800 | treesnapshot (tar.gz zip) |
| parent | 6b7200fe0a59d7bda59e9e028b235b25a137dff9 | commitdiff |
staging: tidspbridge: MMU2 registers are limited to 32-bit data access
According to OMAP3 TRM access to MMU registers shall be strictly 32-bit
aligned.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
According to OMAP3 TRM access to MMU registers shall be strictly 32-bit
aligned.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| drivers/staging/tidspbridge/hw/hw_mmu.c | diffblobblamehistory |