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(parent: 66a60bf) | patch
add: one more ZPU reference design for zealot
commit73c11e7ba18d3415d61d03c4a1da588fe77e0466
authorBert Lange <b.lange@hzdr.de>
Sat, 22 Oct 2011 06:49:57 +0000 (22 08:49 +0200)
committerBert Lange <b.lange@hzdr.de>
Sat, 22 Oct 2011 06:49:57 +0000 (22 08:49 +0200)
treeccab850f55ade9690a4724ff888aa9687659d31ctree | snapshot (tar.gz zip)
parent66a60bf34fd1960bb3c8f87a784dd2e6d27e2213commit | diff
add: one more ZPU reference design for zealot
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/clean_up.sh [new file with mode: 0755] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/simulation.sh [new file with mode: 0755] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/simulation_config/run.do [new file with mode: 0644] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/simulation_config/wave.do [new file with mode: 0644] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/synthesis.sh [new file with mode: 0755] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/synthesis_config/avnet-eval-xc5vfx30t.ucf [new file with mode: 0644] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/synthesis_config/top.prj [new file with mode: 0644] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/synthesis_config/top.ut [new file with mode: 0644] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/synthesis_config/top.xst [new file with mode: 0644] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/top.vhd [new file with mode: 0644] blob
zpu/hdl/zealot/fpga/avnet-eval-xc5vfx30t/top_tb.vhd [new file with mode: 0644] blob
Zylin ZPU - the worlds smallest 32 bit CPU with GCC support