arch/i386-all/include/asm/cpu.h

   1 #ifndef ASM_I386_CPU_H
   2 #define ASM_I386_CPU_H
   3
   4 /*
   5     Copyright © 1995-2012, The AROS Development Team. All rights reserved.
   6     $Id$
   7
   8     Desc: assembler-level specific definitions for x86 CPU
   9     Lang: english
  10 */
  11
  12 #include <inttypes.h>
  13
  14 /* This file is very very incomplete :) */
  15
  16 #define HALT asm volatile("hlt")
  17
  18 /* Table descriptor used for lgdt and lidt commands */
  19 struct table_desc
  20 {
  21     unsigned short size;
  22     unsigned long  base;
  23 } __attribute__((packed));
  24
  25 /* Segment descriptor in the GDT */
  26 struct segment_desc
  27 {
  28     uint16_t    limit_low;
  29     uint16_t    base_low;
  30     uint8_t     base_mid;
  31     unsigned    type:5, dpl:2, p:1;
  32     unsigned    limit_high:4, avl:1, l:1, d:1, g:1;
  33     uint8_t     base_high:8;
  34 } __attribute__((packed));
  35
  36 /*
  37  * TaskStateStructure, defined only in matter of making life (setup)
  38  * more human-readable
  39  */
  40 struct tss
  41 {
  42     unsigned int   link,               /* link to previous task         */
  43                    ssp,                /* Supervisor Stack Pointer      */
  44                    ssp_seg,            /* SSP descriptor                */
  45                    t0,t1,              /* Stack for CPL1 code           */
  46                    t2,t3,              /* Stack for CPL2 code           */
  47                    cr3,                /* used in paging                */
  48                    eip,                /* Instruction pointer           */
  49                    eflags,             /* Flags for given task          */
  50                    r0,r1,r2,r3,        /* 8 general purpouse registers  */
  51                    r4,r5,r6,r7,
  52                    es,cs,ss,ds,fs,gs,  /* segment descriptors           */
  53                    ldt;                /* LocalDescriptorTable          */
  54     unsigned short trap,iomap;         /* trap flag and iomap pointer   */
  55 };
  56
  57 #define rdcr(reg) \
  58     ({ long val; asm volatile("mov %%" #reg ",%0":"=r"(val)); val; })
  59
  60 #define wrcr(reg, val) \
  61     do { asm volatile("mov %0,%%" #reg::"r"(val)); } while(0)
  62
  63 static inline void __attribute__((always_inline)) rdmsr(uint32_t msr_no, uint32_t *ret_lo, uint32_t *ret_hi)
  64 {
  65     uint32_t ret1, ret2;
  66
  67     asm volatile("rdmsr":"=a"(ret1),"=d"(ret2):"c"(msr_no));
  68     *ret_lo=ret1;
  69     *ret_hi=ret2;
  70 }
  71
  72 static inline uint32_t __attribute__((always_inline)) rdmsri(uint32_t msr_no)
  73 {
  74     uint32_t ret;
  75
  76     asm volatile("rdmsr":"=a"(ret):"c"(msr_no));
  77     return ret;
  78 }
  79
  80 #endif