arch/all-mingw32/kernel/cpu_x86_64.h

   1 #ifdef __AROS__
   2
   3 /* This was taken from Mingw32's winnt.h */
   4
   5 /* Context flags */
   6 #define CONTEXT_AMD64           0x100000
   7
   8 #define CONTEXT_CONTROL         (CONTEXT_AMD64 | 0x1L)
   9 #define CONTEXT_INTEGER         (CONTEXT_AMD64 | 0x2L)
  10 #define CONTEXT_SEGMENTS        (CONTEXT_AMD64 | 0x4L)
  11 #define CONTEXT_FLOATING_POINT  (CONTEXT_AMD64 | 0x8L)
  12 #define CONTEXT_DEBUG_REGISTERS (CONTEXT_AMD64 | 0x10L)
  13 #define CONTEXT_FULL            (CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_FLOATING_POINT)
  14 #define CONTEXT_ALL             (CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_SEGMENTS | CONTEXT_FLOATING_POINT | CONTEXT_DEBUG_REGISTERS)
  15
  16 typedef struct _M128A
  17 {
  18     UQUAD Low;
  19     QUAD  High;
  20 } M128A;
  21
  22 typedef struct _XMM_SAVE_AREA32
  23 {
  24     UWORD ControlWord;
  25     UWORD StatusWord;
  26     UBYTE TagWord;
  27     UBYTE Reserved1;
  28     UWORD ErrorOpcode;
  29     ULONG ErrorOffset;
  30     UWORD ErrorSelector;
  31     UWORD Reserved2;
  32     ULONG DataOffset;
  33     UWORD DataSelector;
  34     UWORD Reserved3;
  35     ULONG MxCsr;
  36     ULONG MxCsr_Mask;
  37     M128A FloatRegisters[8];
  38     M128A XmmRegisters[16];
  39     UBYTE Reserved4[96];
  40 } XMM_SAVE_AREA32;
  41
  42 typedef struct _CONTEXT
  43 {
  44     IPTR  P1Home;
  45     IPTR  P2Home;
  46     IPTR  P3Home;
  47     IPTR  P4Home;
  48     IPTR  P5Home;
  49     IPTR  P6Home;
  50     ULONG ContextFlags;
  51     ULONG MxCsr;
  52     UWORD SegCs;
  53     UWORD SegDs;
  54     UWORD SegEs;
  55     UWORD SegFs;
  56     UWORD SegGs;
  57     UWORD SegSs;
  58     ULONG EFlags;
  59     IPTR  Dr0;
  60     IPTR  Dr1;
  61     IPTR  Dr2;
  62     IPTR  Dr3;
  63     IPTR  Dr6;
  64     IPTR  Dr7;
  65     IPTR  Rax;
  66     IPTR  Rcx;
  67     IPTR  Rdx;
  68     IPTR  Rbx;
  69     IPTR  Rsp;
  70     IPTR  Rbp;
  71     IPTR  Rsi;
  72     IPTR  Rdi;
  73     IPTR  R8;
  74     IPTR  R9;
  75     IPTR  R10;
  76     IPTR  R11;
  77     IPTR  R12;
  78     IPTR  R13;
  79     IPTR  R14;
  80     IPTR  R15;
  81     IPTR  Rip;
  82     union {
  83         XMM_SAVE_AREA32 FltSave;
  84         struct {
  85             M128A Header[2];
  86             M128A Legacy[8];
  87             M128A Xmm0;
  88             M128A Xmm1;
  89             M128A Xmm2;
  90             M128A Xmm3;
  91             M128A Xmm4;
  92             M128A Xmm5;
  93             M128A Xmm6;
  94             M128A Xmm7;
  95             M128A Xmm8;
  96             M128A Xmm9;
  97             M128A Xmm10;
  98             M128A Xmm11;
  99             M128A Xmm12;
 100             M128A Xmm13;
 101             M128A Xmm14;
 102             M128A Xmm15;
 103         };
 104     };
 105     M128A VectorRegister[26];
 106     IPTR  VectorControl;
 107     IPTR  DebugControl;
 108     IPTR  LastBranchToRip;
 109     IPTR  LastBranchFromRip;
 110     IPTR  LastExceptionToRip;
 111     IPTR  LastExceptionFromRip;
 112 } CONTEXT;
 113
 114 struct VectorContext
 115 {
 116     M128A VectorRegister[26];
 117     IPTR  VectorControl;
 118     IPTR  DebugControl;
 119     IPTR  LastBranchToRip;
 120     IPTR  LastBranchFromRip;
 121     IPTR  LastExceptionToRip;
 122     IPTR  LastExceptionFromRip;
 123 };
 124
 125 /* Complete context frame, with Windows private data */
 126 struct AROSCPUContext
 127 {
 128     struct ExceptionContext regs; /* Public portion             */
 129     IPTR  PHome[6];               /* Some Windows-specific data */
 130     struct VectorContext vec;
 131     ULONG LastError;              /* LastError code             */
 132 };
 133
 134 /*
 135  * Common part of SAVEREGS and TRAP_SAVEREGS.
 136  * Saves CPU registers from CONTEXT in struct ExceptionContext.
 137  */
 138 #define SAVE_CPU(regs, ctx)                     \
 139     ctx.Flags = 0;                              \
 140     ctx.rax = regs->Rax;                        \
 141     ctx.rbx = regs->Rbx;                        \
 142     ctx.rcx = regs->Rcx;                        \
 143     ctx.rdx = regs->Rdx;                        \
 144     ctx.rsi = regs->Rsi;                        \
 145     ctx.rdi = regs->Rdi;                        \
 146     ctx.r8  = regs->R8;                         \
 147     ctx.r9  = regs->R9;                         \
 148     ctx.r10 = regs->R10;                        \
 149     ctx.r11 = regs->R11;                        \
 150     ctx.r12 = regs->R12;                        \
 151     ctx.r13 = regs->R13;                        \
 152     ctx.r14 = regs->R14;                        \
 153     ctx.r15 = regs->R15;                        \
 154     ctx.rbp = regs->Rbp;                        \
 155     ctx.rip = regs->Rip;                        \
 156     ctx.rflags = regs->EFlags;                  \
 157     ctx.rsp = regs->Rsp;                        \
 158     if (regs->ContextFlags & CONTEXT_SEGMENTS)  \
 159     {                                           \
 160         ctx.Flags |= ECF_SEGMENTS;              \
 161         ctx.ds = regs->SegDs;                   \
 162         ctx.es = regs->SegEs;                   \
 163         ctx.fs = regs->SegFs;                   \
 164         ctx.gs = regs->SegGs;                   \
 165         ctx.cs = regs->SegCs;                   \
 166         ctx.ss = regs->SegSs;                   \
 167     }
 168
 169 /*
 170  * Restore CPU registers.
 171  * Does not restore segment registers because they are of private use
 172  * by Windows. We can't modify them.
 173  */
 174 #define RESTORE_CPU(regs, ctx)                                  \
 175     regs->ContextFlags = CONTEXT_CONTROL|CONTEXT_INTEGER;       \
 176     regs->Rax = ctx.rax;                                        \
 177     regs->Rbx = ctx.rbx;                                        \
 178     regs->Rcx = ctx.rcx;                                        \
 179     regs->Rdx = ctx.rdx;                                        \
 180     regs->Rsi = ctx.rsi;                                        \
 181     regs->Rdi = ctx.rdi;                                        \
 182     regs->R8  = ctx.r8;                                         \
 183     regs->R9  = ctx.r9;                                         \
 184     regs->R10 = ctx.r10;                                        \
 185     regs->R11 = ctx.r11;                                        \
 186     regs->R12 = ctx.r12;                                        \
 187     regs->R13 = ctx.r13;                                        \
 188     regs->R14 = ctx.r14;                                        \
 189     regs->R15 = ctx.r15;                                        \
 190     regs->Rbp = ctx.rbp;                                        \
 191     regs->Rip = ctx.rip;                                        \
 192     regs->EFlags = ctx.rflags;                                  \
 193     regs->Rsp = ctx.rsp;
 194
 195 /*
 196  * Save the whole set of registers in the allocated context space.
 197  * Also saves FPU and SSE, if available.
 198  */
 199 #define SAVEREGS(regs, ctx)                                                             \
 200     SAVE_CPU(regs, ctx->regs);                                                          \
 201     if (regs->ContextFlags & CONTEXT_FLOATING_POINT)                                    \
 202     {                                                                                   \
 203         ctx->regs.Flags |= ECF_FPX;                                                     \
 204         CopyMemQuick(&regs->FltSave, ctx->regs.FXData, sizeof(XMM_SAVE_AREA32));        \
 205     }                                                                                   \
 206     CopyMemQuick(&regs->P1Home, ctx->PHome, 6 * sizeof(IPTR));                          \
 207     CopyMemQuick(regs->VectorRegister, &ctx->vec, sizeof(struct VectorContext));
 208
 209 /*
 210  * Restore complete set of registers.
 211  * Restores SSE only if the corresponding flag is set in struct ExceptionContext.
 212  */
 213 #define RESTOREREGS(regs, ctx)                                                          \
 214     RESTORE_CPU(regs, ctx->regs);                                                       \
 215     if (ctx->regs.Flags & ECF_FPX)                                                      \
 216     {                                                                                   \
 217         regs->ContextFlags |= CONTEXT_FLOATING_POINT;                                   \
 218         CopyMemQuick(ctx->regs.FXData, &regs->FltSave, sizeof(XMM_SAVE_AREA32));        \
 219         regs->MxCsr = regs->FltSave.MxCsr;                                              \
 220     }                                                                                   \
 221     CopyMemQuick(ctx->PHome, &regs->P1Home, 6 * sizeof(IPTR));                          \
 222     CopyMemQuick(&ctx->vec, regs->VectorRegister, sizeof(struct VectorContext));
 223
 224 /*
 225  * Similar to SAVEREGS and RESTOREREGS, but actually copies only public CPU part.
 226  * SSE frame is specified by reference (frames format in host and AROS match).
 227  * This is for use within trap handling code.
 228  */
 229 #define TRAP_SAVEREGS(src, dest)                        \
 230     SAVE_CPU(src, dest)                                 \
 231     if (src->ContextFlags & CONTEXT_FLOATING_POINT)     \
 232     {                                                   \
 233         dest.Flags |= ECF_FPX;                          \
 234         dest.FXData = &src->FltSave;                    \
 235     }
 236
 237 #define TRAP_RESTOREREGS(dest, src)                     \
 238     RESTORE_CPU(dest, src);                             \
 239     if (src.Flags & ECF_FPX)                            \
 240     {                                                   \
 241         dest->ContextFlags |= CONTEXT_FLOATING_POINT;   \
 242         dest->MxCsr = dest->FltSave.MxCsr;              \
 243     }
 244
 245 /*
 246  * Realign and copy FPU portion from src to dest. It is supposed
 247  * that common part is already copied.
 248  */
 249 #define COPY_FPU(src, dest)                                                             \
 250     if ((src)->Flags & ECF_FPX)                                                         \
 251     {                                                                                   \
 252         IPTR fpdata = (IPTR)(dest) + sizeof(struct AROSCPUContext);                     \
 253         fpdata = (fpdata + 15) & ~15;                                                   \
 254         (dest)->FXData = (struct FPXContext *)fpdata;                                   \
 255         CopyMemQuick((src)->FXData, (dest)->FXData, sizeof(struct FPXContext));         \
 256     }                                                                                   \
 257     else                                                                                \
 258         (dest)->FXData = NULL;
 259
 260 #define GET_SP(ctx) (void *)ctx->regs.rsp
 261
 262 #define EXCEPTIONS_COUNT 18
 263
 264 #define PRINT_CPUCONTEXT(ctx) \
 265         bug ("    ContextFlags: 0x%08lX\n" \
 266                  "    RSP=%016lx  RBP=%016lx  RIP=%016lx\n" \
 267                  "    RAX=%016lx  RBX=%016lx  RCX=%016lx  RDX=%016lx\n" \
 268                  "    R08=%016lx  R09=%016lx  R10=%016lx  R11=%016lx\n" \
 269                  "    R12=%016lx  R13=%016lx  R14=%016lx  R15=%016lx\n" \
 270                  "    RDI=%016lx  RSI=%016lx  EFLAGS=%08lx\n" \
 271             , (ctx)->ContextFlags \
 272             , (ctx)->Rsp, (ctx)->Rbp, (ctx)->Rip \
 273             , (ctx)->Rax, (ctx)->Rbx, (ctx)->Rcx, (ctx)->Rdx \
 274             , (ctx)->R8 , (ctx)->R9 , (ctx)->R10, (ctx)->R11 \
 275             , (ctx)->R12, (ctx)->R13, (ctx)->R14, (ctx)->R15 \
 276             , (ctx)->Rdi, (ctx)->Rsi, (ctx)->EFlags \
 277       );
 278
 279 #else /* __AROS__ */
 280
 281 #define PRINT_CPUCONTEXT(ctx) \
 282         printf("    ContextFlags: 0x%08lX\n" \
 283                  "    RSP=%016I64x  RBP=%016I64x  RIP=%016I64x\n" \
 284                  "    RAX=%016I64x  RBX=%016I64x  RCX=%016I64x  RDX=%016I64x\n" \
 285                  "    R08=%016I64x  R09=%016I64x  R10=%016I64x  R11=%016I64x\n" \
 286                  "    R12=%016I64x  R13=%016I64x  R14=%016I64x  R15=%016I64x\n" \
 287                  "    RDI=%016I64x  RSI=%016I64x  EFLAGS=%08lx\n" \
 288             , (ctx)->ContextFlags \
 289             , (ctx)->Rsp, (ctx)->Rbp, (ctx)->Rip \
 290             , (ctx)->Rax, (ctx)->Rbx, (ctx)->Rcx, (ctx)->Rdx \
 291             , (ctx)->R8 , (ctx)->R9 , (ctx)->R10, (ctx)->R11 \
 292             , (ctx)->R12, (ctx)->R13, (ctx)->R14, (ctx)->R15 \
 293             , (ctx)->Rdi, (ctx)->Rsi, (ctx)->EFlags \
 294       );
 295
 296 #endif /* __AROS__ */
 297
 298 #define CONTEXT_INIT_FLAGS(ctx) (ctx)->ContextFlags = CONTEXT_ALL
 299
 300 #define PC(regs) regs->Rip
 301 #define R0(regs) regs->Rax