2 Copyright � 2013-2015, The AROS Development Team. All rights reserved.
5 Desc: VideoCore mailbox support routines
9 #include <hardware/bcm2708.h>
13 #include <hardware/videocore.h>
16 #define ARM_PERIIOBASE (__arm_periiobase)
17 extern uint32_t __arm_periiobase
;
19 volatile unsigned int *vcmb_read(void *mb
, unsigned int chan
)
21 unsigned int try = 0x20000000;
24 if (chan
<= VCMB_CHAN_MAX
)
28 while ((*((volatile unsigned int *)(mb
+ VCMB_STATUS
)) & VCMB_STATUS_READREADY
) != 0)
30 /* Data synchronization barrier */
31 asm volatile ("mcr p15, 0, %[r], c7, c10, 4" : : [r
] "r" (0) );
39 asm volatile ("mcr p15, #0, %[r], c7, c10, #5" : : [r
] "r" (0) );
41 msg
= *((volatile unsigned int *)(mb
+ VCMB_READ
));
43 asm volatile ("mcr p15, #0, %[r], c7, c10, #5" : : [r
] "r" (0) );
45 if ((msg
& VCMB_CHAN_MASK
) == chan
)
46 return (volatile unsigned int *)(msg
& ~VCMB_CHAN_MASK
);
49 return (volatile unsigned int *)-1;
52 void vcmb_write(void *mb
, unsigned int chan
, void *msg
)
54 if ((((unsigned int)msg
& VCMB_CHAN_MASK
) == 0) && (chan
<= VCMB_CHAN_MAX
))
56 while ((*((volatile unsigned int *)(mb
+ VCMB_STATUS
)) & VCMB_STATUS_WRITEREADY
) != 0)
58 /* Data synchronization barrier */
59 asm volatile ("mcr p15, 0, %[r], c7, c10, 4" : : [r
] "r" (0) );
62 asm volatile ("mcr p15, #0, %[r], c7, c10, #5" : : [r
] "r" (0) );
64 *((volatile unsigned int *)(mb
+ VCMB_WRITE
)) = ((unsigned int)msg
| chan
);