workbench/hidds/agp/i7505bridgedeviceclass.c

   1 /*
   2     Copyright 2010, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #include <hidd/agp.h>
   7 #include <proto/oop.h>
   8 #include <proto/exec.h>
   9 #define DEBUG 0
  10 #include <aros/debug.h>
  11
  12 #include "agp_private.h"
  13
  14 #undef HiddAGPBridgeDeviceAttrBase
  15 #define HiddAGPBridgeDeviceAttrBase (SD(cl)->hiddAGPBridgeDeviceAB)
  16
  17 #define AGP_INTEL_NBXCFG        0x50
  18 #define AGP_INTEL_CTRL          0xb0
  19 #define AGP_INTEL_APER_SIZE     0xb4
  20 #define AGP_INTEL_GATT_BASE     0xb8
  21
  22 #define AGP_INTEL_I7505_MCHCFG  0x50
  23
  24 #define IS_7505_BRIDGE(x)               \
  25 (                                       \
  26     (x == 0x2550) || /* 7505_0 */       \
  27     (x == 0x255d)    /* 7205_0 */       \
  28 )                                       \
  29
  30 /* PUBLIC METHODS */
  31 OOP_Object * METHOD(i7505BridgeDevice, Root, New)
  32 {
  33     o = (OOP_Object *)OOP_DoSuperMethod(cl, o, (OOP_Msg) msg);
  34
  35     return o;
  36 }
  37
  38
  39 BOOL METHOD(i7505BridgeDevice, Hidd_AGPBridgeDevice, Initialize)
  40 {
  41     struct HIDDGenericBridgeDeviceData * gbddata =
  42         OOP_INST_DATA(SD(cl)->genericBridgeDeviceClass, o);
  43
  44     struct pHidd_AGPBridgeDevice_ScanAndDetectDevices saddmsg = {
  45     mID: OOP_GetMethodID(IID_Hidd_AGPBridgeDevice, moHidd_AGPBridgeDevice_ScanAndDetectDevices)
  46     };
  47
  48     D(ULONG major, minor;)
  49     OOP_Object * bridgedev = NULL;
  50     UBYTE bridgeagpcap = 0;
  51     UBYTE aperture_size_value = 0;
  52     UWORD mchcfg = 0;
  53
  54     /* Scan for bridge and agp devices */
  55     if (!OOP_DoMethod(o, (OOP_Msg)&saddmsg))
  56         return FALSE;
  57
  58     /* Check if bridge is a supported Intel bridge */
  59     if (gbddata->bridge->VendorID != 0x8086)
  60         return FALSE;
  61     if (!IS_7505_BRIDGE(gbddata->bridge->ProductID))
  62         return FALSE;
  63
  64     bridgedev = gbddata->bridge->PciDevice;
  65     bridgeagpcap = gbddata->bridge->AgpCapability;
  66
  67     /* Getting version info */
  68     D(major = (readconfigbyte(bridgedev, bridgeagpcap + AGP_VERSION_REG) >> 4) & 0xf);
  69     D(minor = readconfigbyte(bridgedev, bridgeagpcap + AGP_VERSION_REG) & 0xf);
  70
  71     D(bug("[AGP] [Intel 7505] Read config: AGP version %d.%d\n", major, minor));
  72
  73     /* Getting mode */
  74     gbddata->bridgemode = readconfiglong(bridgedev, bridgeagpcap + AGP_STATUS_REG);
  75
  76     D(bug("[AGP] [Intel 7505] Reading mode: 0x%x\n", gbddata->bridgemode));
  77
  78     gbddata->memmask = 0x00000017;
  79
  80
  81     /* Initialize */
  82
  83
  84     /* Getting GART size */
  85     aperture_size_value = readconfigbyte(bridgedev, AGP_INTEL_APER_SIZE);
  86     D(bug("[AGP] [Intel 7505] Reading aperture size value: %x\n", aperture_size_value));
  87
  88     switch(aperture_size_value)
  89     {
  90         case(63): gbddata->bridgeapersize = 4; break;
  91         case(62): gbddata->bridgeapersize = 8; break;
  92         case(60): gbddata->bridgeapersize = 16; break;
  93         case(56): gbddata->bridgeapersize = 32; break;
  94         case(48): gbddata->bridgeapersize = 64; break;
  95         case(32): gbddata->bridgeapersize = 128; break;
  96         case(0): gbddata->bridgeapersize = 256; break;
  97         default: gbddata->bridgeapersize = 0; break;
  98     }
  99
 100     D(bug("[AGP] [Intel 7505] Calculated aperture size: %d MB\n", (ULONG)gbddata->bridgeapersize));
 101
 102     /* Creation of GATT table */
 103     struct pHidd_AGPBridgeDevice_CreateGattTable cgtmsg = {
 104     mID: OOP_GetMethodID(IID_Hidd_AGPBridgeDevice, moHidd_AGPBridgeDevice_CreateGattTable)
 105     };
 106     if (!OOP_DoMethod(o, (OOP_Msg)&cgtmsg))
 107         return FALSE;
 108
 109
 110     /* Getting GART base */
 111     gbddata->bridgeaperbase = (IPTR)readconfiglong(bridgedev, AGP_APER_BASE);
 112     gbddata->bridgeaperbase &= (~0x0fUL) /* PCI_BASE_ADDRESS_MEM_MASK */;
 113     D(bug("[AGP] [Intel 7505] Reading aperture base: 0x%x\n", (ULONG)(IPTR)gbddata->bridgeaperbase));
 114
 115     /* Set GATT pointer */
 116     writeconfiglong(bridgedev, AGP_INTEL_GATT_BASE, (ULONG)(IPTR)gbddata->gatttable);
 117     D(bug("[AGP] [Intel 7505] Set GATT pointer to 0x%x\n", (ULONG)(IPTR)gbddata->gatttable));
 118
 119     /* Control register */
 120     writeconfiglong(bridgedev, AGP_INTEL_CTRL, 0x00000000);
 121
 122     /* MCHCFG*/
 123     mchcfg = readconfigword(bridgedev, AGP_INTEL_I7505_MCHCFG);
 124     writeconfigword(bridgedev, AGP_INTEL_I7505_MCHCFG, mchcfg | (1 << 9));
 125
 126     gbddata->state = STATE_INITIALIZED;
 127
 128     return TRUE;
 129 }
 130