1 void ohciUpdateFrameCounter(struct PCIController
*hc
);
2 void ohciAbortRequest(struct PCIController
*hc
, struct IOUsbHWReq
*ioreq
);
3 BOOL
ohciInit(struct PCIController
*hc
, struct PCIUnit
*hu
);
4 void ohciFree(struct PCIController
*hc
, struct PCIUnit
*hu
);
6 /* /// "ohciAllocED()" */
7 static inline struct OhciED
* ohciAllocED(struct PCIController
*hc
)
9 struct OhciED
*oed
= hc
->hc_OhciEDPool
;
14 KPRINTF(200, ("Out of EDs!\n"));
18 hc
->hc_OhciEDPool
= oed
->oed_Succ
;
23 /* /// "ohciFreeED()" */
24 static inline void ohciFreeED(struct PCIController
*hc
, struct OhciED
*oed
)
26 oed
->oed_HeadPtr
= oed
->oed_TailPtr
; // Protect against ocassional reuse
27 CONSTWRITEMEM32_LE(&oed
->oed_EPCaps
, OECF_SKIP
);
30 oed
->oed_IOReq
= NULL
;
31 oed
->oed_Buffer
= NULL
;
32 oed
->oed_SetupData
= NULL
;
33 oed
->oed_Succ
= hc
->hc_OhciEDPool
;
34 hc
->hc_OhciEDPool
= oed
;
38 /* /// "ohciAllocTD()" */
39 static inline struct OhciTD
* ohciAllocTD(struct PCIController
*hc
)
41 struct OhciTD
*otd
= hc
->hc_OhciTDPool
;
46 KPRINTF(200, ("Out of TDs!\n"));
50 hc
->hc_OhciTDPool
= otd
->otd_Succ
;
55 /* /// "ohciFreeTD()" */
56 static inline void ohciFreeTD(struct PCIController
*hc
, struct OhciTD
*otd
)
58 otd
->otd_NextTD
= 0; // Protect against looped TD list in ocassion of TD reuse ("Rogue TD" state)
62 otd
->otd_Succ
= hc
->hc_OhciTDPool
;
63 hc
->hc_OhciTDPool
= otd
;
67 static inline void ohciDisableED(struct OhciED
*oed
)
72 ctrlstatus
= READMEM32_LE(&oed
->oed_EPCaps
);
73 ctrlstatus
|= OECF_SKIP
;
74 WRITEMEM32_LE(&oed
->oed_EPCaps
, ctrlstatus
);
76 // unlink from schedule
77 oed
->oed_Succ
->oed_Pred
= oed
->oed_Pred
;
78 oed
->oed_Pred
->oed_Succ
= oed
->oed_Succ
;
79 oed
->oed_Pred
->oed_NextED
= oed
->oed_Succ
->oed_Self
;
80 oed
->oed_IOReq
= NULL
;
81 CacheClearE(&oed
->oed_Pred
->oed_EPCaps
, 16, CACRF_ClearD
);
85 static inline void ohciDisableInt(struct PCIController
*hc
, ULONG mask
)
87 WRITEREG32_LE(hc
->hc_RegBase
, OHCI_INTDIS
, mask
);
88 hc
->hc_PCIIntEnMask
&= ~mask
;
91 static inline void ohciEnableInt(struct PCIController
*hc
, ULONG mask
)
93 WRITEREG32_LE(hc
->hc_RegBase
, OHCI_INTSTATUS
, mask
); // Clear potential dangling status
94 hc
->hc_PCIIntEnMask
|= mask
;
95 WRITEREG32_LE(hc
->hc_RegBase
, OHCI_INTEN
, mask
);