rom/usb/pciusbhc/ehci/pciehci.h

   1 /*
   2     Copyright © 2011, The AROS Development Team. All rights reserved
   3     $Id$
   4 */
   5
   6 #ifndef PCIEHCI_H
   7 #define PCIEHCI_H
   8
   9 #include <aros/io.h>
  10 #include <aros/system.h>
  11 #include <aros/libcall.h>
  12 #include <aros/symbolsets.h>
  13
  14 #include <exec/exec.h>
  15
  16 #include <devices/timer.h>
  17 #include <devices/newstyle.h>
  18 #include <devices/usbhardware.h>
  19
  20 #include <hidd/pci.h>
  21
  22 #include <proto/exec.h>
  23 #include <proto/debug.h>
  24 #include <proto/oop.h>
  25 #include <proto/utility.h>
  26
  27 #define PCI_BASE_CLASS_SERIAL   0x0c
  28 #define PCI_SUB_CLASS_USB       0x03
  29 #define PCI_INTERFACE_EHCI      0x20
  30 //#define PCI_INTERFACE_EHCI      0x00  /* Really UHCI, used to check unit node creation. Remove later */
  31
  32 #define RC_OK         0                 /* Reply the iorequest with success */
  33 #define RC_DONTREPLY  -1                /* Magic cookie, don't set error fields & don't reply the ioreq */
  34
  35 #undef HiddAttrBase
  36 #undef HiddPCIDeviceAttrBase
  37
  38 #define HiddAttrBase            (ehd->ehd_hiddattrbase)
  39 #define HiddPCIDeviceAttrBase   (ehd->ehd_hiddpcideviceab)
  40
  41 #define DBL_DEVIO   5
  42 #define DBL_UHWIO   10
  43 #define DEBUG       DBL_DEVIO
  44
  45 #ifdef DEBUG
  46 #define KPRINTF(l, x) do { if ((l) >= DEBUG) \
  47      { KPrintF("%s/%lu: ", __FUNCTION__, __LINE__); KPrintF x;} } while (0)
  48 #define KPRINTF2(l, x) do { if ((l) >= DEBUG) \
  49      { KPrintF x;} } while (0)
  50 #else /* !DEBUG */
  51 #define KPRINTF(l, x) ((void) 0)
  52 #define KPRINTF2(l, x) ((void) 0)
  53 #endif /* DEBUG */
  54
  55 struct EhciTD {
  56     struct EhciTD  *etd_Succ;
  57     ULONG           etd_Unused0;
  58     //struct EhciTD  *etd_Pred;
  59     ULONG           etd_Self;       /* LE PHYSICAL pointer to self */
  60     ULONG           etd_Length;     /* Number of bytes to transfer within this */
  61     ULONG           etd_Unused[4];
  62
  63     /* aligned to 32 bytes */
  64     ULONG           etd_NextTD;     /* LE PHYSICAL pointer to next qTD */
  65     ULONG           etd_AltNextTD;  /* LE PHYSICAL alternate pointer to next qTD on short packet */
  66     ULONG           etd_CtrlStatus; /* LE Control and Status word */
  67     ULONG           etd_BufferPtr[5]; /* LE Buffer Pointers */
  68
  69     ULONG           etd_ExtBufferPtr[5]; /* LE Buffer Pointers (upper 32 bit) */
  70     ULONG           etd_Unused2[3];
  71 };
  72
  73 struct EhciQH {
  74     struct EhciQH  *eqh_Succ;
  75     struct EhciQH  *eqh_Pred;
  76     ULONG           eqh_Self;       /* LE PHYSICAL pointer to self + UHCI_QHSELECT */
  77     struct IOUsbHWReq *eqh_IOReq;   /* IO Request this belongs to */
  78
  79     struct EhciTD  *eqh_FirstTD;    /* First TD */
  80     ULONG           eqh_Actual;     /* Number of bytes for successful completion in this QH */
  81     ULONG           eqh_Unused0;
  82     ULONG           eqh_Unused1;
  83
  84     /* aligned to 32 bytes */
  85     ULONG           eqh_NextQH;     /* LE PHYSICAL horizontal pointer to next QH */
  86     ULONG           eqh_EPCaps;     /* LE Endpoint Capabilities/Characteristics word */
  87     ULONG           eqh_SplitCtrl;  /* LE Split and Int control stuff */
  88     ULONG           eqh_CurrTD;     /* LE PHYSICAL current TD pointer */
  89
  90     /* Transaction working space for host controller */
  91     ULONG           eqh_NextTD;     /* LE PHYSICAL pointer to next qTD */
  92     ULONG           eqh_AltNextTD;  /* LE PHYSICAL alternate pointer to next qTD on short packet */
  93     ULONG           eqh_CtrlStatus; /* LE Control and Status word */
  94     ULONG           eqh_BufferPtr[5]; /* LE Buffer Pointers */
  95
  96     ULONG           eqh_ExtBufferPtr[5]; /* LE Buffer Pointers (upper 32 bit) */
  97     ULONG           eqh_Unused[7];
  98 };
  99
 100
 101 struct ehc_controller {                 /* EHCI Controller Struct (ehc_) */
 102     struct MinNode  ehc_contrnode;
 103
 104     APTR            ehc_unitptr;
 105     APTR            ehc_devicebase;
 106
 107     OOP_Object     *ehc_pcideviceobject;
 108     OOP_Object     *ehc_pcidriverobject;
 109
 110     ULONG           ehc_EhciUsbCmd;
 111
 112     ULONG          *ehc_EhciFrameList;
 113     struct EhciQH  *ehc_EhciQHPool;
 114     struct EhciTD  *ehc_EhciTDPool;
 115
 116     struct EhciQH  *ehc_EhciAsyncQH;
 117     struct EhciQH  *ehc_EhciIntQH[11];
 118     struct EhciQH  *ehc_EhciTermQH;
 119     volatile BOOL   ehc_AsyncAdvanced;
 120     struct EhciQH  *ehc_EhciAsyncFreeQH;
 121     struct EhciTD  *ehc_ShortPktEndTD;
 122
 123     ULONG           ehc_FrameCounter;
 124     struct List     ehc_TDQueue;
 125     struct List     ehc_AbortQueue;
 126     struct List     ehc_PeriodicTDQueue;
 127     struct MinList  ehc_CtrlXFerQueue;
 128     struct MinList  ehc_IntXFerQueue;
 129     struct MinList  ehc_IsoXFerQueue;
 130     struct MinList  ehc_BulkXFerQueue;
 131
 132     volatile APTR   ehc_opregbase;
 133
 134     IPTR            ehc_pcibus, ehc_pcidev, ehc_pcisub, ehc_intline;
 135 };
 136
 137 struct Unitnode {
 138     struct MinNode  ehu_unitnode;;
 139     APTR            ehu_unitptr;
 140 };
 141
 142 struct ehu_unit {                       /* EHCI Unit Structure (ehu_) */
 143     struct Unit     ehu_devunit;
 144     struct Unitnode ehu_unitnode;
 145
 146     ULONG           ehu_unitnumber;
 147
 148     IPTR            ehu_pcibus, ehu_pcidev;
 149
 150     struct MinList  ehu_cntrlist;
 151 };
 152
 153 /* pciehci.device base*/
 154 struct pciehcibase {                    /* EHCI Device Structure (ehd_) */
 155     struct Device   ehd_device;
 156
 157     struct MinList  ehd_unitnodelist;
 158
 159     APTR            ehd_mempool;
 160
 161     OOP_Object     *ehd_pcihidd;
 162     OOP_AttrBase    ehd_hiddattrbase;
 163     OOP_AttrBase    ehd_hiddpcideviceab;
 164 };
 165
 166 #endif /* PCIEHCI_H */