1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
32 #include "pipe/p_compiler.h"
33 #include "pipe/p_state.h"
34 #include "pipe/p_shader_tokens.h"
36 #if defined __cplusplus
41 #define NUM_CHANNELS 4 /* R,G,B,A */
42 #define QUAD_SIZE 4 /* 4 pixel/quad */
46 * Registers may be treated as float, signed int or unsigned int.
48 union tgsi_exec_channel
52 unsigned u
[QUAD_SIZE
];
56 * A vector[RGBA] of channels[4 pixels]
58 struct tgsi_exec_vector
60 union tgsi_exec_channel xyzw
[NUM_CHANNELS
];
64 * For fragment programs, information for computing fragment input
65 * values from plane equation of the triangle/line.
67 struct tgsi_interp_coef
69 float a0
[NUM_CHANNELS
]; /* in an xyzw layout */
70 float dadx
[NUM_CHANNELS
];
71 float dady
[NUM_CHANNELS
];
74 enum tgsi_sampler_control
{
75 tgsi_sampler_lod_bias
,
76 tgsi_sampler_lod_explicit
80 * Information for sampling textures, which must be implemented
81 * by code outside the TGSI executor.
85 /** Get samples for four fragments in a quad */
86 void (*get_samples
)(struct tgsi_sampler
*sampler
,
87 const float s
[QUAD_SIZE
],
88 const float t
[QUAD_SIZE
],
89 const float p
[QUAD_SIZE
],
90 const float c0
[QUAD_SIZE
],
91 enum tgsi_sampler_control control
,
92 float rgba
[NUM_CHANNELS
][QUAD_SIZE
]);
95 #define TGSI_EXEC_NUM_TEMPS 128
96 #define TGSI_EXEC_NUM_IMMEDIATES 256
97 #define TGSI_EXEC_NUM_TEMP_ARRAYS 8
100 * Locations of various utility registers (_I = Index, _C = Channel)
102 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0)
103 #define TGSI_EXEC_TEMP_00000000_C 0
105 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
106 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1
108 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0)
109 #define TGSI_EXEC_TEMP_80000000_C 2
111 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
112 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3
114 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1)
115 #define TGSI_EXEC_TEMP_ONE_C 0
117 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1)
118 #define TGSI_EXEC_TEMP_TWO_C 1
120 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1)
121 #define TGSI_EXEC_TEMP_128_C 2
123 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1)
124 #define TGSI_EXEC_TEMP_MINUS_128_C 3
126 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2)
127 #define TGSI_EXEC_TEMP_KILMASK_C 0
129 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2)
130 #define TGSI_EXEC_TEMP_OUTPUT_C 1
132 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
133 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2
135 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
136 #define TGSI_EXEC_TEMP_THREE_C 3
138 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
139 #define TGSI_EXEC_TEMP_HALF_C 0
141 /* execution mask, each value is either 0 or ~0 */
142 #define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3)
143 #define TGSI_EXEC_MASK_C 1
145 /* 4 register buffer for various purposes */
146 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)
147 #define TGSI_EXEC_NUM_TEMP_R 4
149 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
150 #define TGSI_EXEC_NUM_ADDRS 1
152 /* predicate register */
153 #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9)
154 #define TGSI_EXEC_NUM_PREDS 1
156 #define TGSI_EXEC_NUM_TEMP_EXTRAS 10
160 #define TGSI_EXEC_MAX_NESTING 32
161 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
162 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
163 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
164 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
166 /* The maximum number of input attributes per vertex. For 2D
167 * input register files, this is the stride between two 1D
170 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 17
172 /* The maximum number of constant vectors per constant buffer.
174 #define TGSI_EXEC_MAX_CONST_BUFFER 4096
176 /* The maximum number of vertices per primitive */
177 #define TGSI_MAX_PRIM_VERTICES 6
179 /* The maximum number of primitives to be generated */
180 #define TGSI_MAX_PRIMITIVES 64
182 /* The maximum total number of vertices */
183 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
185 #define TGSI_MAX_MISC_INPUTS 8
187 /** function call/activation record */
188 struct tgsi_call_record
199 /* Switch-case block state. */
200 struct tgsi_switch_record
{
201 uint mask
; /**< execution mask */
202 union tgsi_exec_channel selector
; /**< a value case statements are compared to */
203 uint defaultMask
; /**< non-execute mask for default case */
207 enum tgsi_break_type
{
208 TGSI_EXEC_BREAK_INSIDE_LOOP
,
209 TGSI_EXEC_BREAK_INSIDE_SWITCH
213 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
217 * Run-time virtual machine state for executing TGSI shader.
219 struct tgsi_exec_machine
221 /* Total = program temporaries + internal temporaries
223 struct tgsi_exec_vector Temps
[TGSI_EXEC_NUM_TEMPS
+
224 TGSI_EXEC_NUM_TEMP_EXTRAS
];
225 struct tgsi_exec_vector TempArray
[TGSI_EXEC_NUM_TEMP_ARRAYS
][TGSI_EXEC_NUM_TEMPS
];
227 float Imms
[TGSI_EXEC_NUM_IMMEDIATES
][4];
229 float ImmArray
[TGSI_EXEC_NUM_IMMEDIATES
][4];
231 struct tgsi_exec_vector
*Inputs
;
232 struct tgsi_exec_vector
*Outputs
;
235 unsigned SysSemanticToIndex
[TGSI_SEMANTIC_COUNT
];
236 float SystemValue
[TGSI_MAX_MISC_INPUTS
][4];
238 struct tgsi_exec_vector
*Addrs
;
239 struct tgsi_exec_vector
*Predicates
;
241 struct tgsi_sampler
**Samplers
;
245 const void *Consts
[PIPE_MAX_CONSTANT_BUFFERS
];
246 unsigned ConstsSize
[PIPE_MAX_CONSTANT_BUFFERS
];
248 const struct tgsi_token
*Tokens
; /**< Declarations, instructions */
249 unsigned Processor
; /**< TGSI_PROCESSOR_x */
251 /* GEOMETRY processor only. */
252 unsigned *Primitives
;
254 unsigned MaxGeometryShaderOutputs
;
256 /* FRAGMENT processor only. */
257 const struct tgsi_interp_coef
*InterpCoefs
;
258 struct tgsi_exec_vector QuadPos
;
259 float Face
; /**< +1 if front facing, -1 if back facing */
261 /* Conditional execution masks */
262 uint CondMask
; /**< For IF/ELSE/ENDIF */
263 uint LoopMask
; /**< For BGNLOOP/ENDLOOP */
264 uint ContMask
; /**< For loop CONT statements */
265 uint FuncMask
; /**< For function calls */
266 uint ExecMask
; /**< = CondMask & LoopMask */
268 /* Current switch-case state. */
269 struct tgsi_switch_record Switch
;
271 /* Current break type. */
272 enum tgsi_break_type BreakType
;
274 /** Condition mask stack (for nested conditionals) */
275 uint CondStack
[TGSI_EXEC_MAX_COND_NESTING
];
278 /** Loop mask stack (for nested loops) */
279 uint LoopStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
282 /** Loop label stack */
283 uint LoopLabelStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
284 int LoopLabelStackTop
;
286 /** Loop continue mask stack (see comments in tgsi_exec.c) */
287 uint ContStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
290 /** Switch case stack */
291 struct tgsi_switch_record SwitchStack
[TGSI_EXEC_MAX_SWITCH_NESTING
];
294 enum tgsi_break_type BreakStack
[TGSI_EXEC_MAX_BREAK_STACK
];
297 /** Function execution mask stack (for executing subroutine code) */
298 uint FuncStack
[TGSI_EXEC_MAX_CALL_NESTING
];
301 /** Function call stack for saving/restoring the program counter */
302 struct tgsi_call_record CallStack
[TGSI_EXEC_MAX_CALL_NESTING
];
305 struct tgsi_full_instruction
*Instructions
;
306 uint NumInstructions
;
308 struct tgsi_full_declaration
*Declarations
;
309 uint NumDeclarations
;
311 struct tgsi_declaration_resource Resources
[PIPE_MAX_SHADER_RESOURCES
];
313 boolean UsedGeometryShader
;
316 struct tgsi_exec_machine
*
317 tgsi_exec_machine_create( void );
320 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
);
324 tgsi_exec_machine_bind_shader(
325 struct tgsi_exec_machine
*mach
,
326 const struct tgsi_token
*tokens
,
328 struct tgsi_sampler
**samplers
);
331 tgsi_exec_machine_run(
332 struct tgsi_exec_machine
*mach
);
336 tgsi_exec_machine_free_data(struct tgsi_exec_machine
*mach
);
340 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
);
344 tgsi_set_kill_mask(struct tgsi_exec_machine
*mach
, unsigned mask
)
346 mach
->Temps
[TGSI_EXEC_TEMP_KILMASK_I
].xyzw
[TGSI_EXEC_TEMP_KILMASK_C
].u
[0] =
351 /** Set execution mask values prior to executing the shader */
353 tgsi_set_exec_mask(struct tgsi_exec_machine
*mach
,
354 boolean ch0
, boolean ch1
, boolean ch2
, boolean ch3
)
356 int *mask
= mach
->Temps
[TGSI_EXEC_MASK_I
].xyzw
[TGSI_EXEC_MASK_C
].i
;
357 mask
[0] = ch0
? ~0 : 0;
358 mask
[1] = ch1
? ~0 : 0;
359 mask
[2] = ch2
? ~0 : 0;
360 mask
[3] = ch3
? ~0 : 0;
365 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine
*mach
,
368 const unsigned *buf_sizes
);
372 tgsi_exec_get_shader_param(enum pipe_shader_cap param
)
375 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
376 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
377 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
378 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
380 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
381 return TGSI_EXEC_MAX_NESTING
;
382 case PIPE_SHADER_CAP_MAX_INPUTS
:
383 return TGSI_EXEC_MAX_INPUT_ATTRIBS
;
384 case PIPE_SHADER_CAP_MAX_CONSTS
:
385 return TGSI_EXEC_MAX_CONST_BUFFER
;
386 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
387 return PIPE_MAX_CONSTANT_BUFFERS
;
388 case PIPE_SHADER_CAP_MAX_TEMPS
:
389 return TGSI_EXEC_NUM_TEMPS
;
390 case PIPE_SHADER_CAP_MAX_ADDRS
:
391 return TGSI_EXEC_NUM_ADDRS
;
392 case PIPE_SHADER_CAP_MAX_PREDS
:
393 return TGSI_EXEC_NUM_PREDS
;
394 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
396 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
397 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
398 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
399 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
401 case PIPE_SHADER_CAP_SUBROUTINES
:
408 #if defined __cplusplus
412 #endif /* TGSI_EXEC_H */