4 libbasetype struct pcibase
5 classptr_field psd.pciClass
9 oopbase_field psd.oopBase
10 seglist_field psd.segList
21 interfacename Hidd_PCI
23 methodbase HiddPCIBase
24 attributebase HiddPCIAttrBase
31 VOID AddHardwareDriver(OOP_Class *driverClass)
32 BOOL RemHardwareDriver(OOP_Class *driverClass)
33 VOID EnumDevices(struct Hook *callback, const struct TagItem *requirements)
39 interfaceid hidd.pci.driver
40 interfacename Hidd_PCIDriver
41 methodstub HIDD_PCIDriver
42 methodbase HiddPCIDriverBase
43 attributebase HiddPCIDriverAttrBase
47 BOOL DirectBus # [..G] DirectBus shows whether CPUtoPCI and PCItoCPU methods are usable
48 IPTR IOBase # [..G] Offset to host IO space
52 UBYTE ReadConfigByte(OOP_Object *device, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg)
53 UWORD ReadConfigWord(OOP_Object *device, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg)
54 ULONG ReadConfigLong(OOP_Object *device, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg)
55 VOID WriteConfigByte(OOP_Object *device, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, UBYTE val)
56 VOID WriteConfigWord(OOP_Object *device, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, UWORD val)
57 VOID WriteConfigLong(OOP_Object *device, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG val)
58 APTR CPUtoPCI(APTR address)
59 APTR PCItoCPU(APTR address)
60 APTR MapPCI(APTR PCIAddress, ULONG Length)
61 VOID UnmapPCI(APTR CPUAddress, ULONG Length)
62 APTR AllocPCIMem(ULONG Size)
63 VOID FreePCIMem(APTR Address)
64 BOOL AddInterrupt(OOP_Object *device, struct Interrupt *interrupt)
65 VOID RemoveInterrupt(OOP_Object *device, struct Interrupt *interrupt)
66 IPTR HasExtendedConfig(UBYTE bus, UBYTE dev, UBYTE sub)
72 interfaceid hidd.pci.device
73 interfacename Hidd_PCIDevice
74 methodstub HIDD_PCIDevice
75 methodbase HiddPCIDeviceBase
76 attributebase HiddPCIDeviceAttrBase
80 OOP_Object *Driver # [I.G] Hardware PCI driver that handles this device
81 UBYTE Bus # [I.G] Bus the device is on
82 UBYTE Dev # [I.G] Device number
83 UBYTE Sub # [I.G] Function number
84 UWORD VendorID # [..G] VendorID of device as defined in PCI specs
85 UWORD ProductID # [..G] ProductID
86 UWORD RevisionID # [..G] RevisionID
87 UBYTE Interface # [..G]
89 UBYTE SubClass # [..G]
90 UWORD SubsystemVendorID # [..G]
91 UWORD SubsystemID # [..G]
94 IPTR RomBase # [.SG] Location of ROM on the PCI bus (if ROM exists)
95 IPTR RomSize # [..G] Size of ROM area
96 IPTR Base0 # [.SG] Location of Memory Area 0
97 IPTR Size0 # [..G] Size of Memory Area 0
114 BOOL isIO # [.SG] Can device access IO space?
115 BOOL isMEM # [.SG] Can device access Mem space?
116 BOOL isMaster # [.SG] Can device work in BusMaster mode?
117 BOOL paletteSnoop # [.SG] Should VGA compatible card snoop the palette?
118 BOOL is66MHz # [..G] Is device 66MHz capable?
119 CONST_STRPTR ClassDesc # [..G] String description of device Class
120 CONST_STRPTR SubClassDesc # [..G] String description of device SubClass
121 CONST_STRPTR InterfaceDesc # [..G] String description of device Interface
122 BOOL isBridge # [..G] Is the device a PCI-PCI bridge?
123 UBYTE SubBus # [..G] Bus number managed by bridge
124 IPTR MemoryBase # [.SG] PCI bridge will forwart addresses from MemoryBase to
125 IPTR MemoryLimit # [.SG] MemoryLimit through
126 IPTR PrefetchableBase # [.SG] like above, regarding the prefetchable memory
127 IPTR PrefetchableLimit # [.SG]
128 IPTR IOBase # [.SG] PCI bridge will forward IO accesses from IOBase to IOLimit
130 BOOL ISAEnable # [.SG] Enable ISA-specific IO forwarding
131 BOOL VGAEnable # [.SG] Enable VGA-specific IO/MEM forwarding regardless of limits
132 BOOL IRQStatus # [..G] Get current irq status (does device request irq?)
133 ULONG CapabilitiesPresent # [..G] Use this to check if PCI features extra capabilities (such as PM, MSI, PCI-X, PCI-E)
134 UWORD CapabilityPowerManagement # [..G] Get offset of Power Management capability area or 0 if not present
135 UWORD CapabilityAGP # [..G] Get offset of AGP capability area or 0 if not present
136 UWORD CapabilityVitalProductData # [..G] Get offset of Vital Product Data capability area or 0 if not present
137 UWORD CapabilitySlotID # [..G] Get offset of Slot Indentification capability area or 0 if not present
138 UWORD CapabilityMSI # [..G] Get offset of Message Signalled Interrupts capability area or 0 if not present
139 UWORD CapabilityCPCIHotSwap # [..G] Get offset of CompactPCI HotSwap capability area or 0 if not present
140 UWORD CapabilityPCIX # [..G] Get offset of PCI-X capability area or 0 if not present
141 UWORD CapabilityHyperTransport # [..G] Get offset of Hyper Transport capability area or 0 if not present
142 UWORD CapabilityVendorSpecific # [..G] Get offset of Vendor Specific capability area or 0 if not present
143 UWORD CapabilityDebugPort # [..G] Get offset of Debug Port capability area or 0 if not present
144 UWORD CapabilityCPCICRC # [..G] Get offset of CompactPCI Central Resource Control capability area or 0 if not present
145 UWORD CapabilityHotPlugController # [..G] Get offset of PCI Standard Hot-Plug Controller capability area or 0 if not present
146 UWORD CapabilitySSVPID # [..G] Get offset of Bridge Subsystem VendorID/ProductID capability area or 0 if not present
147 UWORD CapabilityAGP3 # [..G] Get offset of AGP3 capability area or 0 if not present
148 UWORD CapabilityPCIE # [..G] Get offset of PCI Express capability area or 0 if not present
149 UWORD CapabilityMSIX # [..G] Get offset of MSI-X capability area or 0 if not present
150 UWORD CapabilityAdvancedFeatures # [..G] Get offset of PCI Advanced Features capability area or 0 if not present
151 CONST_STRPTR Owner # [..G] Get current owner
153 UWORD ExtendedCapabilityAER # [..G] Get offset of PCIE Advanced Error Handling area or 0 if not present
154 UWORD ExtendedCapabilityVC # [..G] Get offset of PCIE Virtual Channel area or 0 if not present
155 UWORD ExtendedCapabilitySerialNumber # [..G] Get offset of PCIE Serial Number area or 0 if not present
156 UWORD ExtendedCapabilityPowerBudgeting # [..G] Get offset of PCIE Power Budgeting area or 0 if not present
161 UBYTE ReadConfigByte(UWORD reg)
162 UWORD ReadConfigWord(UWORD reg)
163 ULONG ReadConfigLong(UWORD reg)
164 VOID WriteConfigByte(UWORD reg, UBYTE val)
165 VOID WriteConfigWord(UWORD reg, UWORD val)
166 VOID WriteConfigLong(UWORD reg, ULONG val)
167 BOOL AddInterrupt(struct Interrupt *interrupt)
168 VOID RemoveInterrupt(struct Interrupt *interrupt)
169 CONST_STRPTR Obtain(CONST_STRPTR owner)
171 IPTR HasExtendedConfig()
195 classptr_field psd.pciDriverClass
196 classid CLID_Hidd_PCIDriver
197 classdatatype struct DrvInstData
204 .interface Hidd_PCIDriver
229 classptr_field psd.pciDeviceClass
230 classdatatype struct DeviceData
238 .interface Hidd_PCIDevice