5 *----------------------------------------------------------------------------
6 * Includes for AROS PCI handling
7 *----------------------------------------------------------------------------
8 * By Chris Hodges <chrisly@platon42.de>
13 // hmmm, these were PPC specific barriers
17 #define SYNC asm volatile("eieio");
24 #define READMEM16_LE(rb) AROS_WORD2LE(*((volatile UWORD *) (rb)))
25 #define READMEM32_LE(rb) AROS_LONG2LE(*((volatile ULONG *) (rb)))
26 #define WRITEMEM32_LE(adr, value) *((volatile ULONG *) (adr)) = AROS_LONG2LE(value)
27 #define CONSTWRITEMEM32_LE(adr, value) *((volatile ULONG *) (adr)) = AROS_LONG2LE(value)
29 #define CONSTWRITEREG16_LE(rb, offset, value) *((volatile UWORD *) (((UBYTE *) (rb)) + ((ULONG) (offset)))) = AROS_WORD2LE(value)
30 #define CONSTWRITEREG32_LE(rb, offset, value) *((volatile ULONG *) (((UBYTE *) (rb)) + ((ULONG) (offset)))) = AROS_LONG2LE(value)
31 #define WRITEREG16_LE(rb, offset, value) *((volatile UWORD *) (((UBYTE *) (rb)) + ((ULONG) (offset)))) = AROS_WORD2LE(value)
32 #define WRITEREG32_LE(rb, offset, value) *((volatile ULONG *) (((UBYTE *) (rb)) + ((ULONG) (offset)))) = AROS_LONG2LE(value)
33 #define WRITEREG64_LE(rb, offset, value) *((volatile UQUAD *) (((UBYTE *) (rb)) + ((ULONG) (offset)))) = AROS_QUAD2LE(value)
35 #define READREG16_LE(rb, offset) AROS_WORD2LE(*((volatile UWORD *) (((UBYTE *) (rb)) + ((ULONG) (offset)))))
36 #define READREG32_LE(rb, offset) AROS_LONG2LE(*((volatile ULONG *) (((UBYTE *) (rb)) + ((ULONG) (offset)))))
37 #define READREG64_LE(rb, offset) AROS_QUAD2LE(*((volatile UQUAD *) (((UBYTE *) (rb)) + ((ULONG) (offset)))))
39 #define READIO16_LE(rb, offset) AROS_WORD2LE(WORDIN((((UBYTE *) (rb)) + ((ULONG) (offset)))))
40 #define WRITEIO16_LE(rb, offset, value) WORDOUT((((UBYTE *) (rb)) + ((ULONG) (offset))), AROS_WORD2LE(value))
41 #define WRITEIO32_LE(rb, offset, value) LONGOUT((((UBYTE *) (rb)) + ((ULONG) (offset))), AROS_WORD2LE(value))