workbench/devs/AHI/Drivers/EMU10kx/hwaccess.h

   1 /*
   2  **********************************************************************
   3  *     hwaccess.h
   4  *     Copyright 1999, 2000 Creative Labs, Inc.
   5  *
   6  **********************************************************************
   7  *
   8  *     Date                 Author          Summary of changes
   9  *     ----                 ------          ------------------
  10  *     October 20, 1999     Bertrand Lee    base code release
  11  *
  12  **********************************************************************
  13  *
  14  *     This program is free software; you can redistribute it and/or
  15  *     modify it under the terms of the GNU General Public License as
  16  *     published by the Free Software Foundation; either version 2 of
  17  *     the License, or (at your option) any later version.
  18  *
  19  *     This program is distributed in the hope that it will be useful,
  20  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  *     GNU General Public License for more details.
  23  *
  24  *     You should have received a copy of the GNU General Public
  25  *     License along with this program; if not, write to the Free
  26  *     Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
  27  *     USA.
  28  *
  29  **********************************************************************
  30  */
  31
  32 #ifndef _HWACCESS_H
  33 #define _HWACCESS_H
  34
  35 #ifdef AHI
  36 #include "linuxsupport.h"
  37 #include "efxmgr.h"
  38 #else
  39 #include <linux/fs.h>
  40 #include <linux/sound.h>
  41 #include <linux/soundcard.h>
  42 #include "ac97_codec.h"
  43 #include <linux/pci.h>
  44 #include <linux/slab.h>
  45 #include <linux/sched.h>
  46 #include <asm/io.h>
  47 #include <emu_wrapper.h>
  48
  49 #include "efxmgr.h"
  50 #include "passthrough.h"
  51 #include "midi.h"
  52 #endif
  53
  54 #define EMUPAGESIZE     4096            /* don't change */
  55 #define NUM_G           64              /* use all channels */
  56 #define NUM_FXSENDS     4               /* don't change */
  57 /* setting this to other than a power of two may break some applications */
  58 #define MAXBUFSIZE      524288 // 65536
  59 #define MAXPAGES        8192
  60 #define BUFMAXPAGES     (MAXBUFSIZE / PAGE_SIZE)
  61
  62 #define FLAGS_AVAILABLE     0x0001
  63 #define FLAGS_READY         0x0002
  64
  65 struct memhandle
  66 {
  67         dma_addr_t dma_handle;
  68         void *addr;
  69         u32 size;
  70 };
  71
  72 #define DEBUG_LEVEL 2
  73
  74 #ifdef EMU10K1_DEBUG
  75 # define DPD(level,x,y...) do {if(level <= DEBUG_LEVEL) printk( KERN_NOTICE "emu10k1: %s: %d: " x , __FILE__ , __LINE__ , y );} while(0)
  76 # define DPF(level,x)   do {if(level <= DEBUG_LEVEL) printk( KERN_NOTICE "emu10k1: %s: %d: " x , __FILE__ , __LINE__ );} while(0)
  77 #else
  78 # define DPD(level,x,y...) do { } while (0) /* not debugging: nothing */
  79 # define DPF(level,x) do { } while (0)
  80 #endif /* EMU10K1_DEBUG */
  81
  82 #define ERROR() DPF(1,"error\n")
  83
  84 #ifndef AHI
  85 /* DATA STRUCTURES */
  86
  87 struct emu10k1_waveout
  88 {
  89         u32 send_routing[3];
  90         // audigy only:
  91         u32 send_routing2[3];
  92
  93         u32 send_dcba[3];
  94         // audigy only:
  95         u32 send_hgfe[3];
  96 };
  97 #define ROUTE_PCM 0
  98 #define ROUTE_PT 1
  99 #define ROUTE_PCM1 2
 100
 101 #define SEND_MONO 0
 102 #define SEND_LEFT 1
 103 #define SEND_RIGHT 2
 104
 105 struct emu10k1_wavein
 106 {
 107         struct wiinst *ac97;
 108         struct wiinst *mic;
 109         struct wiinst *fx;
 110
 111         u8 recsrc;
 112         u32 fxwc;
 113 };
 114
 115 #define CMD_READ 1
 116 #define CMD_WRITE 2
 117
 118 struct mixer_private_ioctl {
 119         u32 cmd;
 120         u32 val[90];
 121 };
 122
 123 /* bogus ioctls numbers to escape from OSS mixer limitations */
 124 #define CMD_WRITEFN0            _IOW('D', 0, struct mixer_private_ioctl)
 125 #define CMD_READFN0             _IOR('D', 1, struct mixer_private_ioctl)
 126 #define CMD_WRITEPTR            _IOW('D', 2, struct mixer_private_ioctl)
 127 #define CMD_READPTR             _IOR('D', 3, struct mixer_private_ioctl)
 128 #define CMD_SETRECSRC           _IOW('D', 4, struct mixer_private_ioctl)
 129 #define CMD_GETRECSRC           _IOR('D', 5, struct mixer_private_ioctl)
 130 #define CMD_GETVOICEPARAM       _IOR('D', 6, struct mixer_private_ioctl)
 131 #define CMD_SETVOICEPARAM       _IOW('D', 7, struct mixer_private_ioctl)
 132 #define CMD_GETPATCH            _IOR('D', 8, struct mixer_private_ioctl)
 133 #define CMD_GETGPR              _IOR('D', 9, struct mixer_private_ioctl)
 134 #define CMD_GETCTLGPR           _IOR('D', 10, struct mixer_private_ioctl)
 135 #define CMD_SETPATCH            _IOW('D', 11, struct mixer_private_ioctl)
 136 #define CMD_SETGPR              _IOW('D', 12, struct mixer_private_ioctl)
 137 #define CMD_SETCTLGPR           _IOW('D', 13, struct mixer_private_ioctl)
 138 #define CMD_SETGPOUT            _IOW('D', 14, struct mixer_private_ioctl)
 139 #define CMD_GETGPR2OSS          _IOR('D', 15, struct mixer_private_ioctl)
 140 #define CMD_SETGPR2OSS          _IOW('D', 16, struct mixer_private_ioctl)
 141 #define CMD_SETMCH_FX           _IOW('D', 17, struct mixer_private_ioctl)
 142 #define CMD_SETPASSTHROUGH      _IOW('D', 18, struct mixer_private_ioctl)
 143 #define CMD_PRIVATE3_VERSION    _IOW('D', 19, struct mixer_private_ioctl)
 144 #define CMD_AC97_BOOST          _IOW('D', 20, struct mixer_private_ioctl)
 145
 146 //up this number when breaking compatibility
 147 #define PRIVATE3_VERSION 2
 148 #endif // AHI
 149
 150 struct emu10k1_card
 151 {
 152 #ifndef AHI
 153         struct list_head list;
 154 #endif
 155         struct memhandle        virtualpagetable;
 156         struct memhandle        tankmem;
 157         struct memhandle        silentpage;
 158 #ifndef AHI
 159         spinlock_t              lock;
 160 #endif
 161         u8                      voicetable[NUM_G];
 162         u16                     emupagetable[MAXPAGES];
 163 #ifndef AHI
 164         struct list_head        timers;
 165         u16                     timer_delay;
 166         spinlock_t              timer_lock;
 167 #endif
 168
 169 #ifdef AHI
 170         APTR                    pci_dev;
 171 #else
 172         struct pci_dev          *pci_dev;
 173 #endif
 174         unsigned long           iobase;
 175         unsigned long           length;
 176         unsigned short          model;
 177         unsigned int irq;
 178
 179 #ifndef AHI
 180         int     audio_dev;
 181         int     audio_dev1;
 182         int     midi_dev;
 183 #ifdef EMU10K1_SEQUENCER
 184         int seq_dev;
 185         struct emu10k1_mididevice *seq_mididev;
 186 #endif
 187
 188         struct ac97_codec ac97;
 189         int ac97_supported_mixers;
 190         int ac97_stereo_mixers;
 191
 192         /* Number of first fx voice for multichannel output */
 193         u8 mchannel_fx;
 194         struct emu10k1_waveout  waveout;
 195         struct emu10k1_wavein   wavein;
 196         struct emu10k1_mpuout   *mpuout;
 197         struct emu10k1_mpuin    *mpuin;
 198
 199         struct semaphore        open_sem;
 200         mode_t                  open_mode;
 201         wait_queue_head_t       open_wait;
 202
 203         u32         mpuacqcount;          // Mpu acquire count
 204 #endif // AHI
 205         u32         has_toslink;               // TOSLink detection
 206
 207         u8 chiprev;                    /* Chip revision                */
 208         u8 is_audigy;
 209         u8 is_aps;
 210
 211         struct patch_manager mgr;
 212 #ifndef AHI
 213         struct pt_data pt;
 214 #endif
 215 };
 216
 217 int emu10k1_addxmgr_alloc(u32, struct emu10k1_card *);
 218 void emu10k1_addxmgr_free(struct emu10k1_card *, int);
 219
 220 int emu10k1_find_control_gpr(struct patch_manager *, const char *, const char *);
 221 void emu10k1_set_control_gpr(struct emu10k1_card *, int , s32, int );
 222
 223 void emu10k1_set_volume_gpr(struct emu10k1_card *, int, s32, int);
 224
 225
 226 #define VOL_6BIT 0x40
 227 #define VOL_5BIT 0x20
 228 #define VOL_4BIT 0x10
 229
 230 #define TIMEOUT                     16384
 231
 232 u32 srToPitch(u32);
 233 u8 sumVolumeToAttenuation(u32);
 234
 235 #ifndef AHI
 236 extern struct list_head emu10k1_devs;
 237 #endif
 238
 239 /* Hardware Abstraction Layer access functions */
 240
 241 void emu10k1_writefn0(struct emu10k1_card *, u32, u32);
 242 void emu10k1_writefn0_2(struct emu10k1_card *, u32, u32, int);
 243 u32 emu10k1_readfn0(struct emu10k1_card *, u32);
 244
 245 void emu10k1_timer_set(struct emu10k1_card *, u16);
 246
 247 void sblive_writeptr(struct emu10k1_card *, u32, u32, u32);
 248 void sblive_writeptr_tag(struct emu10k1_card *, u32, ...);
 249 #define TAGLIST_END     0
 250
 251 u32 sblive_readptr(struct emu10k1_card *, u32 , u32 );
 252
 253 void emu10k1_irq_enable(struct emu10k1_card *, u32);
 254 void emu10k1_irq_disable(struct emu10k1_card *, u32);
 255 void emu10k1_set_stop_on_loop(struct emu10k1_card *, u32);
 256 void emu10k1_clear_stop_on_loop(struct emu10k1_card *, u32);
 257
 258 /* AC97 Codec register access function */
 259 #ifdef AHI
 260 u16 emu10k1_readac97(struct emu10k1_card *card, u8 reg);
 261 void emu10k1_writeac97(struct emu10k1_card *card, u8 reg, u16 value);
 262 #else
 263 u16 emu10k1_ac97_read(struct ac97_codec *, u8);
 264 void emu10k1_ac97_write(struct ac97_codec *, u8, u16);
 265 #endif
 266
 267
 268 /* MPU access function*/
 269 int emu10k1_mpu_write_data(struct emu10k1_card *, u8);
 270 int emu10k1_mpu_read_data(struct emu10k1_card *, u8 *);
 271 int emu10k1_mpu_reset(struct emu10k1_card *);
 272 #ifndef AHI
 273 int emu10k1_mpu_acquire(struct emu10k1_card *);
 274 int emu10k1_mpu_release(struct emu10k1_card *);
 275 #endif
 276
 277 #endif  /* _HWACCESS_H */