2 Copyright © 2004-2014, Davy Wentzler. All rights reserved.
6 #include <proto/exec.h>
8 #include <proto/expansion.h>
9 #include "DriverData.h"
16 #define snd_akm4xxx_get(ak,chip,reg) (ak)->images[(chip) * 16 + (reg)]
17 #define snd_akm4xxx_set(ak,chip,reg,val) ((ak)->images[(chip) * 16 + (reg)] = (val))
18 #define snd_akm4xxx_get_ipga(ak,chip,reg) (ak)->ipga_gain[chip][(reg)-4]
19 #define snd_akm4xxx_set_ipga(ak,chip,reg,val) ((ak)->ipga_gain[chip][(reg)-4] = (val))
22 #define snd_ice1712_gpio_read GetGPIOData
23 #define snd_ice1712_gpio_write SetGPIOData
24 #define udelay MicroDelay
26 void akm4xxx_write(struct CardData
*card
, struct akm_codec
*priv
, int chip
, unsigned char addr
, unsigned char data
)
30 unsigned int addrdata
= 0;
32 tmp
= snd_ice1712_gpio_read(ice
);
33 tmp
|= priv
->add_flags
;
34 tmp
&= ~priv
->mask_flags
;
35 if (priv
->cs_mask
== priv
->cs_addr
) {
37 tmp
|= priv
->cs_mask
; /* start without chip select */
39 tmp
&= ~priv
->cs_mask
; /* chip select low */
40 snd_ice1712_gpio_write(ice
, tmp
);
44 /* doesn't handle cf=1 yet */
45 tmp
&= ~priv
->cs_mask
;
47 snd_ice1712_gpio_write(ice
, tmp
);
51 /* build I2C address + data byte */
52 addrdata
= (priv
->caddr
<< 6) | 0x20 | (addr
& 0x1f);
53 addrdata
= (addrdata
<< 8) | data
;
54 for (idx
= 15; idx
>= 0; idx
--) {
56 tmp
&= ~priv
->clk_mask
;
57 snd_ice1712_gpio_write(ice
, tmp
);
60 if (addrdata
& (1 << idx
))
61 tmp
|= priv
->data_mask
;
63 tmp
&= ~priv
->data_mask
;
64 snd_ice1712_gpio_write(ice
, tmp
);
67 tmp
|= priv
->clk_mask
;
68 snd_ice1712_gpio_write(ice
, tmp
);
72 if (priv
->cs_mask
== priv
->cs_addr
) {
74 /* assert a cs pulse to trigger */
75 tmp
&= ~priv
->cs_mask
;
76 snd_ice1712_gpio_write(ice
, tmp
);
79 tmp
|= priv
->cs_mask
; /* chip select high to trigger */
81 tmp
&= ~priv
->cs_mask
;
82 tmp
|= priv
->cs_none
; /* deselect address */
84 snd_ice1712_gpio_write(ice
, tmp
);
88 void akm4xxx_write_old(struct CardData
*card
, struct akm_codec
*codec
, int chip
, unsigned char addr
, unsigned char data
)
92 unsigned int addrdata
= 0;
94 //IExec->DebugPrintF("m = %x, %x, data = %x\n", dev->InByte(base + 0x1F), dev->InWord(base + 0x16), data);
96 tmp
= GetGPIOData(card
);
98 //tmp |= codec->clock; // clock hi
99 tmp
&= ~codec
->cs_mask
; // cs down
100 SetGPIOData(card
, tmp
); // set CS low
104 /* build I2C address + data byte */
105 addrdata
= (codec
->caddr
<< 6) | 0x20 | (addr
& 0x1f); // Chip Address in C1/C0 | r/w bit on (=write) | address & 5 left over bit positions
106 addrdata
= (addrdata
<< 8) | data
;
108 for (idx
= 15; idx
>= 0; idx
--) {
111 tmp
&= ~codec
->clk_mask
;
112 SetGPIOData(card
, tmp
);
116 if (addrdata
& (1 << idx
))
117 tmp
|= codec
->data_mask
;
119 tmp
&= ~codec
->data_mask
;
121 SetGPIOData(card
, tmp
);
125 tmp
|= codec
->clk_mask
;
126 SetGPIOData(card
, tmp
);
130 /* assert a cs pulse to trigger */
131 //tmp &= ~codec->clock;
132 tmp
|= codec
->cs_mask
;
133 SetGPIOData(card
, tmp
);
136 //tmp |= codec->clock;
137 //SetGPIOData(card, tmp);
142 static void Phase88_akm4xxx_write(struct CardData
*card
, int chip
, unsigned char addr
, unsigned char data
)
146 unsigned int addrdata
;
148 if (!(chip
>= 0 && chip
< 4))
151 Phase88_ak4524_lock(card
, chip
);
153 tmp
= ReadCCI(card
, CCI_GPIO_DATA
);
157 /* build I2C address + data byte */
158 addrdata
= (2 << 6) | 0x20 | (addr
& 0x1f);
159 addrdata
= (addrdata
<< 8) | data
;
161 for (idx
= 15; idx
>= 0; idx
--) {
164 tmp
&= ~PHASE88_CLOCK
;
165 WriteCCI(card
, CCI_GPIO_DATA
, tmp
);
169 if (addrdata
& (1 << idx
))
172 tmp
&= ~PHASE88_DATA
;
173 WriteCCI(card
, CCI_GPIO_DATA
, tmp
);
177 tmp
|= PHASE88_CLOCK
;
178 WriteCCI(card
, CCI_GPIO_DATA
, tmp
);
182 /* assert a cs pulse to trigger */
183 WriteCCI(card
, CCI_GPIO_DATA
, tmp
);
186 Phase88_ak4524_unlock(card
, chip
);
190 static unsigned char inits_ak4524
[] = {
191 0x00, 0x07, /* 0: all power up */
192 0x01, 0x00, /* 1: ADC/DAC reset */
193 0x02, 0x60, /* 2: 24bit I2S */
194 0x03, 0x19, /* 3: deemphasis off */
195 0x01, 0x03, /* 1: ADC/DAC enable */
196 0x04, 0x00, /* 4: ADC left muted */
197 0x05, 0x00, /* 5: ADC right muted */
198 0x04, 0x80, /* 4: ADC IPGA gain 0dB */
199 0x05, 0x80, /* 5: ADC IPGA gain 0dB */
200 0x06, 0x7F, /* 6: DAC left full */
201 0x07, 0x7F, /* 7: DAC right full */
204 static unsigned char inits_ak4528
[] = {
205 0x00, 0x07, /* 0: all power up */
206 0x01, 0x00, /* 1: ADC/DAC reset */
207 0x02, 0x60, /* 2: 24bit I2S */
208 0x03, 0x01, /* 3: no highpass filters */
209 0x01, 0x03, /* 1: ADC/DAC enable */
210 0x04, 0x7F, /* 4: ADC left muted */
211 0x05, 0x7F, /* 5: ADC right muted */
214 static unsigned char inits_ak4529
[] = {
215 0x09, 0x01, /* 9: ATS=0, RSTN=1 */
216 0x0a, 0x3f, /* A: all power up, no zero/overflow detection */
217 0x00, 0x0c, /* 0: TDM=0, 24bit I2S, SMUTE=0 */
218 0x01, 0x00, /* 1: ACKS=0, ADC, loop off */
219 0x02, 0xff, /* 2: LOUT1 muted */
220 0x03, 0xff, /* 3: ROUT1 muted */
221 0x04, 0xff, /* 4: LOUT2 muted */
222 0x05, 0xff, /* 5: ROUT2 muted */
223 0x06, 0xff, /* 6: LOUT3 muted */
224 0x07, 0xff, /* 7: ROUT3 muted */
225 0x0b, 0xff, /* B: LOUT4 muted */
226 0x0c, 0xff, /* C: ROUT4 muted */
227 0x08, 0x55, /* 8: deemphasis all off */
230 static unsigned char inits_ak4355
[] = {
231 0x01, 0x02, /* 1: reset and soft-mute */
232 0x00, 0x06, /* 0: mode3(i2s), disable auto-clock detect, disable DZF, sharp roll-off, RSTN#=0 */
233 0x02, 0x0e, /* 2: DA's power up, normal speed, RSTN#=0 */
234 // 0x02, 0x2e, /* quad speed */
235 0x03, 0x01, /* 3: de-emphasis off */
236 0x04, 0x00, /* 4: LOUT1 volume muted */
237 0x05, 0x00, /* 5: ROUT1 volume muted */
238 0x06, 0x00, /* 6: LOUT2 volume muted */
239 0x07, 0x00, /* 7: ROUT2 volume muted */
240 0x08, 0x00, /* 8: LOUT3 volume muted */
241 0x09, 0x00, /* 9: ROUT3 volume muted */
242 0x0a, 0x00, /* a: DATT speed=0, ignore DZF */
243 0x01, 0x01, /* 1: un-reset, unmute */
246 static unsigned char inits_ak4381
[] = {
247 0x00, 0x0c, /* 0: mode3(i2s), disable auto-clock detect */
248 0x01, 0x02, /* 1: de-emphasis off, normal speed, sharp roll-off, DZF off */
249 // 0x01, 0x12, /* quad speed */
250 0x02, 0x00, /* 2: DZF disabled */
251 0x03, 0x00, /* 3: LATT 0 */
252 0x04, 0x00, /* 4: RATT 0 */
253 0x00, 0x0f, /* 0: power-up, un-reset */
259 * initialize all the ak4xxx chips
261 void Init_akm4xxx(struct CardData
*card
, enum akm_types type
, enum Model CardModel
)
265 unsigned char *ptr
, reg
, data
, *inits
;
269 inits
= inits_ak4524
;
273 inits
= inits_ak4528
;
274 num_chips
= 1; //8 / 2;
277 inits
= inits_ak4529
;
281 inits
= inits_ak4355
;
285 inits
= inits_ak4381
;
289 inits
= inits_ak4524
;
295 if (CardModel
== PHASE88
)
297 for (chip
= 0; chip
< num_chips
; chip
++)
304 Phase88_akm4xxx_write(card
, chip
, reg
, data
);
308 else if (CardModel
== MAUDIO_2496
)
315 akm4xxx_write(card
, &(card
->codec
[0]), 0, reg
, data
);
318 else if (CardModel
== MAUDIO_DELTA44
|| CardModel
== MAUDIO_DELTA66
)
325 akm4xxx_write(card
, &(card
->codec
[0]), 0, reg
, data
);
328 else if (CardModel
== MAUDIO_1010LT
)
330 for (chip
= 0; chip
< num_chips
; chip
++)
337 akm4xxx_write(card
, &card
->codec
[chip
], chip
, reg
, data
);
343 #define AK_GET_CHIP(val) (((val) >> 8) & 0xff)
344 #define AK_GET_ADDR(val) ((val) & 0xff)
345 #define AK_GET_SHIFT(val) (((val) >> 16) & 0x7f)
346 #define AK_GET_INVERT(val) (((val) >> 23) & 1)
347 #define AK_GET_MASK(val) (((val) >> 24) & 0xff)
348 #define AK_COMPOSE(chip,addr,shift,mask) (((chip) << 8) | (addr) | ((shift) << 16) | ((mask) << 24))
349 #define AK_INVERT (1<<23)