arch/arm-all/include/asm/cp15.h

   1 /*
   2     Copyright © 2014, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: The purpose of the system control coprocessor, CP15, is to control and provide status information for the functions implemented in the processor.
   6     Lang: english
   7 */
   8
   9 #ifndef ASM_ARM_CP15_H
  10 #define ASM_ARM_CP15_H
  11
  12 #include <exec/types.h>
  13 #include <inttypes.h>
  14
  15 #ifdef __ARM_ARCH_7A__
  16 /* C1, (C)ontrol (R)egister */
  17 #define C1CRB_M         0
  18 #define C1CRB_A         1
  19 #define C1CRB_C         2
  20 #define C1CRB_Z         11
  21 #define C1CRB_I         12
  22 #define C1CRB_V         13
  23 #define C1CRB_EE        25
  24 #define C1CRB_NMFI      27
  25 #define C1CRB_TRE       28
  26 #define C1CRB_AFE       29
  27 #define C1CRB_TE        30
  28 #define C1CRF_M         (1UL<<C1CRB_M)
  29 #define C1CRF_A         (1UL<<C1CRB_A)
  30 #define C1CRF_C         (1UL<<C1CRB_C)
  31 #define C1CRF_Z         (1UL<<C1CRB_Z)
  32 #define C1CRF_I         (1UL<<C1CRB_I)
  33 #define C1CRF_V         (1UL<<C1CRB_V)
  34 #define C1CRF_EE        (1UL<<C1CRB_EE)
  35 #define C1CRF_NMFI      (1UL<<C1CRB_NMFI)
  36 #define C1CRF_TRE       (1UL<<C1CRB_TRE)
  37 #define C1CRF_AFE       (1UL<<C1CRB_AFE)
  38 #define C1CRF_TE        (1UL<<C1CRB_TE)
  39 /* C1 (C)oprocessor (A)ccess (C)ontrol (R)egister */
  40 #define C1CACRF_CPAP            0b00000011111111111111111111111111
  41 #define C1CACRV_CPAP(cp)        (((0b11)<<(cp*2)) & C1CACRF_CPAP)
  42 #endif /* __ARM_ARCH_7A__ */
  43
  44 /* C1 (C)ontrol (R)egister SET */
  45 static inline void CP15_C1CR_Set(uint32_t val) {
  46         uint32_t __v;
  47     asm volatile ("mrc p15, 0, %0, c1, c0, 0":"=r"(__v));
  48     __v |= val;
  49     asm volatile ("mcr p15, 0, %0, c1, c0, 0"::"r"(__v));
  50 }
  51
  52 /* C1 (C)ontrol (R)egister CLEAR */
  53 static inline void CP15_C1CR_Clear(uint32_t val) {
  54         uint32_t __v;
  55     asm volatile ("mrc p15, 0, %0, c1, c0, 0":"=r"(__v));
  56     __v &= ~val;
  57     asm volatile ("mcr p15, 0, %0, c1, c0, 0"::"r"(__v));
  58 }
  59
  60 /* C1 (C)oprocessor (A)ccess (C)ontrol (R)egister SET ALL */
  61 static inline void CP15_C1CACR_All(uint32_t val) {
  62         uint32_t __v;
  63     asm volatile ("mrc p15, 0, %0, c1, c0, 2":"=r"(__v));
  64     __v |= val;
  65     asm volatile ("mcr p15, 0, %0, c1, c0, 2"::"r"(__v));
  66         asm volatile ("isb");
  67 }
  68
  69 /* C1 (C)oprocessor (A)ccess (C)ontrol (R)egister SET NONE */
  70 static inline void CP15_C1CACR_None(uint32_t val) {
  71         uint32_t __v;
  72     asm volatile ("mrc p15, 0, %0, c1, c0, 2":"=r"(__v));
  73         __v &= ~val;
  74     asm volatile ("mcr p15, 0, %0, c1, c0, 2"::"r"(__v));
  75         asm volatile ("isb");
  76 }
  77
  78 #endif /* ASM_ARM_CP15_H */