2 * CPU-specific definitions.
4 * Architectures with the same CPU will likely share single kernel_cpu.h
5 * in arch/$(CPU)-all/kernel/kernel_cpu.h
7 * As you can see, this file is just a sample.
13 #include <aros/i386/cpucontext.h>
18 * We handle all 255 exception vectors. However vectors starting from 0x20
19 * are hardware IRQs which are handled separately. So - 32 raw exceptions.
21 #define EXCEPTIONS_COUNT 32
23 /* We use native context format, no conversion needed */
24 #define regs_t struct ExceptionContext
25 /* There are no private add-ons */
26 #define AROSCPUContext ExceptionContext
28 /* We have no VBlank emulation */
31 /* User/supervisor mode switching - not used */
32 #define cpumode_t __unused char
38 /* A command to issue a syscall */
39 #define krnSysCall(num) asm volatile("int $0x80"::"a"(num):"memory")
41 #define IN_USER_MODE \
43 __asm__ __volatile__ ("mov %%cs,%%ax":"=a"(__value)); \
46 #define PRINT_CPUCONTEXT(regs) \
47 bug("[Kernel] Flags=0x%08X\n", regs->Flags); \
48 bug("[Kernel] stack=%04x:%08x rflags=%08x ip=%04x:%08x ds=0x%04X\n", \
49 regs->ss, regs->esp, regs->eflags, regs->cs, regs->eip, regs->ds); \
50 bug("[Kernel] rax=%08x rbx=%08x rcx=%08x rdx=%08x\n", regs->eax, regs->ebx, regs->ecx, regs->edx); \
51 bug("[Kernel] rsi=%08x rdi=%08x rbp=%08x rsp=%08x\n", regs->esi, regs->edi, regs->ebp, regs->esp);
53 #define SP(regs) regs->esp