test/misc/getcpuinfo.c

   1 /*
   2     Copyright © 1995-2014, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #include <proto/exec.h>
   7 #include <resources/processor.h>
   8 #include <stdio.h>
   9 #if !defined(STATICBUILD)
  10 #include <proto/processor.h>
  11
  12 APTR ProcessorBase = NULL;
  13 #else
  14 #include "processor_intern.h"
  15 struct ProcessorBase ProcBase;
  16 void Processor_GetCPUInfo(struct TagItem * tagList, struct ProcessorBase * ProcessorBase);
  17 LONG Processor_Init(struct ProcessorBase * ProcessorBase);
  18 #define GetCPUInfo(x) Processor_GetCPUInfo(x, &ProcBase)
  19 #endif
  20
  21 static ULONG getcpucount()
  22 {
  23     ULONG cpucount = 0;
  24     struct TagItem tags [] =
  25     {
  26         {GCIT_NumberOfProcessors, (IPTR)&cpucount},
  27         {TAG_DONE, TAG_DONE}
  28     };
  29
  30     GetCPUInfo(tags);
  31
  32     printf("CPU Count: %d\n", (int)cpucount);
  33
  34     return cpucount;
  35 }
  36
  37 struct TagDescription
  38 {
  39     ULONG Value;
  40     CONST_STRPTR Description;
  41 };
  42
  43 struct TagDescription VectorUnit [] =
  44 {
  45     { VECTORTYPE_NONE, "None"},
  46     { VECTORTYPE_ALTIVEC, "AltiVec"},
  47     { VECTORTYPE_VMX, "VMX"},
  48     { VECTORTYPE_MMX, "MMX"},
  49     { VECTORTYPE_SSE, "SSE"},
  50     { VECTORTYPE_SSE2, "SSE2"},
  51     { VECTORTYPE_SSE3, "SSE3"},
  52     { VECTORTYPE_SSSE3, "SSSE3"},
  53     { VECTORTYPE_SSE41, "SSE41"},
  54     { VECTORTYPE_SSE42, "SSE42"},
  55     { VECTORTYPE_MMXEXT, "MMX Ext"},
  56     { VECTORTYPE_3DNOW, "3DNow"},
  57     { VECTORTYPE_3DNOWEXT, "3DNow Ext"},
  58     { VECTORTYPE_SSE4A, "SSE4A"},
  59     { 0, NULL }
  60 };
  61
  62 struct TagDescription ProcessorFamily [] =
  63 {
  64     { CPUFAMILY_UNKNOWN, "Unknown" },
  65     { CPUFAMILY_60X, "PowerPC 60X" },
  66     { CPUFAMILY_7X0, "PowerPC 7X0" },
  67     { CPUFAMILY_74XX, "PowerPC 74XX" },
  68     { CPUFAMILY_4XX, "PowerPC 4XX" },
  69     { CPUFAMILY_AMD_K5, "AMD K5" },
  70     { CPUFAMILY_AMD_K6, "AMD K6" },
  71     { CPUFAMILY_AMD_K7, "AMD K7" },
  72     { CPUFAMILY_AMD_K8, "AMD K8" },
  73     { CPUFAMILY_AMD_K9, "AMD K9" },
  74     { CPUFAMILY_AMD_K10, "AMD K10" },
  75     { CPUFAMILY_INTEL_486, "Intel 486" },
  76     { CPUFAMILY_INTEL_PENTIUM, "Intel Pentium" },
  77     { CPUFAMILY_INTEL_PENTIUM_PRO, "Intel Pentium Pro" },
  78     { CPUFAMILY_INTEL_PENTIUM4, "Intel Pentium 4"},
  79     { 0, NULL },
  80 };
  81
  82 struct TagDescription ProcessorArchitecture [] =
  83 {
  84     { PROCESSORARCH_UNKNOWN, "Unknown" },
  85     { PROCESSORARCH_M68K, "Motorola 68K" },
  86     { PROCESSORARCH_PPC, "PowerPC" },
  87     { PROCESSORARCH_X86, "X86" },
  88     { PROCESSORARCH_ARM, "ARM" },
  89     { 0, NULL }
  90 };
  91
  92 struct TagDescription CurrentEndianness [] =
  93 {
  94     { ENDIANNESS_UNKNOWN, "Unknown" },
  95     { ENDIANNESS_LE, "LE" },
  96     { ENDIANNESS_BE, "BE" },
  97     { 0, NULL}
  98 };
  99
 100 struct TagDescription ProcessorFeatures [] =
 101 {
 102     { GCIT_SupportsFPU, "FPU" },
 103     { GCIT_SupportsAltiVec, "AltiVec" },
 104     { GCIT_SupportsVMX, "VMX" },
 105     { GCIT_SupportsMMX, "MMX" },
 106     { GCIT_SupportsMMXEXT, "AMD MMX Entensions" },
 107     { GCIT_Supports3DNOW, "3DNow!" },
 108     { GCIT_Supports3DNOWEXT, "AMD 3DNow! Extensions" },
 109     { GCIT_SupportsSSE, "SSE" },
 110     { GCIT_SupportsSSE2, "SSE2" },
 111     { GCIT_SupportsSSE3, "SSE3" },
 112     { GCIT_SupportsSSSE3, "SSSE3" },
 113     { GCIT_SupportsSSE41, "SSE4.1" },
 114     { GCIT_SupportsSSE42, "SSE4.2" },
 115     { GCIT_SupportsSSE4A, "SSE4a" },
 116     { GCIT_SupportsVME, "Virtual Mode Extension" },
 117     { GCIT_SupportsPSE, "Page Size Extension" },
 118     { GCIT_SupportsPAE, "Physical Address Extension" },
 119     { GCIT_SupportsCX8, "CMPXCHG8 Instruction" },
 120     { GCIT_SupportsAPIC, "APIC" },
 121     { GCIT_SupportsCMOV, "Conditional Move Instruction" },
 122     { GCIT_SupportsPSE36, "36-bit Page Size Extension" },
 123     { GCIT_SupportsCLFSH, "CLFLUSH Instruction" },
 124     { GCIT_SupportsACPI, "ACPI" },
 125     { GCIT_SupportsFXSR, "FXSAVE and FXSTOR Instructions" },
 126     { GCIT_SupportsHTT, "Hyper-Threading Technology" },
 127     { GCIT_SupportsCX16, "CMPXCHG16B Instruction" },
 128     { GCIT_SupportsVirtualization, "Virtualization Technology" },
 129     { GCIT_SupportsNoExecutionBit, "No-Execution Page Bit" },
 130     { GCIT_Supports64BitMode, "64-bit Capable (x86-64)" },
 131     { GCIT_SupportsMSR, "MSR (Model Specific Registers)" },
 132     { 0, NULL }
 133 };
 134
 135 CONST_STRPTR GetDescription(struct TagDescription * table, ULONG value)
 136 {
 137     static CONST_STRPTR undefined = "Undefined";
 138
 139     LONG i = 0;
 140     while (table[i].Description != NULL)
 141     {
 142         if (table[i].Value == value)
 143             return table[i].Description;
 144         i++;
 145     }
 146
 147     return undefined;
 148 }
 149
 150 static void printcpuinformation(ULONG index)
 151 {
 152     CONST_STRPTR modelstring;
 153     ULONG family, vectorunit;
 154     ULONG i = 0;
 155     ULONG l1size, l1datasize, l1instrsize, l2size, l3size, cachelinesize;
 156     ULONG architecture, endianness;
 157     UQUAD currentspeed, fsbspeed;
 158
 159     struct TagItem tags [] =
 160     {
 161         {GCIT_SelectedProcessor, index},
 162         {GCIT_ModelString, (IPTR)&modelstring},
 163         {GCIT_Family, (IPTR)&family},
 164         {GCIT_VectorUnit, (IPTR)&vectorunit},
 165         {GCIT_L1CacheSize, (IPTR)&l1size},
 166         {GCIT_L1DataCacheSize, (IPTR)&l1datasize},
 167         {GCIT_L1InstructionCacheSize, (IPTR)&l1instrsize},
 168         {GCIT_L2CacheSize, (IPTR)&l2size},
 169         {GCIT_L3CacheSize, (IPTR)&l3size},
 170         {GCIT_CacheLineSize, (IPTR)&cachelinesize},
 171         {GCIT_Architecture, (IPTR)&architecture},
 172         {GCIT_Endianness, (IPTR)&endianness},
 173         {GCIT_ProcessorSpeed, (IPTR)&currentspeed},
 174         {GCIT_FrontsideSpeed, (IPTR)&fsbspeed},
 175         {TAG_DONE, TAG_DONE}
 176     };
 177
 178     GetCPUInfo(tags);
 179
 180     printf("CPU: %d\n", (int)index);
 181     printf("Family: %d\n", (int)family);
 182     printf("FamilyString: %s\n", GetDescription(ProcessorFamily, family));
 183     printf("ModelString: %s\n", modelstring);
 184     printf("Vector Unit: %s\n", GetDescription(VectorUnit, vectorunit));
 185     printf("Architecture: %s\n", GetDescription(ProcessorArchitecture, architecture));
 186     printf("Endianness: %s\n", GetDescription(CurrentEndianness, endianness));
 187
 188     printf("Current Speed: %u Mhz\n", (unsigned)(currentspeed / 1000000));
 189     printf("Frontside Bus Speed: %u Mhz\n", (unsigned)(fsbspeed / 1000000));
 190
 191     printf("L1CacheSize: %d kB\n", (int)l1size);
 192     printf("L1DataCacheSize: %d kB\n", (int)l1datasize);
 193     printf("L1InstructionCacheSize: %d kB\n", (int)l1instrsize);
 194     printf("L2CacheSize: %d kB\n", (int)l2size);
 195     printf("L3CacheSize: %d kB\n", (int)l3size);
 196     printf("CacheLineSize: %d B\n", (int)cachelinesize);
 197
 198     printf("Features:\n");
 199     i = 0;
 200     while(ProcessorFeatures[i].Description != NULL)
 201     {
 202         BOOL check = FALSE;
 203         struct TagItem ftags [] =
 204         {
 205             { GCIT_SelectedProcessor, index },
 206             { ProcessorFeatures[i].Value, (IPTR)&check },
 207             { TAG_DONE, TAG_DONE }
 208         };
 209
 210         GetCPUInfo(ftags);
 211
 212         if (check)
 213             printf("    [%s]\n", ProcessorFeatures[i].Description);
 214         i++;
 215     }
 216 }
 217
 218 int main(void)
 219 {
 220     ULONG cpus = 0;
 221     ULONG index = 0;
 222
 223 #if !defined(STATICBUILD)
 224     if ((ProcessorBase = OpenResource(PROCESSORNAME)) == NULL)
 225     {
 226         printf("Not able to open %s\n", PROCESSORNAME);
 227         return 1;
 228     }
 229 #else
 230     Processor_Init(&ProcBase);
 231 #endif
 232
 233     cpus = getcpucount();
 234
 235     for(index = 0; index < cpus; index++)
 236         printcpuinformation(index);
 237
 238     return 0;
 239 }