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[AROS.git] / workbench / hidds / nouveau / xf86-video-nouveau / nv50_texture.h
blobb870302019a80359d63eba90e176d5e4045f2ee2
1 #ifndef __NV50_TEXTURE_H__
2 #define __NV50_TEXTURE_H__
4 /* It'd be really nice to have these in nouveau_class.h generated by
5 * renouveau like the rest of the object header - but not sure it can
6 * handle non-object stuff nicely - need to look into it.
7 */
9 /* Texture image control block */
10 #define NV50TIC_0_0_MAPA_MASK 0x38000000
11 #define NV50TIC_0_0_MAPA_ZERO 0x00000000
12 #define NV50TIC_0_0_MAPA_C0 0x10000000
13 #define NV50TIC_0_0_MAPA_C1 0x18000000
14 #define NV50TIC_0_0_MAPA_C2 0x20000000
15 #define NV50TIC_0_0_MAPA_C3 0x28000000
16 #define NV50TIC_0_0_MAPA_ONE 0x38000000
17 #define NV50TIC_0_0_MAPB_MASK 0x07000000
18 #define NV50TIC_0_0_MAPB_ZERO 0x00000000
19 #define NV50TIC_0_0_MAPB_C0 0x02000000
20 #define NV50TIC_0_0_MAPB_C1 0x03000000
21 #define NV50TIC_0_0_MAPB_C2 0x04000000
22 #define NV50TIC_0_0_MAPB_C3 0x05000000
23 #define NV50TIC_0_0_MAPB_ONE 0x07000000
24 #define NV50TIC_0_0_MAPG_MASK 0x00e00000
25 #define NV50TIC_0_0_MAPG_ZERO 0x00000000
26 #define NV50TIC_0_0_MAPG_C0 0x00400000
27 #define NV50TIC_0_0_MAPG_C1 0x00600000
28 #define NV50TIC_0_0_MAPG_C2 0x00800000
29 #define NV50TIC_0_0_MAPG_C3 0x00a00000
30 #define NV50TIC_0_0_MAPG_ONE 0x00e00000
31 #define NV50TIC_0_0_MAPR_MASK 0x001c0000
32 #define NV50TIC_0_0_MAPR_ZERO 0x00000000
33 #define NV50TIC_0_0_MAPR_C0 0x00080000
34 #define NV50TIC_0_0_MAPR_C1 0x000c0000
35 #define NV50TIC_0_0_MAPR_C2 0x00100000
36 #define NV50TIC_0_0_MAPR_C3 0x00140000
37 #define NV50TIC_0_0_MAPR_ONE 0x001c0000
38 #define NV50TIC_0_0_TYPEA_MASK 0x00038000
39 #define NV50TIC_0_0_TYPEA_UNORM 0x00010000
40 #define NV50TIC_0_0_TYPEA_SNORM 0x00008000
41 #define NV50TIC_0_0_TYPEA_SINT 0x00018000
42 #define NV50TIC_0_0_TYPEA_UINT 0x00020000
43 #define NV50TIC_0_0_TYPEA_FLOAT 0x00038000
44 #define NV50TIC_0_0_TYPEB_MASK 0x00007000
45 #define NV50TIC_0_0_TYPEB_UNORM 0x00002000
46 #define NV50TIC_0_0_TYPEB_SNORM 0x00001000
47 #define NV50TIC_0_0_TYPEB_SINT 0x00003000
48 #define NV50TIC_0_0_TYPEB_UINT 0x00004000
49 #define NV50TIC_0_0_TYPEB_FLOAT 0x00007000
50 #define NV50TIC_0_0_TYPEG_MASK 0x00000e00
51 #define NV50TIC_0_0_TYPEG_UNORM 0x00000400
52 #define NV50TIC_0_0_TYPEG_SNORM 0x00000200
53 #define NV50TIC_0_0_TYPEG_SINT 0x00000600
54 #define NV50TIC_0_0_TYPEG_UINT 0x00000800
55 #define NV50TIC_0_0_TYPEG_FLOAT 0x00000e00
56 #define NV50TIC_0_0_TYPER_MASK 0x000001c0
57 #define NV50TIC_0_0_TYPER_UNORM 0x00000080
58 #define NV50TIC_0_0_TYPER_SNORM 0x00000040
59 #define NV50TIC_0_0_TYPER_SINT 0x000000c0
60 #define NV50TIC_0_0_TYPER_UINT 0x00000100
61 #define NV50TIC_0_0_TYPER_FLOAT 0x000001c0
62 #define NV50TIC_0_0_FMT_MASK 0x0000003f
63 #define NV50TIC_0_0_FMT_32_32_32_32 0x00000001
64 #define NV50TIC_0_0_FMT_16_16_16_16 0x00000003
65 #define NV50TIC_0_0_FMT_32_32 0x00000004
66 #define NV50TIC_0_0_FMT_8_8_8_8 0x00000008
67 #define NV50TIC_0_0_FMT_2_10_10_10 0x00000009
68 #define NV50TIC_0_0_FMT_16_16 0x0000000c
69 #define NV50TIC_0_0_FMT_32 0x0000000f
70 #define NV50TIC_0_0_FMT_4_4_4_4 0x00000012
71 /* #define NV50TIC_0_0_FMT_1_5_5_5 0x00000013 */
72 #define NV50TIC_0_0_FMT_1_5_5_5 0x00000014
73 #define NV50TIC_0_0_FMT_5_6_5 0x00000015
74 #define NV50TIC_0_0_FMT_8_8 0x00000018
75 #define NV50TIC_0_0_FMT_16 0x0000001b
76 #define NV50TIC_0_0_FMT_8 0x0000001d
77 #define NV50TIC_0_0_FMT_5_9_9_9 0x00000020
78 #define NV50TIC_0_0_FMT_10_11_11 0x00000021
79 #define NV50TIC_0_0_FMT_DXT1 0x00000024
80 #define NV50TIC_0_0_FMT_DXT3 0x00000025
81 #define NV50TIC_0_0_FMT_DXT5 0x00000026
82 #define NV50TIC_0_0_FMT_RGTC1 0x00000027
83 #define NV50TIC_0_0_FMT_RGTC2 0x00000028
84 #define NV50TIC_0_0_FMT_24_8 0x00000029
85 #define NV50TIC_0_0_FMT_8_24 0x0000002a
86 #define NV50TIC_0_0_FMT_32_DEPTH 0x0000002f
87 #define NV50TIC_0_0_FMT_32_8 0x00000030
89 #define NV50TIC_0_1_OFFSET_LOW_MASK 0xffffffff
90 #define NV50TIC_0_1_OFFSET_LOW_SHIFT 0
92 #define NV50TIC_0_2_UNKNOWN_MASK 0xffffffff
94 #define NV50TIC_0_3_UNKNOWN_MASK 0xffffffff
96 #define NV50TIC_0_4_WIDTH_MASK 0x0000ffff
97 #define NV50TIC_0_4_WIDTH_SHIFT 0
99 #define NV50TIC_0_5_DEPTH_MASK 0xffff0000
100 #define NV50TIC_0_5_DEPTH_SHIFT 16
101 #define NV50TIC_0_5_HEIGHT_MASK 0x0000ffff
102 #define NV50TIC_0_5_HEIGHT_SHIFT 0
104 #define NV50TIC_0_6_UNKNOWN_MASK 0xffffffff
106 #define NV50TIC_0_7_OFFSET_HIGH_MASK 0xffffffff
107 #define NV50TIC_0_7_OFFSET_HIGH_SHIFT 0
109 /* Texture sampler control block */
110 #define NV50TSC_1_0_WRAPS_MASK 0x00000007
111 #define NV50TSC_1_0_WRAPS_REPEAT 0x00000000
112 #define NV50TSC_1_0_WRAPS_MIRROR_REPEAT 0x00000001
113 #define NV50TSC_1_0_WRAPS_CLAMP_TO_EDGE 0x00000002
114 #define NV50TSC_1_0_WRAPS_CLAMP_TO_BORDER 0x00000003
115 #define NV50TSC_1_0_WRAPS_CLAMP 0x00000004
116 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_EDGE 0x00000005
117 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_BORDER 0x00000006
118 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP 0x00000007
119 #define NV50TSC_1_0_WRAPT_MASK 0x00000038
120 #define NV50TSC_1_0_WRAPT_REPEAT 0x00000000
121 #define NV50TSC_1_0_WRAPT_MIRROR_REPEAT 0x00000008
122 #define NV50TSC_1_0_WRAPT_CLAMP_TO_EDGE 0x00000010
123 #define NV50TSC_1_0_WRAPT_CLAMP_TO_BORDER 0x00000018
124 #define NV50TSC_1_0_WRAPT_CLAMP 0x00000020
125 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_EDGE 0x00000028
126 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_BORDER 0x00000030
127 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP 0x00000038
128 #define NV50TSC_1_0_WRAPR_MASK 0x000001c0
129 #define NV50TSC_1_0_WRAPR_REPEAT 0x00000000
130 #define NV50TSC_1_0_WRAPR_MIRROR_REPEAT 0x00000040
131 #define NV50TSC_1_0_WRAPR_CLAMP_TO_EDGE 0x00000080
132 #define NV50TSC_1_0_WRAPR_CLAMP_TO_BORDER 0x000000c0
133 #define NV50TSC_1_0_WRAPR_CLAMP 0x00000100
134 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_EDGE 0x00000140
135 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_BORDER 0x00000180
136 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP 0x000001c0
137 #define NV50TSC_1_0_MAX_ANISOTROPY_MASK 0x00700000
139 #define NV50TSC_1_1_MAGF_MASK 0x00000003
140 #define NV50TSC_1_1_MAGF_NEAREST 0x00000001
141 #define NV50TSC_1_1_MAGF_LINEAR 0x00000002
142 #define NV50TSC_1_1_MINF_MASK 0x00000030
143 #define NV50TSC_1_1_MINF_NEAREST 0x00000010
144 #define NV50TSC_1_1_MINF_LINEAR 0x00000020
145 #define NV50TSC_1_1_MIPF_MASK 0x000000c0
146 #define NV50TSC_1_1_MIPF_NONE 0x00000040
147 #define NV50TSC_1_1_MIPF_NEAREST 0x00000080
148 #define NV50TSC_1_1_MIPF_LINEAR 0x000000c0
149 #define NV50TSC_1_1_LOD_BIAS_MASK 0x01fff000
150 #define NV50TSC_1_1_UNKN_ANISO_15 0x10000000
151 #define NV50TSC_1_1_UNKN_ANISO_35 0x18000000
153 #define NV50TSC_1_2_MIN_LOD_MASK 0x00000f00
154 #define NV50TSC_1_2_MAX_LOD_MASK 0x00f00000
156 #define NV50TSC_1_3_UNKNOWN_MASK 0xffffffff
158 #define NV50TSC_1_4_BORDER_COLOR_RED_MASK 0xffffffff
160 #define NV50TSC_1_5_BORDER_COLOR_GREEN_MASK 0xffffffff
162 #define NV50TSC_1_6_BORDER_COLOR_BLUE_MASK 0xffffffff
164 #define NV50TSC_1_7_BORDER_COLOR_ALPHA_MASK 0xffffffff
166 #endif