arch/all-pc/boot/grub2-aros/include/grub/vgaregs.h

   1 /*
   2  *  GRUB  --  GRand Unified Bootloader
   3  *  Copyright (C) 2010  Free Software Foundation, Inc.
   4  *
   5  *  GRUB is free software: you can redistribute it and/or modify
   6  *  it under the terms of the GNU General Public License as published by
   7  *  the Free Software Foundation, either version 3 of the License, or
   8  *  (at your option) any later version.
   9  *
  10  *  GRUB is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with GRUB.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #ifndef GRUB_VGAREGS_HEADER
  20 #define GRUB_VGAREGS_HEADER     1
  21
  22 #ifdef ASM_FILE
  23 #define GRUB_VGA_IO_SR_INDEX 0x3c4
  24 #define GRUB_VGA_IO_SR_DATA 0x3c5
  25 #else
  26
  27 enum
  28   {
  29     GRUB_VGA_IO_CR_BW_INDEX = 0x3b4,
  30     GRUB_VGA_IO_CR_BW_DATA = 0x3b5,
  31     GRUB_VGA_IO_ARX = 0x3c0,
  32     GRUB_VGA_IO_ARX_READ = 0x3c1,
  33     GRUB_VGA_IO_MISC_WRITE = 0x3c2,
  34     GRUB_VGA_IO_SR_INDEX = 0x3c4,
  35     GRUB_VGA_IO_SR_DATA = 0x3c5,
  36     GRUB_VGA_IO_PIXEL_MASK = 0x3c6,
  37     GRUB_VGA_IO_PALLETTE_READ_INDEX = 0x3c7,
  38     GRUB_VGA_IO_PALLETTE_WRITE_INDEX = 0x3c8,
  39     GRUB_VGA_IO_PALLETTE_DATA = 0x3c9,
  40     GRUB_VGA_IO_GR_INDEX = 0x3ce,
  41     GRUB_VGA_IO_GR_DATA = 0x3cf,
  42     GRUB_VGA_IO_CR_INDEX = 0x3d4,
  43     GRUB_VGA_IO_CR_DATA = 0x3d5,
  44     GRUB_VGA_IO_INPUT_STATUS1_REGISTER = 0x3da
  45   };
  46
  47 #define GRUB_VGA_IO_INPUT_STATUS1_VERTR_BIT 0x08
  48
  49 enum
  50   {
  51     GRUB_VGA_CR_HTOTAL = 0x00,
  52     GRUB_VGA_CR_HORIZ_END = 0x01,
  53     GRUB_VGA_CR_HBLANK_START = 0x02,
  54     GRUB_VGA_CR_HBLANK_END = 0x03,
  55     GRUB_VGA_CR_HORIZ_SYNC_PULSE_START = 0x04,
  56     GRUB_VGA_CR_HORIZ_SYNC_PULSE_END = 0x05,
  57     GRUB_VGA_CR_VERT_TOTAL = 0x06,
  58     GRUB_VGA_CR_OVERFLOW = 0x07,
  59     GRUB_VGA_CR_BYTE_PANNING = 0x08,
  60     GRUB_VGA_CR_CELL_HEIGHT = 0x09,
  61     GRUB_VGA_CR_CURSOR_START = 0x0a,
  62     GRUB_VGA_CR_CURSOR_END = 0x0b,
  63     GRUB_VGA_CR_START_ADDR_HIGH_REGISTER = 0x0c,
  64     GRUB_VGA_CR_START_ADDR_LOW_REGISTER = 0x0d,
  65     GRUB_VGA_CR_CURSOR_ADDR_HIGH = 0x0e,
  66     GRUB_VGA_CR_CURSOR_ADDR_LOW = 0x0f,
  67     GRUB_VGA_CR_VSYNC_START = 0x10,
  68     GRUB_VGA_CR_VSYNC_END = 0x11,
  69     GRUB_VGA_CR_VDISPLAY_END = 0x12,
  70     GRUB_VGA_CR_PITCH = 0x13,
  71     GRUB_VGA_CR_UNDERLINE_LOCATION = 0x14,
  72     GRUB_VGA_CR_VERTICAL_BLANK_START = 0x15,
  73     GRUB_VGA_CR_VERTICAL_BLANK_END = 0x16,
  74     GRUB_VGA_CR_MODE = 0x17,
  75     GRUB_VGA_CR_LINE_COMPARE = 0x18,
  76   };
  77
  78 enum
  79   {
  80     GRUB_VGA_CR_BYTE_PANNING_NORMAL = 0
  81   };
  82
  83 enum
  84   {
  85     GRUB_VGA_CR_UNDERLINE_LOCATION_DWORD_MODE = 0x40
  86   };
  87
  88 enum
  89   {
  90     GRUB_VGA_IO_MISC_COLOR = 0x01,
  91     GRUB_VGA_IO_MISC_ENABLE_VRAM_ACCESS = 0x02,
  92     GRUB_VGA_IO_MISC_28MHZ = 0x04,
  93     GRUB_VGA_IO_MISC_EXTERNAL_CLOCK_0 = 0x08,
  94     GRUB_VGA_IO_MISC_UPPER_64K = 0x20,
  95     GRUB_VGA_IO_MISC_NEGATIVE_HORIZ_POLARITY = 0x40,
  96     GRUB_VGA_IO_MISC_NEGATIVE_VERT_POLARITY = 0x80,
  97   };
  98
  99 enum
 100   {
 101     GRUB_VGA_ARX_MODE = 0x10,
 102     GRUB_VGA_ARX_OVERSCAN = 0x11,
 103     GRUB_VGA_ARX_COLOR_PLANE_ENABLE = 0x12,
 104     GRUB_VGA_ARX_HORIZONTAL_PANNING = 0x13,
 105     GRUB_VGA_ARX_COLOR_SELECT = 0x14
 106   };
 107
 108 enum
 109   {
 110     GRUB_VGA_ARX_MODE_TEXT = 0x00,
 111     GRUB_VGA_ARX_MODE_GRAPHICS = 0x01,
 112     GRUB_VGA_ARX_MODE_ENABLE_256COLOR = 0x40
 113   };
 114
 115 #define GRUB_VGA_CR_WIDTH_DIVISOR 8
 116
 117 #define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT 7
 118 #define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK 0x02
 119 #define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT 3
 120 #define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK 0x40
 121
 122 #define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT 8
 123 #define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_MASK 0x01
 124 #define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT 4
 125 #define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_MASK 0x20
 126
 127 #define GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT 6
 128 #define GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK 0x04
 129 #define GRUB_VGA_CR_OVERFLOW_VSYNC_START2_SHIFT 2
 130 #define GRUB_VGA_CR_OVERFLOW_VSYNC_START2_MASK 0x80
 131
 132 #define GRUB_VGA_CR_OVERFLOW_HEIGHT1_SHIFT 7
 133 #define GRUB_VGA_CR_OVERFLOW_HEIGHT1_MASK 0x02
 134 #define GRUB_VGA_CR_OVERFLOW_HEIGHT2_SHIFT 3
 135 #define GRUB_VGA_CR_OVERFLOW_HEIGHT2_MASK 0xc0
 136 #define GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT 4
 137 #define GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_MASK 0x10
 138
 139 #define GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK 0x40
 140 #define GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT 3
 141 #define GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK 0x20
 142 #define GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT 4
 143 #define GRUB_VGA_CR_CELL_HEIGHT_DOUBLE_SCAN 0x80
 144 enum
 145   {
 146     GRUB_VGA_CR_CURSOR_START_DISABLE = (1 << 5)
 147   };
 148
 149 #define GRUB_VGA_CR_PITCH_DIVISOR 8
 150
 151 enum
 152   {
 153     GRUB_VGA_CR_MODE_NO_CGA = 0x01,
 154     GRUB_VGA_CR_MODE_NO_HERCULES = 0x02,
 155     GRUB_VGA_CR_MODE_ADDRESS_WRAP = 0x20,
 156     GRUB_VGA_CR_MODE_BYTE_MODE = 0x40,
 157     GRUB_VGA_CR_MODE_TIMING_ENABLE = 0x80
 158   };
 159
 160 enum
 161   {
 162     GRUB_VGA_SR_RESET = 0,
 163     GRUB_VGA_SR_CLOCKING_MODE = 1,
 164     GRUB_VGA_SR_MAP_MASK_REGISTER = 2,
 165     GRUB_VGA_SR_CHAR_MAP_SELECT = 3,
 166     GRUB_VGA_SR_MEMORY_MODE = 4,
 167   };
 168
 169 enum
 170   {
 171     GRUB_VGA_SR_RESET_ASYNC = 1,
 172     GRUB_VGA_SR_RESET_SYNC = 2
 173   };
 174
 175 enum
 176   {
 177     GRUB_VGA_SR_CLOCKING_MODE_8_DOT_CLOCK = 1
 178   };
 179
 180 enum
 181   {
 182     GRUB_VGA_SR_MEMORY_MODE_NORMAL = 0,
 183     GRUB_VGA_SR_MEMORY_MODE_EXTERNAL_VIDEO_MEMORY = 2,
 184     GRUB_VGA_SR_MEMORY_MODE_SEQUENTIAL_ADDRESSING = 4,
 185     GRUB_VGA_SR_MEMORY_MODE_CHAIN4 = 8,
 186   };
 187
 188 enum
 189   {
 190     GRUB_VGA_GR_SET_RESET_PLANE = 0,
 191     GRUB_VGA_GR_SET_RESET_PLANE_ENABLE = 1,
 192     GRUB_VGA_GR_COLOR_COMPARE = 2,
 193     GRUB_VGA_GR_DATA_ROTATE = 3,
 194     GRUB_VGA_GR_READ_MAP_REGISTER = 4,
 195     GRUB_VGA_GR_MODE = 5,
 196     GRUB_VGA_GR_GR6 = 6,
 197     GRUB_VGA_GR_COLOR_COMPARE_DISABLE = 7,
 198     GRUB_VGA_GR_BITMASK = 8,
 199     GRUB_VGA_GR_MAX
 200   };
 201
 202 #define GRUB_VGA_ALL_PLANES 0xf
 203 #define GRUB_VGA_NO_PLANES 0x0
 204
 205 enum
 206   {
 207     GRUB_VGA_GR_DATA_ROTATE_NOP = 0
 208   };
 209
 210 enum
 211   {
 212     GRUB_VGA_TEXT_TEXT_PLANE = 0,
 213     GRUB_VGA_TEXT_ATTR_PLANE = 1,
 214     GRUB_VGA_TEXT_FONT_PLANE = 2
 215   };
 216
 217 enum
 218   {
 219     GRUB_VGA_GR_GR6_GRAPHICS_MODE = 1,
 220     GRUB_VGA_GR_GR6_MMAP_A0 = (1 << 2),
 221     GRUB_VGA_GR_GR6_MMAP_CGA = (3 << 2)
 222   };
 223
 224 enum
 225   {
 226     GRUB_VGA_GR_MODE_READ_MODE1 = 0x08,
 227     GRUB_VGA_GR_MODE_ODD_EVEN = 0x10,
 228     GRUB_VGA_GR_MODE_ODD_EVEN_SHIFT = 0x20,
 229     GRUB_VGA_GR_MODE_256_COLOR = 0x40
 230   };
 231
 232 struct grub_video_hw_config
 233 {
 234   unsigned vertical_total;
 235   unsigned vertical_blank_start;
 236   unsigned vertical_blank_end;
 237   unsigned vertical_sync_start;
 238   unsigned vertical_sync_end;
 239   unsigned line_compare;
 240   unsigned vdisplay_end;
 241   unsigned pitch;
 242   unsigned horizontal_total;
 243   unsigned horizontal_blank_start;
 244   unsigned horizontal_blank_end;
 245   unsigned horizontal_sync_pulse_start;
 246   unsigned horizontal_sync_pulse_end;
 247   unsigned horizontal_end;
 248 };
 249
 250 static inline void
 251 grub_vga_set_geometry (struct grub_video_hw_config *config,
 252                        void (*cr_write) (grub_uint8_t val, grub_uint8_t addr))
 253 {
 254   unsigned vertical_total = config->vertical_total - 2;
 255   unsigned vertical_blank_start = config->vertical_blank_start - 1;
 256   unsigned vdisplay_end = config->vdisplay_end - 1;
 257   grub_uint8_t overflow, cell_height_reg;
 258
 259   /* Disable CR0-7 write protection.  */
 260   cr_write (0, GRUB_VGA_CR_VSYNC_END);
 261
 262   overflow = ((vertical_total >> GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT)
 263               & GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_MASK)
 264     | ((vertical_total >> GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT)
 265        & GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_MASK)
 266     | ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START2_SHIFT)
 267        & GRUB_VGA_CR_OVERFLOW_VSYNC_START2_MASK)
 268     | ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT)
 269        & GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK)
 270     | ((vdisplay_end >> GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT)
 271        & GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK)
 272     | ((vdisplay_end >> GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT)
 273        & GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK)
 274     | ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT)
 275        & GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK)
 276     | ((config->line_compare >> GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT)
 277        & GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_MASK);
 278
 279   cell_height_reg = ((vertical_blank_start
 280                       >> GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT)
 281                      & GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK)
 282     | ((config->line_compare >> GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT)
 283        & GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK);
 284
 285   cr_write (config->horizontal_total - 1, GRUB_VGA_CR_HTOTAL);
 286   cr_write (config->horizontal_end - 1, GRUB_VGA_CR_HORIZ_END);
 287   cr_write (config->horizontal_blank_start - 1, GRUB_VGA_CR_HBLANK_START);
 288   cr_write (config->horizontal_blank_end, GRUB_VGA_CR_HBLANK_END);
 289   cr_write (config->horizontal_sync_pulse_start,
 290             GRUB_VGA_CR_HORIZ_SYNC_PULSE_START);
 291   cr_write (config->horizontal_sync_pulse_end,
 292             GRUB_VGA_CR_HORIZ_SYNC_PULSE_END);
 293   cr_write (vertical_total & 0xff, GRUB_VGA_CR_VERT_TOTAL);
 294   cr_write (overflow, GRUB_VGA_CR_OVERFLOW);
 295   cr_write (cell_height_reg, GRUB_VGA_CR_CELL_HEIGHT);
 296   cr_write (config->vertical_sync_start & 0xff, GRUB_VGA_CR_VSYNC_START);
 297   cr_write (config->vertical_sync_end & 0x0f, GRUB_VGA_CR_VSYNC_END);
 298   cr_write (vdisplay_end & 0xff, GRUB_VGA_CR_VDISPLAY_END);
 299   cr_write (config->pitch & 0xff, GRUB_VGA_CR_PITCH);
 300   cr_write (vertical_blank_start & 0xff, GRUB_VGA_CR_VERTICAL_BLANK_START);
 301   cr_write (config->vertical_blank_end & 0xff, GRUB_VGA_CR_VERTICAL_BLANK_END);
 302   cr_write (config->line_compare & 0xff, GRUB_VGA_CR_LINE_COMPARE);
 303 }
 304
 305 #endif
 306
 307 #endif