arch/.unmaintained/arm-all/include/asm/registers.h

   1 #ifndef REGISTERS_H
   2 #define REGISTERS_H
   3
   4 #include <exec/types.h>
   5 #define WREG_L(addr)    *(ULONG *)addr
   6 #define RREG_L(addr)    *(ULONG *)addr
   7 #define WREG_W(addr)    *(UWORD *)addr
   8 #define RREG_W(addr)    *(UWORD *)addr
   9 #define WREG_B(addr)    *(UBYTE *)addr
  10 #define RREG_B(addr)    *(UBYTE *)addr
  11
  12
  13 /*
  14  * Interrupt Controller
  15  */
  16
  17 #define ICIP        0x90050000
  18 #define ICMR        0x90050004
  19 #define ICLR        0x90050008
  20 #define ICCR        0x9005000c
  21 #define ICFP        0x90050010
  22 #define ICPR        0x90050020
  23
  24
  25 /*
  26  * Real time clock
  27  */
  28 #define RTAR        0x90010000
  29 #define RCNR        0x90010004
  30 #define RTTR        0x90010008
  31 #define RTSR        0x90010010
  32
  33 /*
  34  * Operating System Timer
  35  */
  36 #define OSMR0       0x90000000
  37 #define OSMR1       0x90000004
  38 #define OSMR2       0x90000008
  39 #define OSMR3       0x9000000c
  40 #define OSCR        0x90000010
  41 #define OSSR        0x90000014
  42 #define OWER        0x90000018
  43 #define OIER        0x9000001c
  44
  45
  46 /*
  47  * Serial Port 3 - UART
  48  */
  49 #define UTCR0       0x80050000
  50 #define UTCR1       0x80050004
  51 #define UTCR2       0x80050008
  52 #define UTCR3       0x8005000c
  53 #define UTDR        0x80050014
  54 #define UTSR0       0x8005001c
  55 #define UTSR1       0x80050020
  56
  57 #define PE_F        (1 << 0)
  58 #define OES_F       (1 << 1)
  59 #define SBS_F       (1 << 2)
  60 #define DSS_F       (1 << 3)
  61 #define SCE_F       (1 << 4)
  62 #define RCE_F       (1 << 5)
  63 #define TCE_F       (1 << 6)
  64
  65
  66 #define RXE_F       (1 << 0)
  67 #define TXE_F       (1 << 1)
  68 #define BRK_F       (1 << 2)
  69 #define RIE_F       (1 << 3)
  70 #define TIE_F       (1 << 4)
  71 #define LBM_F       (1 << 5)
  72
  73
  74 #define PRE_F       (1 << 8)
  75 #define FRE_F       (1 << 9)
  76 #define ROR_F       (1 << 10)
  77
  78 #define TFS_F       (1 << 0)
  79 #define RFS_F       (1 << 1)
  80 #define RID_F       (1 << 2)
  81 #define RBB_F       (1 << 3)
  82 #define REB_F       (1 << 4)
  83 #define EIF_F       (1 << 5)
  84
  85 #define TBY_F       (1 << 0)
  86 #define RNE_F       (1 << 1)
  87 #define TNF_F       (1 << 2)
  88 //#define PRE_F       (1 << 3)
  89 //#define FRE_F       (1 << 4)
  90 //#define ROR_F       (1 << 5)
  91
  92 /*
  93  * LCD controller
  94  */
  95 #define LCCR0       0xB0100000
  96 #define LCSR        0xB0100004
  97 #define DBAR1       0xB0100010
  98 #define DCAR1       0xB0100014
  99 #define DBAR2       0xB0100018
 100 #define DCAR2       0xB010001c
 101 #define LCCR1       0xB0100020
 102 #define LCCR2       0xB0100024
 103 #define LCCR3       0xB0100028
 104
 105 #define PBS_M       (1 << 13 | 1 << 12)
 106
 107 #define LEN_F       (1 << 0)
 108 #define CMS_F       (1 << 1)
 109 #define SDS_F       (1 << 2)
 110 #define LDM_F       (1 << 3)
 111 #define BAM_F       (1 << 4)
 112 #define ERM_F       (1 << 5)
 113 #define PAS_F       (1 << 7)
 114 #define BLE_F       (1 << 8)
 115 #define DPD_F       (1 << 9)
 116 #define PDD_M       (0xff << 12)
 117
 118 #define PLL_M       (0x3ff)
 119 #define HSW_M       (0x3f << 10)
 120 #define ELW_M       (0xff << 16)
 121 #define BLW_M       (0xff << 16)
 122
 123 #define LPP_M       (0x3ff)
 124 #define VSW_M       (0x3f << 10)
 125 #define EFW_M       (0xff << 16)
 126 #define BFW_M       (0xff << 24)
 127
 128 #define PCD_M       (0xff << 0)
 129 #define ACB_M       (0xff << 8)
 130 #define API_M       (0x0f << 16)
 131 #define VSP_F       (1 << 20)
 132 #define HSP_F       (1 << 21)
 133 #define PCP_F       (1 << 22)
 134 #define OEP_F       (1 << 23)
 135
 136 #define LDD_F       (1 << 0)
 137 #define BAU_F       (1 << 1)
 138 #define BER_F       (1 << 2)
 139 #define ABC_F       (1 << 3)
 140 #define IOL_F       (1 << 4)
 141 #define IUL_F       (1 << 5)
 142 #define IOU_F       (1 << 6)
 143 #define IUU_F       (1 << 7)
 144 #define OOL_F       (1 << 8)
 145 #define OUL_F       (1 << 9)
 146 #define OOU_F       (1 << 10)
 147 #define OUU_F       (1 << 11)
 148
 149 #endif