arch/.unmaintained/m68k-pp-native/exec/core.c

   1 /*
   2     Copyright © 1995-2001, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: Core of AROS.
   6     Lang: english
   7 */
   8 #include <exec/types.h>
   9 #include <exec/memory.h>
  10 #include <exec/execbase.h>
  11 #include <exec/ptrace.h>
  12 #include <proto/exec.h>
  13 #include <hidd/irq.h>
  14
  15 #include <aros/core.h>
  16 #include <asm/irq.h>
  17 #include <asm/registers.h>
  18 #include <asm/cpu.h>
  19
  20 # define  DEBUG  1
  21 # include <aros/debug.h>
  22
  23 /*
  24  * Build all interrupt assmbly code needed. Derived from i386-native code.
  25  */
  26 BUILD_IRQ(0)
  27 BUILD_IRQ(1)
  28 BUILD_IRQ(2)
  29 BUILD_IRQ(3)
  30 BUILD_IRQ(4)
  31 BUILD_IRQ(5)
  32 BUILD_IRQ(6)
  33 BUILD_IRQ(7)
  34
  35 static void irqSetup(struct irqDescriptor *, struct ExecBase *);
  36 static void handle_IRQ_event(unsigned int irq, struct pt_regs * regs, struct irqServer * is);
  37
  38 BOOL init_core(struct ExecBase * SysBase)
  39 {
  40         int rc = FALSE;
  41         SysBase->PlatformData = AllocMem(sizeof(struct PlatformData),
  42                                          MEMF_CLEAR|MEMF_PUBLIC);
  43         if (NULL != SysBase->PlatformData) {
  44                 rc = TRUE;
  45                 /*
  46                  * Now initialise the PlatformData structure.
  47                  */
  48                 irqSetup(&PLATFORMDATA(SysBase)->irq_desc[0], SysBase);
  49                 /*
  50                  * Activate the low-level (assembly) interrupt handlers
  51                  */
  52                 INSTALL_IRQ_HANDLER(IRQ_LEVEL6, IRQ6_interrupt);
  53                 INSTALL_IRQ_HANDLER(IRQ_LEVEL5, IRQ5_interrupt);
  54                 INSTALL_IRQ_HANDLER(IRQ_LEVEL4, IRQ4_interrupt);
  55                 INSTALL_IRQ_HANDLER(IRQ_LEVEL3, IRQ3_interrupt);
  56                 INSTALL_IRQ_HANDLER(IRQ_LEVEL2, IRQ2_interrupt);
  57                 INSTALL_IRQ_HANDLER(IRQ_LEVEL1, IRQ1_interrupt);
  58
  59 //              WREG_L(0x100) = (ULONG)IRQ0_interrupt;
  60                 WREG_L(0x104) = (ULONG)IRQ1_interrupt;
  61                 WREG_L(0x108) = (ULONG)IRQ2_interrupt;
  62                 WREG_L(0x10c) = (ULONG)IRQ3_interrupt;
  63                 WREG_L(0x110) = (ULONG)IRQ4_interrupt;
  64                 WREG_L(0x114) = (ULONG)IRQ5_interrupt;
  65                 WREG_L(0x118) = (ULONG)IRQ6_interrupt;
  66
  67                 WREG_W(TCTL2) = 0x11;
  68                 WREG_W(TCMP2) = 0x411a;
  69         }
  70         return rc;
  71 }
  72
  73 static void do_db_IRQ(unsigned int irq,
  74                       unsigned int virq,
  75                       struct pt_regs * regs);
  76 static void disable_db_irq(unsigned int irq);
  77 static void enable_db_irq(unsigned int irq);
  78
  79 #define startup_db_irq   enable_db_irq
  80 #define shutdown_db_irq  disable_db_irq
  81
  82 static struct irqController db_controller =
  83 {
  84         "Dragonball",     // ic_Name
  85         startup_db_irq,   // ic_startup
  86         shutdown_db_irq,  // ic_shutdown
  87         do_db_IRQ,        // ic_handle
  88         enable_db_irq,    // ic_enable
  89         disable_db_irq    // ic_disable
  90 };
  91
  92
  93
  94 static void disable_db_irq(unsigned int irq)
  95 {
  96 }
  97
  98 static void enable_db_irq(unsigned int virq)
  99 {
 100         ULONG imr = RREG_L(IMR);
 101         /*
 102          * On this processor I must clear the flags of those interrupts
 103          * that I want to enable.
 104          */
 105         switch (virq) {
 106                 case vHidd_IRQ_Timer:
 107                         imr &= ~(TMR2_F);
 108                 break;
 109                 case vHidd_IRQ_HDD1:
 110                         imr &= ~(INT0_F | INT1_F | INT2_F | INT3_F | INT4_F | INT5_F | INT6_F | INT7_F);
 111                 break;
 112                 case vHidd_IRQ_Serial1:
 113                         imr &= ~(UART1_F);
 114                 break;
 115                 case vHidd_IRQ_Mouse:
 116                         imr &= ~(PEN_F);
 117                 break;
 118         }
 119         WREG_L(IMR) = imr;
 120 }
 121
 122
 123 static inline void mask_and_ack_dbirq(unsigned int irq)
 124 {
 125 }
 126
 127 static void do_db_IRQ(unsigned int irq,
 128                       unsigned int virq,
 129                       struct pt_regs * regs)
 130 {
 131         struct irqServer     * iServer;
 132         struct irqDescriptor * desc = &PLATFORMDATA(SysBase)->irq_desc[irq];
 133
 134 //      D(bug("In do_db_IRQ(irq=%d,virq=%d)\n",irq,virq));
 135         {
 136                 unsigned int status;
 137                 mask_and_ack_dbirq(irq);
 138                 status = desc->id_status & ~(IRQ_REPLAY | IRQ_WAITING);
 139                 iServer = NULL;
 140                 if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
 141                         iServer = desc->id_server;
 142                         status |= IRQ_INPROGRESS;
 143                 } else {
 144                         D(bug("IRQ server used!? %p (irq=%d,virq=%d)\n",
 145                               desc->id_server,
 146                               irq,
 147                               virq));
 148                 }
 149                 desc->id_status = status;
 150         }
 151
 152         /* Exit early if we had no action or it was disabled */
 153         if (!iServer) {
 154                 D(bug("No IRQ handler found!\n"));
 155                 return;
 156         }
 157 //      D(bug("Handling virq %d in server now!\n",virq));
 158         handle_IRQ_event(virq, regs, iServer);
 159
 160         {
 161                 unsigned int status = desc->id_status & ~IRQ_INPROGRESS;
 162                 desc->id_status = status;
 163                 if (!(status & IRQ_DISABLED))
 164                         enable_db_irq(irq);
 165         }
 166 }
 167
 168 /*******************************************************************************
 169     Lowlevel IRQ functions used by each controller
 170 *******************************************************************************/
 171
 172 static void handle_IRQ_event(unsigned int virq, struct pt_regs * regs, struct irqServer * is)
 173 {
 174         ULONG imr = RREG_L(IMR);
 175         WREG_L(IMR) = ~0;
 176         is->is_handler(virq, is->is_UserData, regs);
 177         WREG_L(IMR) = imr;
 178 }
 179
 180
 181
 182 /*
 183  * Generic enable/disable code: this just calls
 184  * down into the PIC-specific version for the actual
 185  * hardware disable after having gotten the irq
 186  * controller lock.
 187  */
 188 void disable_irq_nosync(unsigned int irq)
 189 {
 190         if (!PLATFORMDATA(SysBase)->irq_desc[irq].id_depth++) {
 191                 PLATFORMDATA(SysBase)->irq_desc[irq].id_status |= IRQ_DISABLED;
 192                 PLATFORMDATA(SysBase)->irq_desc[irq].id_handler->ic_disable(irq);
 193         }
 194 }
 195
 196 /*
 197  * Synchronous version of the above, making sure the IRQ is
 198  * no longer running on any other IRQ..
 199  */
 200 void disable_irq(unsigned int virq)
 201 {
 202         disable_db_irq(virq);
 203 #if 0
 204         disable_irq_nosync(irq);
 205 #endif
 206 }
 207
 208 void enable_irq(unsigned int virq)
 209 {
 210         enable_db_irq(virq);
 211 #if 0
 212         struct irqDescriptor * irq_desc = PLATFORMDATA(SysBase)->irq_desc;
 213         switch (irq_desc[irq].id_depth) {
 214                 case 0: break;
 215                 case 1:
 216                         irq_desc[irq].id_status &= ~IRQ_DISABLED;
 217                         irq_desc[irq].id_handler->ic_enable(virq);
 218                         /* fall throught */
 219                 default:
 220                         irq_desc[irq].id_depth--;
 221         }
 222 #endif
 223 }
 224
 225
 226 // !!! Move this into include file !!!
 227 extern void sys_Dispatch(struct pt_regs * regs);
 228 /*
 229  * Called from low level assembly code. Handles irq number 'irq'.
 230  */
 231 /*asmlinkage*/ void do_IRQ(struct pt_regs * regs, ULONG irq)
 232 {
 233         BOOL treated = FALSE;
 234         struct irqDescriptor * irq_desc = &PLATFORMDATA(SysBase)->irq_desc[irq];
 235         ULONG isr = RREG_L(ISR);
 236
 237         /*
 238          * Now the problem with this processor is that it multiplexes multiple
 239          * interrupt sources over one IRQ. So I demultiplex them here by
 240          * looking at the interrupt pending register depending on what irq
 241          * level I have.
 242          */
 243
 244 //      D(bug("isr=0x%x,irq=%d\n",isr,irq));
 245         switch (irq) {
 246                 case 0:
 247
 248                 break;
 249
 250                 case 1:
 251
 252                 break;
 253
 254                 case 2:
 255
 256                 break;
 257
 258                 case 3:
 259
 260                 break;
 261
 262                 case 4:
 263                         if (isr & TMR2_F) {
 264                                 volatile UWORD tstat2;
 265                                 treated = TRUE;
 266                                 /*
 267                                  * Leave the following two lines as they are.
 268                                  */
 269                                 tstat2 = RREG_W(TSTAT2);
 270                                 WREG_W(TSTAT2) = 0;
 271                                 /*
 272                                  * Explicitly call the dispatcher here to get Multitasking
 273                                  * going. Hm, might maybe want to put this into the chain
 274                                  * of handlers...
 275                                  */
 276 //                              D(bug("------------ Task SWITCH!\n"));
 277                                 sys_Dispatch(regs);
 278                                 irq_desc->id_count++;
 279
 280                                 irq_desc->id_handler->ic_handle(irq,
 281                                                                 0, /* -> index of vHidd_IRQ_Timer2 in servers.c */
 282                                                                 regs);
 283                         }
 284
 285                         if (isr & UART1_F) {
 286 //                              D(bug("-------------- UART IRQ!\n"));
 287                                 /* UART 1 */
 288                                 treated = TRUE;
 289
 290                                 irq_desc->id_count++;
 291                                 irq_desc->id_handler->ic_handle(irq,
 292                                                                 4, /* -> index of vHidd_IRQ_Serial1 in servers.c */
 293                                                                 regs);
 294                         }
 295
 296                         if (isr & WDT_F) {
 297                                 /* Watchdog timer */
 298                         }
 299
 300                         if (isr & RTC_F) {
 301                                 /* real time clock */
 302                         }
 303
 304                         if (isr & LCDC_F) {
 305                                 /* LCDC ??? */
 306                         }
 307
 308                         if (isr & KB_F) {
 309                                 /* Keyboard */
 310                         }
 311
 312                         if (isr & (INT0_F|INT1_F|INT2_F|INT3_F|INT4_F|INT5_F|INT6_F|INT7_F)) {
 313                                 /* Port D */
 314                                 D(bug("--------------- Keyboard IRQ!\n"));
 315                                 treated = TRUE;
 316
 317                                 irq_desc->id_count++;
 318                                 irq_desc->id_handler->ic_handle(irq,
 319                                                                 1, /* -> index of vHidd_IRQ_CustomD */
 320                                                                 regs);
 321
 322                         }
 323                 break;
 324
 325                 case 5:
 326                         if (isr & PEN_F) {
 327 //                              D(bug("Pen IRQ!\n"));
 328                                 irq_desc->id_count++;
 329                                 irq_desc->id_handler->ic_handle(irq,
 330                                                                 12, /* index of vHidd_IRQ_Mouse in servers.c */
 331                                                                 regs);
 332                                 treated = TRUE;
 333                         }
 334                 break;
 335
 336                 case 6:
 337                         if (isr & PWM1_F) {
 338                                 /* PWM */
 339                         }
 340
 341                         if (isr & TMR1_F) {
 342                                 /* TMR1 */
 343                         }
 344                 break;
 345
 346                 case 7:
 347                 break;
 348         }
 349
 350         /*
 351          * Check for the configurable IRQs here
 352          */
 353 #if 0
 354         if ((isr & PWM2_F) && (irq == ((ilcr >> 4) & 0x07))) {
 355
 356         }
 357 #endif
 358
 359         if (FALSE == treated) {
 360                 D(bug("Untreated: irq=%d,isr=0x%x\n",irq,isr));
 361         }
 362 }
 363
 364 static void VBL_handler(int i, void *user, struct pt_regs *regs)
 365 {
 366         if (SysBase->Elapsed == 0) {
 367                 SysBase->SysFlags |= 0x2000;
 368                 SysBase->AttnResched |= 0x80;
 369         } else {
 370                 SysBase->Elapsed--;
 371         }
 372 //      D(bug("In VBL handler!\n"));
 373 }
 374
 375 static struct irqServer VBlank = { VBL_handler, "VBlank", NULL };
 376
 377
 378 static void irqSetup(struct irqDescriptor irq_desc[], struct ExecBase * SysBase)
 379 {
 380         ULONG i;
 381
 382         for (i = 0; i<NR_IRQS; i++) {
 383                 irq_desc[i].id_handler = &db_controller;
 384                 irq_desc[i].id_status  = IRQ_DISABLED;
 385                 irq_desc[i].id_depth   = 0;
 386                 irq_desc[i].id_server  = 0;
 387         }
 388
 389         irqSet(0, &VBlank, NULL, SysBase);
 390         irq_desc[0].id_server = &VBlank;
 391         irq_desc[0].id_depth = 0;
 392         irq_desc[0].id_status &= ~IRQ_DISABLED;
 393         irq_desc[0].id_handler->ic_startup(0);
 394 }
 395
 396
 397 BOOL irqSet(int irq, struct irqServer *is, void * isd, struct ExecBase * SysBase)
 398 {
 399         BOOL rc = FALSE;
 400         if (is) {
 401                 struct irqServer * _is = AllocMem(sizeof(struct irqServer),
 402                                                   MEMF_PUBLIC|MEMF_CLEAR);
 403                 if (NULL != _is) {
 404                         rc = TRUE;
 405                         _is->is_handler  = is->is_handler;
 406                         _is->is_name     = is->is_name;
 407                         _is->is_UserData = isd;
 408                         PLATFORMDATA(SysBase)->irq_desc[irq].id_server  = _is;
 409                         PLATFORMDATA(SysBase)->irq_desc[irq].id_depth   = 0;
 410                         PLATFORMDATA(SysBase)->irq_desc[irq].id_status &= ~IRQ_DISABLED;
 411                         PLATFORMDATA(SysBase)->irq_desc[irq].id_handler->ic_startup(irq);
 412                 }
 413         }
 414         return rc;
 415 }
 416
 417
 418 /*
 419  * Interrupts
 420  */
 421
 422 LONG sys_Cause(struct pt_regs);
 423 LONG sys_Supervisor(struct pt_regs regs) {return 0;}
 424 LONG sys_None(struct pt_regs regs) { return 0; }
 425
 426 LONG sys_ColdReboot(struct pt_regs regs)
 427 {
 428 //      __asm__("jmp kernel_startup");
 429         return 0;
 430 }
 431
 432
 433 LONG (*sys_call_table[])(struct pt_regs) =
 434 {
 435         sys_Cause,
 436         sys_ColdReboot,
 437         sys_Supervisor,
 438         sys_None
 439 };