arch/arm-all/include/asm/cpu.h

   1 /*
   2     Copyright � 1995-2010, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: cpu.h
   6     Lang: english
   7 */
   8
   9 #ifndef ASM_ARM_CPU_H
  10 #define ASM_ARM_CPU_H
  11
  12 #define vfpreg(_vfp_) #_vfp_
  13
  14 #define fmrx(_vfp_) ({                  \
  15         unsigned long __v;                        \
  16         asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx   %0, " #_vfp_    \
  17             : "=r" (__v) : : "cc");     \
  18         __v;                            \
  19  })
  20
  21 #define fmxr(_vfp_,_var_)               \
  22         asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr   " #_vfp_ ", %0" \
  23            : : "r" (_var_) : "cc")
  24
  25 #if __ARM_ARCH >= 7
  26 static inline void isb() { asm volatile("isb" : : : "memory"); }
  27 static inline void dsb() { asm volatile("dsb" : : : "memory"); }
  28 static inline void dmb() { asm volatile("dmb" : : : "memory"); }
  29 static inline void sev() { asm volatile("sev"); }
  30 static inline void wfe() { asm volatile("wfe"); }
  31 #else
  32 static inline void isb() { asm volatile("mcr p15, 0, %0, c7, c5, 4" : : "r" (0) : "memory"); }
  33 static inline void dsb() { asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0) : "memory"); }
  34 static inline void dmb() { asm volatile("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory"); }
  35 static inline void sev() { asm volatile("sev"); }
  36 static inline void wfe() { asm volatile("wfe"); }
  37 #endif
  38
  39 #endif /* ASM_ARM_CPU_H */