arch/arm-native/soc/broadcom/2708/hidd/i2c/i2c-bcm2708.c

   1 /*
   2     Copyright © 2010-2019, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #include <aros/symbolsets.h>
   7 #include <aros/debug.h>
   8 #include <proto/exec.h>
   9 #include <proto/kernel.h>
  10
  11 #include <hidd/i2c.h>
  12
  13 static IPTR __arm_periiobase;
  14 #define ARM_PERIIOBASE __arm_periiobase
  15 #include <hardware/bcm2708.h>
  16 #include <asm/io.h>
  17
  18 #include "i2c-bcm2708.h"
  19
  20 APTR KernelBase __attribute__((used)) = NULL;
  21
  22 void METHOD(I2CBCM2708, Hidd_I2C, PutByte)
  23 {
  24     while (!(rd32le(BSC0_STATUS) & BSC_STATUS_DONE))
  25     {
  26         asm volatile ("mov r2,r2\n");
  27     }
  28
  29     wr32le(BSC0_DATALEN, 1);
  30     wr32le(BSC0_FIFO, msg->data);
  31
  32     wr32le(BSC0_STATUS, BSC_CLEAR);
  33     wr32le(BSC0_CONTROL, BSC_WRITE);
  34 }
  35
  36 void METHOD(I2CBCM2708, Hidd_I2C, GetByte)
  37 {
  38     while (!(rd32le(BSC0_STATUS) & BSC_STATUS_DONE))
  39     {
  40         asm volatile ("mov r2,r2\n");
  41     }
  42
  43     wr32le(BSC0_DATALEN, 1);
  44     wr32le(BSC0_STATUS, BSC_CLEAR);
  45     wr32le(BSC0_CONTROL, BSC_READ);
  46
  47     *msg->data = rd32le(BSC0_FIFO);
  48 }
  49
  50 void I2CBCM2708_Init(void)
  51 {
  52     ULONG tmp;
  53     KernelBase = OpenResource("kernel.resource");
  54     __arm_periiobase = KrnGetSystemAttr(KATTR_PeripheralBase);
  55
  56     /* BSC0 is on GPIO 0 & 1 */
  57     tmp = rd32le(GPFSEL0);
  58     tmp &= ~0x3f; // Mask out bits 0-5
  59     tmp |= 0x24;  // Set bits 0-5 to binary '100100'
  60     wr32le(GPFSEL0, tmp);
  61 }
  62
  63 ADD2LIBS((STRPTR)"i2c.hidd", 0, static struct Library *, I2CBase);