| blob | 14ca74db12d03b2ee3c66a8878e5db6fa4f648c4 |
1 #
2 # $NetBSD: fpsp.s,v 1.5 2005/12/11 12:17:52 christos Exp $
3 #
5 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
6 # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
7 # M68000 Hi-Performance Microprocessor Division
8 # M68060 Software Package Production Release
9 #
10 # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
11 # All rights reserved.
12 #
13 # THE SOFTWARE is provided on an "AS IS" basis and without warranty.
14 # To the maximum extent permitted by applicable law,
15 # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
16 # INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
17 # FOR A PARTICULAR PURPOSE and any warranty against infringement with
18 # regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
19 # and any accompanying written materials.
20 #
21 # To the maximum extent permitted by applicable law,
22 # IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
23 # (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
24 # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
25 # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
26 #
27 # Motorola assumes no responsibility for the maintenance and support
28 # of the SOFTWARE.
29 #
30 # You are hereby granted a copyright license to use, modify, and distribute the
31 # SOFTWARE so long as this entire notice is retained without alteration
32 # in any modified and/or redistributed versions, and that such modified
33 # versions are clearly identified as such.
34 # No licenses are granted by implication, estoppel or otherwise under any
35 # patents or trademarks of Motorola, Inc.
36 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
38 #
39 # freal.s:
40 # This file is appended to the top of the 060FPSP package
41 # and contains the entry points into the package. The user, in
42 # effect, branches to one of the branch table entries located
43 # after _060FPSP_TABLE.
44 # Also, subroutine stubs exist in this file (_fpsp_done for
45 # example) that are referenced by the FPSP package itself in order
46 # to call a given routine. The stub routine actually performs the
47 # callout. The FPSP code does a "bsr" to the stub routine. This
48 # extra layer of hierarchy adds a slight performance penalty but
49 # it makes the FPSP code easier to read and more mainatinable.
50 #
78 _060FPSP_TABLE:
80 ###############################################################
82 # Here's the table of ENTRY POINTS for those linking the package.
83 bra.l _fpsp_snan
84 short 0x0000
85 bra.l _fpsp_operr
86 short 0x0000
87 bra.l _fpsp_ovfl
88 short 0x0000
89 bra.l _fpsp_unfl
90 short 0x0000
91 bra.l _fpsp_dz
92 short 0x0000
93 bra.l _fpsp_inex
94 short 0x0000
95 bra.l _fpsp_fline
96 short 0x0000
97 bra.l _fpsp_unsupp
98 short 0x0000
99 bra.l _fpsp_effadd
100 short 0x0000
102 space 56
104 ###############################################################
105 global _fpsp_done
106 _fpsp_done:
113 global _real_ovfl
114 _real_ovfl:
121 global _real_unfl
122 _real_unfl:
129 global _real_inex
130 _real_inex:
137 global _real_bsun
138 _real_bsun:
145 global _real_operr
146 _real_operr:
153 global _real_snan
154 _real_snan:
161 global _real_dz
162 _real_dz:
169 global _real_fline
170 _real_fline:
177 global _real_fpu_disabled
178 _real_fpu_disabled:
185 global _real_trap
186 _real_trap:
193 global _real_trace
194 _real_trace:
201 global _real_access
202 _real_access:
209 #######################################
211 global _imem_read
212 _imem_read:
219 global _dmem_read
220 _dmem_read:
227 global _dmem_write
228 _dmem_write:
235 global _imem_read_word
236 _imem_read_word:
243 global _imem_read_long
244 _imem_read_long:
251 global _dmem_read_byte
252 _dmem_read_byte:
259 global _dmem_read_word
260 _dmem_read_word:
267 global _dmem_read_long
268 _dmem_read_long:
275 global _dmem_write_byte
276 _dmem_write_byte:
283 global _dmem_write_word
284 _dmem_write_word:
291 global _dmem_write_long
292 _dmem_write_long:
299 #
300 # This file contains a set of define statements for constants
301 # in order to promote readability within the corecode itself.
302 #
396 ################################
398 # Helpful macros
443 ##################
444 # FPSR/FPCR bits #
445 ##################
468 #############################
469 # FPSR individual bit masks #
470 #############################
496 ######################################
497 # FPSR combinations used in the FPSP #
498 ######################################
499 set dzinf_mask, inf_mask+dz_mask+adz_mask
500 set opnan_mask, nan_mask+operr_mask+aiop_mask
502 set unfinx_mask, unfl_mask+inex2_mask+aunfl_mask+ainex_mask
503 set unf2inx_mask, unfl_mask+inex2_mask+ainex_mask
504 set ovfinx_mask, ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
505 set inx1a_mask, inex1_mask+ainex_mask
506 set inx2a_mask, inex2_mask+ainex_mask
507 set snaniop_mask, nan_mask+snan_mask+aiop_mask
508 set snaniop2_mask, snan_mask+aiop_mask
509 set naniop_mask, nan_mask+aiop_mask
510 set neginf_mask, neg_mask+inf_mask
511 set infaiop_mask, inf_mask+aiop_mask
512 set negz_mask, neg_mask+z_mask
513 set opaop_mask, operr_mask+aiop_mask
514 set unfl_inx_mask, unfl_mask+aunfl_mask+ainex_mask
515 set ovfl_inx_mask, ovfl_mask+aovfl_mask+ainex_mask
517 #########
518 # misc. #
519 #########
551 ###########################
552 # SPecial CONDition FLaGs #
553 ###########################
567 ##################################
568 # TRANSCENDENTAL "LAST-OP" FLAGS #
569 ##################################
575 #############
576 # CONSTANTS #
577 #############
584 TWOBYPI:
587 #########################################################################
588 # XDEF **************************************************************** #
589 # _fpsp_ovfl(): 060FPSP entry point for FP Overflow exception. #
590 # #
591 # This handler should be the first code executed upon taking the #
592 # FP Overflow exception in an operating system. #
593 # #
594 # XREF **************************************************************** #
595 # _imem_read_long() - read instruction longword #
596 # fix_skewed_ops() - adjust src operand in fsave frame #
597 # set_tag_x() - determine optype of src/dst operands #
598 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
599 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
600 # load_fpn2() - load dst operand from FP regfile #
601 # fout() - emulate an opclass 3 instruction #
602 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
603 # _fpsp_done() - "callout" for 060FPSP exit (all work done!) #
604 # _real_ovfl() - "callout" for Overflow exception enabled code #
605 # _real_inex() - "callout" for Inexact exception enabled code #
606 # _real_trace() - "callout" for Trace exception code #
607 # #
608 # INPUT *************************************************************** #
609 # - The system stack contains the FP Ovfl exception stack frame #
610 # - The fsave frame contains the source operand #
611 # #
612 # OUTPUT ************************************************************** #
613 # Overflow Exception enabled: #
614 # - The system stack is unchanged #
615 # - The fsave frame contains the adjusted src op for opclass 0,2 #
616 # Overflow Exception disabled: #
617 # - The system stack is unchanged #
618 # - The "exception present" flag in the fsave frame is cleared #
619 # #
620 # ALGORITHM *********************************************************** #
621 # On the 060, if an FP overflow is present as the result of any #
622 # instruction, the 060 will take an overflow exception whether the #
623 # exception is enabled or disabled in the FPCR. For the disabled case, #
624 # This handler emulates the instruction to determine what the correct #
625 # default result should be for the operation. This default result is #
626 # then stored in either the FP regfile, data regfile, or memory. #
627 # Finally, the handler exits through the "callout" _fpsp_done() #
628 # denoting that no exceptional conditions exist within the machine. #
629 # If the exception is enabled, then this handler must create the #
630 # exceptional operand and plave it in the fsave state frame, and store #
631 # the default result (only if the instruction is opclass 3). For #
632 # exceptions enabled, this handler must exit through the "callout" #
633 # _real_ovfl() so that the operating system enabled overflow handler #
634 # can handle this case. #
635 # Two other conditions exist. First, if overflow was disabled #
636 # but the inexact exception was enabled, this handler must exit #
637 # through the "callout" _real_inex() regardless of whether the result #
638 # was inexact. #
639 # Also, in the case of an opclass three instruction where #
640 # overflow was disabled and the trace exception was enabled, this #
641 # handler must exit through the "callout" _real_trace(). #
642 # #
643 #########################################################################
645 global _fpsp_ovfl
646 _fpsp_ovfl:
648 #$# sub.l &24,%sp # make room for src/dst
658 # the FPIAR holds the "current PC" of the faulting instruction
665 ##############################################################################
668 bne.w fovfl_out
674 # since, I believe, only NORMs and DENORMs can come through here,
675 # maybe we can avoid the subroutine call.
680 # bit five of the fp extension word separates the monadic and dyadic operations
681 # that can pass through fpsp_ovfl(). remember that fcmp, ftst, and fsincos
682 # will never take this exception.
694 fovfl_op2_done:
697 fovfl_extract:
699 #$# mov.l FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
700 #$# mov.l FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
701 #$# mov.l FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
702 #$# mov.l FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
703 #$# mov.l FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
704 #$# mov.l FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)
720 # maybe we can make these entry points ONLY the OVFL entry points of each routine.
724 # the operation has been emulated. the result is in fp0.
725 # the EXOP, if an exception occurred, is in fp1.
726 # we must save the default result regardless of whether
727 # traps are enabled or disabled.
729 bsr.l store_fpreg
731 # the exceptional possibilities we have left ourselves with are ONLY overflow
732 # and inexact. and, the inexact is such that overflow occurred and was disabled
733 # but inexact was enabled.
735 bne.b fovfl_ovfl_on
738 bne.b fovfl_inex_on
744 unlk %a6
745 #$# add.l &24,%sp
746 bra.l _fpsp_done
748 # overflow is enabled AND overflow, of course, occurred. so, we have the EXOP
749 # in fp1. now, simply jump to _real_ovfl()!
750 fovfl_ovfl_on:
761 unlk %a6
763 bra.l _real_ovfl
765 # overflow occurred but is disabled. meanwhile, inexact is enabled. therefore,
766 # we must jump to real_inex().
767 fovfl_inex_on:
780 unlk %a6
782 bra.l _real_inex
784 ########################################################################
785 fovfl_out:
788 #$# mov.l FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
789 #$# mov.l FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
790 #$# mov.l FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
792 # the src operand is definitely a NORM(!), so tag it as such
805 bsr.l fout
808 bne.w fovfl_ovfl_on
811 bne.w fovfl_inex_on
817 unlk %a6
818 #$# add.l &24,%sp
825 bra.l _real_trace
827 #########################################################################
828 # XDEF **************************************************************** #
829 # _fpsp_unfl(): 060FPSP entry point for FP Underflow exception. #
830 # #
831 # This handler should be the first code executed upon taking the #
832 # FP Underflow exception in an operating system. #
833 # #
834 # XREF **************************************************************** #
835 # _imem_read_long() - read instruction longword #
836 # fix_skewed_ops() - adjust src operand in fsave frame #
837 # set_tag_x() - determine optype of src/dst operands #
838 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
839 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
840 # load_fpn2() - load dst operand from FP regfile #
841 # fout() - emulate an opclass 3 instruction #
842 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
843 # _fpsp_done() - "callout" for 060FPSP exit (all work done!) #
844 # _real_ovfl() - "callout" for Overflow exception enabled code #
845 # _real_inex() - "callout" for Inexact exception enabled code #
846 # _real_trace() - "callout" for Trace exception code #
847 # #
848 # INPUT *************************************************************** #
849 # - The system stack contains the FP Unfl exception stack frame #
850 # - The fsave frame contains the source operand #
851 # #
852 # OUTPUT ************************************************************** #
853 # Underflow Exception enabled: #
854 # - The system stack is unchanged #
855 # - The fsave frame contains the adjusted src op for opclass 0,2 #
856 # Underflow Exception disabled: #
857 # - The system stack is unchanged #
858 # - The "exception present" flag in the fsave frame is cleared #
859 # #
860 # ALGORITHM *********************************************************** #
861 # On the 060, if an FP underflow is present as the result of any #
862 # instruction, the 060 will take an underflow exception whether the #
863 # exception is enabled or disabled in the FPCR. For the disabled case, #
864 # This handler emulates the instruction to determine what the correct #
865 # default result should be for the operation. This default result is #
866 # then stored in either the FP regfile, data regfile, or memory. #
867 # Finally, the handler exits through the "callout" _fpsp_done() #
868 # denoting that no exceptional conditions exist within the machine. #
869 # If the exception is enabled, then this handler must create the #
870 # exceptional operand and plave it in the fsave state frame, and store #
871 # the default result (only if the instruction is opclass 3). For #
872 # exceptions enabled, this handler must exit through the "callout" #
873 # _real_unfl() so that the operating system enabled overflow handler #
874 # can handle this case. #
875 # Two other conditions exist. First, if underflow was disabled #
876 # but the inexact exception was enabled and the result was inexact, #
877 # this handler must exit through the "callout" _real_inex(). #
878 # was inexact. #
879 # Also, in the case of an opclass three instruction where #
880 # underflow was disabled and the trace exception was enabled, this #
881 # handler must exit through the "callout" _real_trace(). #
882 # #
883 #########################################################################
885 global _fpsp_unfl
886 _fpsp_unfl:
888 #$# sub.l &24,%sp # make room for src/dst
898 # the FPIAR holds the "current PC" of the faulting instruction
905 ##############################################################################
908 bne.w funfl_out
918 # bit five of the fp ext word separates the monadic and dyadic operations
919 # that can pass through fpsp_unfl(). remember that fcmp, and ftst
920 # will never take this exception.
924 # now, what's left that's not dyadic is fsincos. we can distinguish it
925 # from all dyadics by the '0110xxx pattern
937 funfl_op2_done:
940 funfl_extract:
942 #$# mov.l FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
943 #$# mov.l FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
944 #$# mov.l FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
945 #$# mov.l FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
946 #$# mov.l FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
947 #$# mov.l FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)
963 # maybe we can make these entry points ONLY the OVFL entry points of each routine.
968 bsr.l store_fpreg
970 # The `060 FPU multiplier hardware is such that if the result of a
971 # multiply operation is the smallest possible normalized number
972 # (0x00000000_80000000_00000000), then the machine will take an
973 # underflow exception. Since this is incorrect, we need to check
974 # if our emulation, after re-doing the operation, decided that
975 # no underflow was called for. We do these checks only in
976 # funfl_{unfl,inex}_on() because w/ both exceptions disabled, this
977 # special case will simply exit gracefully with the correct result.
979 # the exceptional possibilities we have left ourselves with are ONLY overflow
980 # and inexact. and, the inexact is such that overflow occurred and was disabled
981 # but inexact was enabled.
983 bne.b funfl_unfl_on
985 funfl_chkinex:
987 bne.b funfl_inex_on
989 funfl_exit:
994 unlk %a6
995 #$# add.l &24,%sp
996 bra.l _fpsp_done
998 # overflow is enabled AND overflow, of course, occurred. so, we have the EXOP
999 # in fp1 (don't forget to save fp0). what to do now?
1000 # well, we simply have to get to go to _real_unfl()!
1001 funfl_unfl_on:
1003 # The `060 FPU multiplier hardware is such that if the result of a
1004 # multiply operation is the smallest possible normalized number
1005 # (0x00000000_80000000_00000000), then the machine will take an
1006 # underflow exception. Since this is incorrect, we check here to see
1007 # if our emulation, after re-doing the operation, decided that
1008 # no underflow was called for.
1010 beq.w funfl_chkinex
1012 funfl_unfl_on2:
1023 unlk %a6
1025 bra.l _real_unfl
1027 # undeflow occurred but is disabled. meanwhile, inexact is enabled. therefore,
1028 # we must jump to real_inex().
1029 funfl_inex_on:
1031 # The `060 FPU multiplier hardware is such that if the result of a
1032 # multiply operation is the smallest possible normalized number
1033 # (0x00000000_80000000_00000000), then the machine will take an
1034 # underflow exception.
1035 # But, whether bogus or not, if inexact is enabled AND it occurred,
1036 # then we have to branch to real_inex.
1039 beq.w funfl_exit
1041 funfl_inex_on2:
1054 unlk %a6
1056 bra.l _real_inex
1058 #######################################################################
1059 funfl_out:
1062 #$# mov.l FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
1063 #$# mov.l FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
1064 #$# mov.l FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
1066 # the src operand is definitely a NORM(!), so tag it as such
1079 bsr.l fout
1082 bne.w funfl_unfl_on2
1085 bne.w funfl_inex_on2
1091 unlk %a6
1092 #$# add.l &24,%sp
1099 bra.l _real_trace
1101 #########################################################################
1102 # XDEF **************************************************************** #
1103 # _fpsp_unsupp(): 060FPSP entry point for FP "Unimplemented #
1104 # Data Type" exception. #
1105 # #
1106 # This handler should be the first code executed upon taking the #
1107 # FP Unimplemented Data Type exception in an operating system. #
1108 # #
1109 # XREF **************************************************************** #
1110 # _imem_read_{word,long}() - read instruction word/longword #
1111 # fix_skewed_ops() - adjust src operand in fsave frame #
1112 # set_tag_x() - determine optype of src/dst operands #
1113 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
1114 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
1115 # load_fpn2() - load dst operand from FP regfile #
1116 # load_fpn1() - load src operand from FP regfile #
1117 # fout() - emulate an opclass 3 instruction #
1118 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
1119 # _real_inex() - "callout" to operating system inexact handler #
1120 # _fpsp_done() - "callout" for exit; work all done #
1121 # _real_trace() - "callout" for Trace enabled exception #
1122 # funimp_skew() - adjust fsave src ops to "incorrect" value #
1123 # _real_snan() - "callout" for SNAN exception #
1124 # _real_operr() - "callout" for OPERR exception #
1125 # _real_ovfl() - "callout" for OVFL exception #
1126 # _real_unfl() - "callout" for UNFL exception #
1127 # get_packed() - fetch packed operand from memory #
1128 # #
1129 # INPUT *************************************************************** #
1130 # - The system stack contains the "Unimp Data Type" stk frame #
1131 # - The fsave frame contains the ssrc op (for UNNORM/DENORM) #
1132 # #
1133 # OUTPUT ************************************************************** #
1134 # If Inexact exception (opclass 3): #
1135 # - The system stack is changed to an Inexact exception stk frame #
1136 # If SNAN exception (opclass 3): #
1137 # - The system stack is changed to an SNAN exception stk frame #
1138 # If OPERR exception (opclass 3): #
1139 # - The system stack is changed to an OPERR exception stk frame #
1140 # If OVFL exception (opclass 3): #
1141 # - The system stack is changed to an OVFL exception stk frame #
1142 # If UNFL exception (opclass 3): #
1143 # - The system stack is changed to an UNFL exception stack frame #
1144 # If Trace exception enabled: #
1145 # - The system stack is changed to a Trace exception stack frame #
1146 # Else: (normal case) #
1147 # - Correct result has been stored as appropriate #
1148 # #
1149 # ALGORITHM *********************************************************** #
1150 # Two main instruction types can enter here: (1) DENORM or UNNORM #
1151 # unimplemented data types. These can be either opclass 0,2 or 3 #
1152 # instructions, and (2) PACKED unimplemented data format instructions #
1153 # also of opclasses 0,2, or 3. #
1154 # For UNNORM/DENORM opclass 0 and 2, the handler fetches the src #
1155 # operand from the fsave state frame and the dst operand (if dyadic) #
1156 # from the FP register file. The instruction is then emulated by #
1157 # choosing an emulation routine from a table of routines indexed by #
1158 # instruction type. Once the instruction has been emulated and result #
1159 # saved, then we check to see if any enabled exceptions resulted from #
1160 # instruction emulation. If none, then we exit through the "callout" #
1161 # _fpsp_done(). If there is an enabled FP exception, then we insert #
1162 # this exception into the FPU in the fsave state frame and then exit #
1163 # through _fpsp_done(). #
1164 # PACKED opclass 0 and 2 is similar in how the instruction is #
1165 # emulated and exceptions handled. The differences occur in how the #
1166 # handler loads the packed op (by calling get_packed() routine) and #
1167 # by the fact that a Trace exception could be pending for PACKED ops. #
1168 # If a Trace exception is pending, then the current exception stack #
1169 # frame is changed to a Trace exception stack frame and an exit is #
1170 # made through _real_trace(). #
1171 # For UNNORM/DENORM opclass 3, the actual move out to memory is #
1172 # performed by calling the routine fout(). If no exception should occur #
1173 # as the result of emulation, then an exit either occurs through #
1174 # _fpsp_done() or through _real_trace() if a Trace exception is pending #
1175 # (a Trace stack frame must be created here, too). If an FP exception #
1176 # should occur, then we must create an exception stack frame of that #
1177 # type and jump to either _real_snan(), _real_operr(), _real_inex(), #
1178 # _real_unfl(), or _real_ovfl() as appropriate. PACKED opclass 3 #
1179 # emulation is performed in a similar manner. #
1180 # #
1181 #########################################################################
1183 #
1184 # (1) DENORM and UNNORM (unimplemented) data types:
1185 #
1186 # post-instruction
1187 # *****************
1188 # * EA *
1189 # pre-instruction * *
1190 # ***************** *****************
1191 # * 0x0 * 0x0dc * * 0x3 * 0x0dc *
1192 # ***************** *****************
1193 # * Next * * Next *
1194 # * PC * * PC *
1195 # ***************** *****************
1196 # * SR * * SR *
1197 # ***************** *****************
1198 #
1199 # (2) PACKED format (unsupported) opclasses two and three:
1200 # *****************
1201 # * EA *
1202 # * *
1203 # *****************
1204 # * 0x2 * 0x0dc *
1205 # *****************
1206 # * Next *
1207 # * PC *
1208 # *****************
1209 # * SR *
1210 # *****************
1211 #
1212 global _fpsp_unsupp
1213 _fpsp_unsupp:
1224 bne.b fu_s
1225 fu_u:
1228 bra.b fu_cont
1229 # if the exception is an opclass zero or two unimplemented data type
1230 # exception, then the a7' calculated here is wrong since it doesn't
1231 # stack an ea. however, we don't need an a7' for this case anyways.
1232 fu_s:
1236 fu_cont:
1238 # the FPIAR holds the "current PC" of the faulting instruction
1239 # the FPIAR should be set correctly for ALL exceptions passing through
1240 # this point.
1247 ############################
1251 # Separate opclass three (fpn-to-mem) ops since they have a different
1252 # stack frame and protocol.
1254 bne.w fu_out # yes
1256 # Separate packed opclass two instructions.
1259 beq.w fu_in_pack
1262 # I'm not sure at this point what FPSR bits are valid for this instruction.
1263 # so, since the emulation routines re-create them anyways, zero exception field
1269 # Opclass two w/ memory-to-fpn operation will have an incorrect extended
1270 # precision format if the src format was single or double and the
1271 # source data type was an INF, NAN, DENORM, or UNNORM
1273 bsr.l fix_skewed_ops
1275 # we don't know whether the src operand or the dst operand (or both) is the
1276 # UNNORM or DENORM. call the function that tags the operand type. if the
1277 # input is an UNNORM, then convert it to a NORM, DENORM, or ZERO.
1284 fu_op2:
1289 # bit five of the fp extension word separates the monadic and dyadic operations
1290 # at this point
1303 fu_op2_done:
1306 fu_extract:
1318 #
1319 # Exceptions in order of precedence:
1320 # BSUN : none
1321 # SNAN : all dyadic ops
1322 # OPERR : fsqrt(-NORM)
1323 # OVFL : all except ftst,fcmp
1324 # UNFL : all except ftst,fcmp
1325 # DZ : fdiv
1326 # INEX2 : all except ftst,fcmp
1327 # INEX1 : none (packed doesn't go through here)
1328 #
1330 # we determine the highest priority exception(if any) set by the
1331 # emulation routine that has also been enabled by the user.
1335 fu_in_cont:
1336 # fcmp and ftst do not store any result.
1345 fu_in_exit:
1351 unlk %a6
1353 bra.l _fpsp_done
1355 fu_in_ena:
1360 #
1361 # No exceptions occurred that were also enabled. Now:
1362 #
1363 # if (OVFL && ovfl_disabled && inexact_enabled) {
1364 # branch to _real_inex() (even if the result was exact!);
1365 # } else {
1366 # save the result in the proper fp reg (unless the op is fcmp or ftst);
1367 # return;
1368 # }
1369 #
1373 fu_in_ovflchk:
1376 bra.w fu_in_exc_ovfl # go insert overflow frame
1378 #
1379 # An exception occurred and that exception was enabled:
1380 #
1381 # shift enabled exception field into lo byte of d0;
1382 # if (((INEX2 || INEX1) && inex_enabled && OVFL && ovfl_disabled) ||
1383 # ((INEX2 || INEX1) && inex_enabled && UNFL && unfl_disabled)) {
1384 # /*
1385 # * this is the case where we must call _real_inex() now or else
1386 # * there will be no other way to pass it the exceptional operand
1387 # */
1388 # call _real_inex();
1389 # } else {
1390 # restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU;
1391 # }
1392 #
1393 fu_in_exc:
1398 # the enabled exception was inexact
1400 bne.w fu_in_exc_unfl # yes
1402 bne.w fu_in_exc_ovfl # yes
1404 # here, we insert the correct fsave status value into the fsave frame for the
1405 # corresponding exception. the operand in the fsave frame should be the original
1406 # src operand.
1407 fu_in_exc_exit:
1420 unlk %a6
1422 bra.l _fpsp_done
1424 tbl_except:
1428 fu_in_exc_unfl:
1430 bra.b fu_in_exc_exit
1431 fu_in_exc_ovfl:
1433 bra.b fu_in_exc_exit
1435 # If the input operand to this operation was opclass two and a single
1436 # or double precision denorm, inf, or nan, the operand needs to be
1437 # "corrected" in order to have the proper equivalent extended precision
1438 # number.
1439 global fix_skewed_ops
1440 fix_skewed_ops:
1446 rts # no
1448 fso_sgl:
1455 rts # no
1457 fso_sgl_dnrm_zero:
1460 fso_sgl_dnrm:
1461 # here, we count on norm not to alter a0...
1467 rts
1469 fso_zero:
1471 rts
1473 fso_infnan:
1476 rts
1478 fso_dbl:
1485 rts # no
1487 fso_dbl_dnrm_zero:
1492 fso_dbl_dnrm:
1493 # here, we count on norm not to alter a0...
1499 rts
1501 #################################################################
1503 # fmove out took an unimplemented data type exception.
1504 # the src operand is in FP_SRC. Call _fout() to write out the result and
1505 # to determine which exceptions, if any, to take.
1506 fu_out:
1508 # Separate packed move outs from the UNNORM and DENORM move outs.
1511 beq.w fu_out_pack
1513 beq.w fu_out_pack
1516 # I'm not sure at this point what FPSR bits are valid for this instruction.
1517 # so, since the emulation routines re-create them anyways, zero exception field.
1518 # fmove out doesn't affect ccodes.
1524 # the src can ONLY be a DENORM or an UNNORM! so, don't make any big subroutine
1525 # call here. just figure out what it is...
1535 bra.b fu_out_cont
1536 fu_out_denorm:
1538 fu_out_cont:
1548 # Exceptions in order of precedence:
1549 # BSUN : none
1550 # SNAN : none
1551 # OPERR : fmove.{b,w,l} out of large UNNORM
1552 # OVFL : fmove.{s,d}
1553 # UNFL : fmove.{s,d,x}
1554 # DZ : none
1555 # INEX2 : all
1556 # INEX1 : none (packed doesn't travel through here)
1558 # determine the highest priority exception(if any) set by the
1559 # emulation routine that has also been enabled by the user.
1561 bne.w fu_out_ena # some are enabled
1563 fu_out_done:
1567 # on extended precision opclass three instructions using pre-decrement or
1568 # post-increment addressing mode, the address register is not updated. is the
1569 # address register was the stack pointer used from user mode, then let's update
1570 # it here. if it was used from supervisor mode, then we have to handle this
1571 # as a special case.
1573 bne.b fu_out_done_s
1578 fu_out_done_cont:
1583 unlk %a6
1588 bra.l _fpsp_done
1590 # is the ea mode pre-decrement of the stack pointer from supervisor mode?
1591 # ("fmov.x fpm,-(a7)") if so,
1592 fu_out_done_s:
1594 bne.b fu_out_done_cont
1596 # the extended precision result is still in fp0. but, we need to save it
1597 # somewhere on the stack until we can copy it to its final resting place.
1598 # here, we're counting on the top of the stack to be the old place-holders
1599 # for fp0/fp1 which have already been restored. that way, we can write
1600 # over those destinations with the shifted stack frame.
1612 # now, copy the result to the proper place on the stack
1620 bne.b fu_out_trace
1622 bra.l _fpsp_done
1624 fu_out_ena:
1629 # no exceptions were set.
1630 # if a disabled overflow occurred and inexact was enabled but the result
1631 # was exact, then a branch to _real_inex() is made.
1633 beq.w fu_out_done # no
1635 fu_out_ovflchk:
1637 beq.w fu_out_done # no
1638 bra.w fu_inex # yes
1640 #
1641 # The fp move out that took the "Unimplemented Data Type" exception was
1642 # being traced. Since the stack frames are similar, get the "current" PC
1643 # from FPIAR and put it in the trace stack frame then jump to _real_trace().
1644 #
1645 # UNSUPP FRAME TRACE FRAME
1646 # ***************** *****************
1647 # * EA * * Current *
1648 # * * * PC *
1649 # ***************** *****************
1650 # * 0x3 * 0x0dc * * 0x2 * 0x024 *
1651 # ***************** *****************
1652 # * Next * * Next *
1653 # * PC * * PC *
1654 # ***************** *****************
1655 # * SR * * SR *
1656 # ***************** *****************
1657 #
1658 fu_out_trace:
1661 bra.l _real_trace
1663 # an exception occurred and that exception was enabled.
1664 fu_out_exc:
1667 # we don't mess with the existing fsave frame. just re-insert it and
1668 # jump to the "_real_{}()" handler...
1673 tbl_fu_out:
1683 # for snan,operr,ovfl,unfl, src op is still in FP_SRC so just
1684 # frestore it.
1685 fu_snan:
1695 unlk %a6
1698 bra.l _real_snan
1700 fu_operr:
1710 unlk %a6
1713 bra.l _real_operr
1715 fu_ovfl:
1727 unlk %a6
1729 bra.l _real_ovfl
1731 # underflow can happen for extended precision. extended precision opclass
1732 # three instruction exceptions don't update the stack pointer. so, if the
1733 # exception occurred from user mode, then simply update a7 and exit normally.
1734 # if the exception occurred from supervisor mode, check if
1735 fu_unfl:
1739 bne.w fu_unfl_s
1744 fu_unfl_cont:
1756 unlk %a6
1758 bra.l _real_unfl
1760 fu_unfl_s:
1762 bne.b fu_unfl_cont
1764 # the extended precision result is still in fp0. but, we need to save it
1765 # somewhere on the stack until we can copy it to its final resting place
1766 # (where the exc frame is currently). make sure it's not at the top of the
1767 # frame or it will get overwritten when the exc stack frame is shifted "down".
1786 # now, copy the result to the proper place on the stack
1793 bra.l _real_unfl
1795 # fmove in and out enter here.
1796 fu_inex:
1808 unlk %a6
1811 bra.l _real_inex
1813 #########################################################################
1814 #########################################################################
1815 fu_in_pack:
1818 # I'm not sure at this point what FPSR bits are valid for this instruction.
1819 # so, since the emulation routines re-create them anyways, zero exception field
1834 # bit five of the fp extension word separates the monadic and dyadic operations
1835 # at this point
1848 fu_op2_done_p:
1851 fu_extract_p:
1863 #
1864 # Exceptions in order of precedence:
1865 # BSUN : none
1866 # SNAN : all dyadic ops
1867 # OPERR : fsqrt(-NORM)
1868 # OVFL : all except ftst,fcmp
1869 # UNFL : all except ftst,fcmp
1870 # DZ : fdiv
1871 # INEX2 : all except ftst,fcmp
1872 # INEX1 : all
1873 #
1875 # we determine the highest priority exception(if any) set by the
1876 # emulation routine that has also been enabled by the user.
1878 bne.w fu_in_ena_p # some are enabled
1880 fu_in_cont_p:
1881 # fcmp and ftst do not store any result.
1890 fu_in_exit_p:
1893 bne.w fu_in_exit_s_p # supervisor
1898 fu_in_exit_cont_p:
1906 bne.w fu_trace_p # yes
1910 # the exception occurred in supervisor mode. check to see if the
1911 # addressing mode was (a7)+. if so, we'll need to shift the
1912 # stack frame "up".
1913 fu_in_exit_s_p:
1923 # shift the stack frame "up". we don't really care about the <ea> field.
1929 bne.w fu_trace_p # yes
1933 fu_in_ena_p:
1938 #
1939 # No exceptions occurred that were also enabled. Now:
1940 #
1941 # if (OVFL && ovfl_disabled && inexact_enabled) {
1942 # branch to _real_inex() (even if the result was exact!);
1943 # } else {
1944 # save the result in the proper fp reg (unless the op is fcmp or ftst);
1945 # return;
1946 # }
1947 #
1949 beq.w fu_in_cont_p # no
1951 fu_in_ovflchk_p:
1953 beq.w fu_in_cont_p # no
1954 bra.w fu_in_exc_ovfl_p # do _real_inex() now
1956 #
1957 # An exception occurred and that exception was enabled:
1958 #
1959 # shift enabled exception field into lo byte of d0;
1960 # if (((INEX2 || INEX1) && inex_enabled && OVFL && ovfl_disabled) ||
1961 # ((INEX2 || INEX1) && inex_enabled && UNFL && unfl_disabled)) {
1962 # /*
1963 # * this is the case where we must call _real_inex() now or else
1964 # * there will be no other way to pass it the exceptional operand
1965 # */
1966 # call _real_inex();
1967 # } else {
1968 # restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU;
1969 # }
1970 #
1971 fu_in_exc_p:
1976 # the enabled exception was inexact
1978 bne.w fu_in_exc_unfl_p # yes
1980 bne.w fu_in_exc_ovfl_p # yes
1982 # here, we insert the correct fsave status value into the fsave frame for the
1983 # corresponding exception. the operand in the fsave frame should be the original
1984 # src operand.
1985 # as a reminder for future predicted pain and agony, we are passing in fsave the
1986 # "non-skewed" operand for cases of sgl and dbl src INFs,NANs, and DENORMs.
1987 # this is INCORRECT for enabled SNAN which would give to the user the skewed SNAN!!!
1988 fu_in_exc_exit_p:
1990 bne.w fu_in_exc_exit_s_p # supervisor
1995 fu_in_exc_exit_cont_p:
2004 unlk %a6
2007 bne.w fu_trace_p # yes
2009 bra.l _fpsp_done
2011 tbl_except_p:
2015 fu_in_exc_ovfl_p:
2017 bra.w fu_in_exc_exit_p
2019 fu_in_exc_unfl_p:
2021 bra.w fu_in_exc_exit_p
2023 fu_in_exc_exit_s_p:
2025 beq.b fu_in_exc_exit_cont_p
2037 # shift stack frame "up". who cares about <ea> field.
2047 #
2048 # The opclass two PACKED instruction that took an "Unimplemented Data Type"
2049 # exception was being traced. Make the "current" PC the FPIAR and put it in the
2050 # trace stack frame then jump to _real_trace().
2051 #
2052 # UNSUPP FRAME TRACE FRAME
2053 # ***************** *****************
2054 # * EA * * Current *
2055 # * * * PC *
2056 # ***************** *****************
2057 # * 0x2 * 0x0dc * * 0x2 * 0x024 *
2058 # ***************** *****************
2059 # * Next * * Next *
2060 # * PC * * PC *
2061 # ***************** *****************
2062 # * SR * * SR *
2063 # ***************** *****************
2064 fu_trace_p:
2068 bra.l _real_trace
2070 #########################################################
2071 #########################################################
2072 fu_out_pack:
2075 # I'm not sure at this point what FPSR bits are valid for this instruction.
2076 # so, since the emulation routines re-create them anyways, zero exception field.
2077 # fmove out doesn't affect ccodes.
2084 bsr.l load_fpn1
2086 # unlike other opclass 3, unimplemented data type exceptions, packed must be
2087 # able to detect all operand types.
2094 fu_op2_p:
2105 # Exceptions in order of precedence:
2106 # BSUN : no
2107 # SNAN : yes
2108 # OPERR : if ((k_factor > +17) || (dec. exp exceeds 3 digits))
2109 # OVFL : no
2110 # UNFL : no
2111 # DZ : no
2112 # INEX2 : yes
2113 # INEX1 : no
2115 # determine the highest priority exception(if any) set by the
2116 # emulation routine that has also been enabled by the user.
2118 bne.w fu_out_ena_p # some are enabled
2120 fu_out_exit_p:
2129 fu_out_exit_cont_p:
2137 bne.w fu_trace_p # yes
2141 # the exception occurred in supervisor mode. check to see if the
2142 # addressing mode was -(a7). if so, we'll need to shift the
2143 # stack frame "down".
2144 fu_out_exit_s_p:
2157 # now, copy the result to the proper place on the stack
2165 bne.w fu_trace_p
2167 bra.l _fpsp_done
2169 fu_out_ena_p:
2172 beq.w fu_out_exit_p
2176 # an exception occurred and that exception was enabled.
2177 # the only exception possible on packed move out are INEX, OPERR, and SNAN.
2178 fu_out_exc_p:
2180 bgt.w fu_inex_p2
2181 beq.w fu_operr_p
2183 fu_snan_p:
2185 bne.b fu_snan_s_p
2189 bra.w fu_snan
2191 fu_snan_s_p:
2193 bne.w fu_snan
2195 # the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
2196 # the strategy is to move the exception frame "down" 12 bytes. then, we
2197 # can store the default result where the exception frame was.
2213 # now, we copy the default result to it's proper location
2221 bra.l _real_snan
2223 fu_operr_p:
2225 bne.w fu_operr_p_s
2229 bra.w fu_operr
2231 fu_operr_p_s:
2233 bne.w fu_operr
2235 # the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
2236 # the strategy is to move the exception frame "down" 12 bytes. then, we
2237 # can store the default result where the exception frame was.
2253 # now, we copy the default result to it's proper location
2261 bra.l _real_operr
2263 fu_inex_p2:
2265 bne.w fu_inex_s_p2
2269 bra.w fu_inex
2271 fu_inex_s_p2:
2273 bne.w fu_inex
2275 # the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
2276 # the strategy is to move the exception frame "down" 12 bytes. then, we
2277 # can store the default result where the exception frame was.
2293 # now, we copy the default result to it's proper location
2301 bra.l _real_inex
2303 #########################################################################
2305 #
2306 # if we're stuffing a source operand back into an fsave frame then we
2307 # have to make sure that for single or double source operands that the
2308 # format stuffed is as weird as the hardware usually makes it.
2309 #
2310 global funimp_skew
2311 funimp_skew:
2317 rts
2319 funimp_skew_sgl:
2322 beq.b funimp_skew_sgl_not
2324 bgt.b funimp_skew_sgl_not
2333 funimp_skew_sgl_not:
2334 rts
2336 funimp_skew_dbl:
2339 beq.b funimp_skew_dbl_not
2341 bgt.b funimp_skew_dbl_not
2354 fss_dbl_denorm_done:
2357 funimp_skew_dbl_not:
2358 rts
2360 #########################################################################
2361 global _mem_write2
2362 _mem_write2:
2364 beq.l _dmem_write
2369 rts
2371 #########################################################################
2372 # XDEF **************************************************************** #
2373 # _fpsp_effadd(): 060FPSP entry point for FP "Unimplemented #
2374 # effective address" exception. #
2375 # #
2376 # This handler should be the first code executed upon taking the #
2377 # FP Unimplemented Effective Address exception in an operating #
2378 # system. #
2379 # #
2380 # XREF **************************************************************** #
2381 # _imem_read_long() - read instruction longword #
2382 # fix_skewed_ops() - adjust src operand in fsave frame #
2383 # set_tag_x() - determine optype of src/dst operands #
2384 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
2385 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
2386 # load_fpn2() - load dst operand from FP regfile #
2387 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
2388 # decbin() - convert packed data to FP binary data #
2389 # _real_fpu_disabled() - "callout" for "FPU disabled" exception #
2390 # _real_access() - "callout" for access error exception #
2391 # _mem_read() - read extended immediate operand from memory #
2392 # _fpsp_done() - "callout" for exit; work all done #
2393 # _real_trace() - "callout" for Trace enabled exception #
2394 # fmovm_dynamic() - emulate dynamic fmovm instruction #
2395 # fmovm_ctrl() - emulate fmovm control instruction #
2396 # #
2397 # INPUT *************************************************************** #
2398 # - The system stack contains the "Unimplemented <ea>" stk frame #
2399 # #
2400 # OUTPUT ************************************************************** #
2401 # If access error: #
2402 # - The system stack is changed to an access error stack frame #
2403 # If FPU disabled: #
2404 # - The system stack is changed to an FPU disabled stack frame #
2405 # If Trace exception enabled: #
2406 # - The system stack is changed to a Trace exception stack frame #
2407 # Else: (normal case) #
2408 # - None (correct result has been stored as appropriate) #
2409 # #
2410 # ALGORITHM *********************************************************** #
2411 # This exception handles 3 types of operations: #
2412 # (1) FP Instructions using extended precision or packed immediate #
2413 # addressing mode. #
2414 # (2) The "fmovm.x" instruction w/ dynamic register specification. #
2415 # (3) The "fmovm.l" instruction w/ 2 or 3 control registers. #
2416 # #
2417 # For immediate data operations, the data is read in w/ a #
2418 # _mem_read() "callout", converted to FP binary (if packed), and used #
2419 # as the source operand to the instruction specified by the instruction #
2420 # word. If no FP exception should be reported ads a result of the #
2421 # emulation, then the result is stored to the destination register and #
2422 # the handler exits through _fpsp_done(). If an enabled exc has been #
2423 # signalled as a result of emulation, then an fsave state frame #
2424 # corresponding to the FP exception type must be entered into the 060 #
2425 # FPU before exiting. In either the enabled or disabled cases, we #
2426 # must also check if a Trace exception is pending, in which case, we #
2427 # must create a Trace exception stack frame from the current exception #
2428 # stack frame. If no Trace is pending, we simply exit through #
2429 # _fpsp_done(). #
2430 # For "fmovm.x", call the routine fmovm_dynamic() which will #
2431 # decode and emulate the instruction. No FP exceptions can be pending #
2432 # as a result of this operation emulation. A Trace exception can be #
2433 # pending, though, which means the current stack frame must be changed #
2434 # to a Trace stack frame and an exit made through _real_trace(). #
2435 # For the case of "fmovm.x Dn,-(a7)", where the offending instruction #
2436 # was executed from supervisor mode, this handler must store the FP #
2437 # register file values to the system stack by itself since #
2438 # fmovm_dynamic() can't handle this. A normal exit is made through #
2439 # fpsp_done(). #
2440 # For "fmovm.l", fmovm_ctrl() is used to emulate the instruction. #
2441 # Again, a Trace exception may be pending and an exit made through #
2442 # _real_trace(). Else, a normal exit is made through _fpsp_done(). #
2443 # #
2444 # Before any of the above is attempted, it must be checked to #
2445 # see if the FPU is disabled. Since the "Unimp <ea>" exception is taken #
2446 # before the "FPU disabled" exception, but the "FPU disabled" exception #
2447 # has higher priority, we check the disabled bit in the PCR. If set, #
2448 # then we must create an 8 word "FPU disabled" exception stack frame #
2449 # from the current 4 word exception stack frame. This includes #
2450 # reproducing the effective address of the instruction to put on the #
2451 # new stack frame. #
2452 # #
2453 # In the process of all emulation work, if a _mem_read() #
2454 # "callout" returns a failing result indicating an access error, then #
2455 # we must create an access error stack frame from the current stack #
2456 # frame. This information includes a faulting address and a fault- #
2457 # status-longword. These are created within this handler. #
2458 # #
2459 #########################################################################
2461 global _fpsp_effadd
2462 _fpsp_effadd:
2464 # This exception type takes priority over the "Line F Emulator"
2465 # exception. Therefore, the FPU could be disabled when entering here.
2466 # So, we must check to see if it's disabled and handle that case separately.
2470 bne.w iea_disabled # yes
2479 # PC of instruction that took the exception is the PC in the frame
2487 #########################################################################
2490 bmi.w iea_fmovm # yes
2492 #
2493 # here, we will have:
2494 # fabs fdabs fsabs facos fmod
2495 # fadd fdadd fsadd fasin frem
2496 # fcmp fatan fscale
2497 # fdiv fddiv fsdiv fatanh fsin
2498 # fint fcos fsincos
2499 # fintrz fcosh fsinh
2500 # fmove fdmove fsmove fetox ftan
2501 # fmul fdmul fsmul fetoxm1 ftanh
2502 # fneg fdneg fsneg fgetexp ftentox
2503 # fsgldiv fgetman ftwotox
2504 # fsglmul flog10
2505 # fsqrt flog2
2506 # fsub fdsub fssub flogn
2507 # ftst flognp1
2508 # which can all use f<op>.{x,p}
2509 # so, now it's immediate data extended precision AND PACKED FORMAT!
2510 #
2511 iea_op:
2524 bne.w iea_iacc # yes
2526 bra.b iea_op_setsrc
2528 iea_op_pack:
2536 bne.w iea_iacc # yes
2538 # The packed operand is an INF or a NAN if the exponent field is all ones.
2543 # The packed operand is a zero if the mantissa is all zero, else it's
2544 # a normal packed op.
2552 iea_op_gp_not_spec:
2557 iea_op_setsrc:
2560 # FP_SRC now holds the src operand.
2568 iea_op_getdst:
2576 iea_op_loaddst:
2587 bra.b iea_op_extract
2589 # the operation is fsincos, ftst, or fcmp. only fcmp is dyadic
2590 iea_op_spec:
2593 # now, we're left with ftst and fcmp. so, first let's tag them so that they don't
2594 # store a result. then, only fcmp will branch back and pick up a dst operand.
2599 iea_op_extract:
2615 #
2616 # Exceptions in order of precedence:
2617 # BSUN : none
2618 # SNAN : all operations
2619 # OPERR : all reg-reg or mem-reg operations that can normally operr
2620 # OVFL : same as OPERR
2621 # UNFL : same as OPERR
2622 # DZ : same as OPERR
2623 # INEX2 : same as OPERR
2624 # INEX1 : all packed immediate operations
2625 #
2627 # we determine the highest priority exception(if any) set by the
2628 # emulation routine that has also been enabled by the user.
2632 # now, we save the result, unless, of course, the operation was ftst or fcmp.
2633 # these don't save results.
2634 iea_op_save:
2638 iea_op_store:
2642 iea_op_exit1:
2653 bne.w iea_op_trace # yes
2657 iea_op_ena:
2662 # no exception occurred. now, did a disabled, exact overflow occur with inexact
2663 # enabled? if so, then we have to stuff an overflow frame into the FPU.
2665 beq.b iea_op_save
2667 iea_op_ovfl:
2672 # an enabled exception occurred. we have to insert the exception type back into
2673 # the machine.
2674 iea_op_exc:
2679 # the enabled exception was inexact. so, if it occurs with an overflow
2680 # or underflow that was disabled, then we have to force an overflow or
2681 # underflow frame.
2687 iea_op_exc_force:
2691 tbl_iea_except:
2695 iea_op_exc_ovfl:
2697 bra.b iea_op_exit2
2699 iea_op_exc_unfl:
2702 iea_op_exit2:
2719 #
2720 # The opclass two instruction that took an "Unimplemented Effective Address"
2721 # exception was being traced. Make the "current" PC the FPIAR and put it in
2722 # the trace stack frame then jump to _real_trace().
2723 #
2724 # UNIMP EA FRAME TRACE FRAME
2725 # ***************** *****************
2726 # * 0x0 * 0x0f0 * * Current *
2727 # ***************** * PC *
2728 # * Current * *****************
2729 # * PC * * 0x2 * 0x024 *
2730 # ***************** *****************
2731 # * SR * * Next *
2732 # ***************** * PC *
2733 # *****************
2734 # * SR *
2735 # *****************
2736 iea_op_trace:
2742 bra.l _real_trace
2744 #########################################################################
2745 iea_fmovm:
2747 beq.w iea_fmovm_ctrl
2749 iea_fmovm_data:
2752 bne.b iea_fmovm_data_s
2754 iea_fmovm_data_u:
2760 bra.w iea_fmovm_exit
2762 iea_fmovm_data_s:
2769 beq.w iea_fmovm_data_predec
2771 bne.w iea_fmovm_exit
2773 # right now, d0 = the size.
2774 # the data has been fetched from the supervisor stack, but we have not
2775 # incremented the stack pointer by the appropriate number of bytes.
2776 # do it here.
2777 iea_fmovm_data_postinc:
2779 bne.b iea_fmovm_data_pi_trace
2792 unlk %a6
2794 bra.l _fpsp_done
2796 iea_fmovm_data_pi_trace:
2809 unlk %a6
2811 bra.l _real_trace
2813 # right now, d1 = size and d0 = the strg.
2814 iea_fmovm_data_predec:
2832 beq.b iea_fmovm_data_p2
2840 bra.b iea_fmovm_data_p3
2842 iea_fmovm_data_p2:
2849 iea_fmovm_data_p3:
2854 bpl.b fm_1
2857 fm_1:
2859 bpl.b fm_2
2862 fm_2:
2864 bpl.b fm_3
2867 fm_3:
2869 bpl.b fm_4
2872 fm_4:
2874 bpl.b fm_5
2877 fm_5:
2879 bpl.b fm_6
2882 fm_6:
2884 bpl.b fm_7
2887 fm_7:
2889 bpl.b fm_end
2891 fm_end:
2898 beq.l _fpsp_done
2899 bra.l _real_trace
2901 #########################################################################
2902 iea_fmovm_ctrl:
2906 iea_fmovm_exit:
2920 #
2921 # The control reg instruction that took an "Unimplemented Effective Address"
2922 # exception was being traced. The "Current PC" for the trace frame is the
2923 # PC stacked for Unimp EA. The "Next PC" is in EXC_EXTWPTR.
2924 # After fixing the stack frame, jump to _real_trace().
2925 #
2926 # UNIMP EA FRAME TRACE FRAME
2927 # ***************** *****************
2928 # * 0x0 * 0x0f0 * * Current *
2929 # ***************** * PC *
2930 # * Current * *****************
2931 # * PC * * 0x2 * 0x024 *
2932 # ***************** *****************
2933 # * SR * * Next *
2934 # ***************** * PC *
2935 # *****************
2936 # * SR *
2937 # *****************
2938 # this ain't a pretty solution, but it works:
2939 # -restore a6 (not with unlk)
2940 # -shift stack frame down over where old a6 used to be
2941 # -add LOCAL_SIZE to stack pointer
2942 iea_fmovm_trace:
2950 bra.l _real_trace
2952 #########################################################################
2953 # The FPU is disabled and so we should really have taken the "Line
2954 # F Emulator" exception. So, here we create an 8-word stack frame
2955 # from our 4-word stack frame. This means we must calculate the length
2956 # of the faulting instruction to get the "next PC". This is trivial for
2957 # immediate operands but requires some extra work for fmovm dynamic
2958 # which can use most addressing modes.
2959 iea_disabled:
2966 # PC of instruction that took the exception is the PC in the frame
2975 # instruction is using an extended precision immediate operand. therefore,
2976 # the total instruction length is 16 bytes.
2977 iea_dis_immed:
2979 bra.b iea_dis_cont
2980 iea_dis_fmovm:
2983 # the instruction is a fmovm.l with 2 or 3 registers.
2987 bne.b iea_dis_cont
2989 bra.b iea_dis_cont
2990 # the instruction is an fmovm.x dynamic which can use many addressing
2991 # modes and thus can have several different total instruction lengths.
2992 # call fmovm_calc_ea which will go through the ea calc process and,
2993 # as a by-product, will tell us how long the instruction is.
2994 iea_dis_fmovm_data:
2996 bsr.l fmovm_calc_ea
2999 iea_dis_cont:
3004 unlk %a6
3006 # here, we actually create the 8-word frame from the 4-word frame,
3007 # with the "next PC" as additional info.
3008 # the <ea> field is let as undefined.
3020 bra.l _real_fpu_disabled
3022 ##########
3024 iea_iacc:
3027 bne.b iea_iacc_cont
3030 iea_iacc_cont:
3033 unlk %a6
3042 iea_acc_done:
3047 iea_acc_done2:
3048 bra.l _real_access
3050 iea_dacc:
3055 bne.b iea_dacc_cont
3058 iea_dacc_cont:
3071 bra.b iea_acc_done
3073 #########################################################################
3074 # XDEF **************************************************************** #
3075 # _fpsp_operr(): 060FPSP entry point for FP Operr exception. #
3076 # #
3077 # This handler should be the first code executed upon taking the #
3078 # FP Operand Error exception in an operating system. #
3079 # #
3080 # XREF **************************************************************** #
3081 # _imem_read_long() - read instruction longword #
3082 # fix_skewed_ops() - adjust src operand in fsave frame #
3083 # _real_operr() - "callout" to operating system operr handler #
3084 # _dmem_write_{byte,word,long}() - store data to mem (opclass 3) #
3085 # store_dreg_{b,w,l}() - store data to data regfile (opclass 3) #
3086 # facc_out_{b,w,l}() - store to memory took access error (opcl 3) #
3087 # #
3088 # INPUT *************************************************************** #
3089 # - The system stack contains the FP Operr exception frame #
3090 # - The fsave frame contains the source operand #
3091 # #
3092 # OUTPUT ************************************************************** #
3093 # No access error: #
3094 # - The system stack is unchanged #
3095 # - The fsave frame contains the adjusted src op for opclass 0,2 #
3096 # #
3097 # ALGORITHM *********************************************************** #
3098 # In a system where the FP Operr exception is enabled, the goal #
3099 # is to get to the handler specified at _real_operr(). But, on the 060, #
3100 # for opclass zero and two instruction taking this exception, the #
3101 # input operand in the fsave frame may be incorrect for some cases #
3102 # and needs to be corrected. This handler calls fix_skewed_ops() to #
3103 # do just this and then exits through _real_operr(). #
3104 # For opclass 3 instructions, the 060 doesn't store the default #
3105 # operr result out to memory or data register file as it should. #
3106 # This code must emulate the move out before finally exiting through #
3107 # _real_inex(). The move out, if to memory, is performed using #
3108 # _mem_write() "callout" routines that may return a failing result. #
3109 # In this special case, the handler must exit through facc_out() #
3110 # which creates an access error stack frame from the current operr #
3111 # stack frame. #
3112 # #
3113 #########################################################################
3115 global _fpsp_operr
3116 _fpsp_operr:
3126 # the FPIAR holds the "current PC" of the faulting instruction
3134 ##############################################################################
3140 # here, we simply see if the operand in the fsave frame needs to be "unskewed".
3141 # this would be the case for opclass two operations with a source infinity or
3142 # denorm operand in the sgl or dbl format. NANs also become skewed, but can't
3143 # cause an operr so we don't need to check for them here.
3147 foperr_exit:
3154 unlk %a6
3155 bra.l _real_operr
3157 ########################################################################
3159 #
3160 # the hardware does not save the default result to memory on enabled
3161 # operand error exceptions. we do this here before passing control to
3162 # the user operand error handler.
3163 #
3164 # byte, word, and long destination format operations can pass
3165 # through here. we simply need to test the sign of the src
3166 # operand and save the appropriate minimum or maximum integer value
3167 # to the effective address as pointed to by the stacked effective address.
3168 #
3169 # although packed opclass three operations can take operand error
3170 # exceptions, they won't pass through here since they are caught
3171 # first by the unsupported data format exception handler. that handler
3172 # sends them directly to _real_operr() if necessary.
3173 #
3174 foperr_out:
3179 bne.b foperr_out_not_qnan
3180 # the operand is either an infinity or a QNAN.
3182 bne.b foperr_out_qnan
3185 beq.b foperr_out_not_qnan
3186 foperr_out_qnan:
3188 bra.b foperr_out_jmp
3190 foperr_out_not_qnan:
3193 bpl.b foperr_out_not_qnan2
3195 foperr_out_not_qnan2:
3198 foperr_out_jmp:
3204 tbl_operr:
3214 foperr_out_b:
3224 bra.w foperr_exit
3225 foperr_out_b_save_dn:
3228 bra.w foperr_exit
3230 foperr_out_w:
3240 bra.w foperr_exit
3241 foperr_out_w_save_dn:
3244 bra.w foperr_exit
3246 foperr_out_l:
3256 bra.w foperr_exit
3257 foperr_out_l_save_dn:
3260 bra.w foperr_exit
3262 #########################################################################
3263 # XDEF **************************************************************** #
3264 # _fpsp_snan(): 060FPSP entry point for FP SNAN exception. #
3265 # #
3266 # This handler should be the first code executed upon taking the #
3267 # FP Signalling NAN exception in an operating system. #
3268 # #
3269 # XREF **************************************************************** #
3270 # _imem_read_long() - read instruction longword #
3271 # fix_skewed_ops() - adjust src operand in fsave frame #
3272 # _real_snan() - "callout" to operating system SNAN handler #
3273 # _dmem_write_{byte,word,long}() - store data to mem (opclass 3) #
3274 # store_dreg_{b,w,l}() - store data to data regfile (opclass 3) #
3275 # facc_out_{b,w,l,d,x}() - store to mem took acc error (opcl 3) #
3276 # _calc_ea_fout() - fix An if <ea> is -() or ()+; also get <ea> #
3277 # #
3278 # INPUT *************************************************************** #
3279 # - The system stack contains the FP SNAN exception frame #
3280 # - The fsave frame contains the source operand #
3281 # #
3282 # OUTPUT ************************************************************** #
3283 # No access error: #
3284 # - The system stack is unchanged #
3285 # - The fsave frame contains the adjusted src op for opclass 0,2 #
3286 # #
3287 # ALGORITHM *********************************************************** #
3288 # In a system where the FP SNAN exception is enabled, the goal #
3289 # is to get to the handler specified at _real_snan(). But, on the 060, #
3290 # for opclass zero and two instructions taking this exception, the #
3291 # input operand in the fsave frame may be incorrect for some cases #
3292 # and needs to be corrected. This handler calls fix_skewed_ops() to #
3293 # do just this and then exits through _real_snan(). #
3294 # For opclass 3 instructions, the 060 doesn't store the default #
3295 # SNAN result out to memory or data register file as it should. #
3296 # This code must emulate the move out before finally exiting through #
3297 # _real_snan(). The move out, if to memory, is performed using #
3298 # _mem_write() "callout" routines that may return a failing result. #
3299 # In this special case, the handler must exit through facc_out() #
3300 # which creates an access error stack frame from the current SNAN #
3301 # stack frame. #
3302 # For the case of an extended precision opclass 3 instruction, #
3303 # if the effective addressing mode was -() or ()+, then the address #
3304 # register must get updated by calling _calc_ea_fout(). If the <ea> #
3305 # was -(a7) from supervisor mode, then the exception frame currently #
3306 # on the system stack must be carefully moved "down" to make room #
3307 # for the operand being moved. #
3308 # #
3309 #########################################################################
3311 global _fpsp_snan
3312 _fpsp_snan:
3322 # the FPIAR holds the "current PC" of the faulting instruction
3330 ##############################################################################
3333 bne.w fsnan_out # fmove out
3336 # here, we simply see if the operand in the fsave frame needs to be "unskewed".
3337 # this would be the case for opclass two operations with a source infinity or
3338 # denorm operand in the sgl or dbl format. NANs also become skewed and must be
3339 # fixed here.
3343 fsnan_exit:
3350 unlk %a6
3351 bra.l _real_snan
3353 ########################################################################
3355 #
3356 # the hardware does not save the default result to memory on enabled
3357 # snan exceptions. we do this here before passing control to
3358 # the user snan handler.
3359 #
3360 # byte, word, long, and packed destination format operations can pass
3361 # through here. since packed format operations already were handled by
3362 # fpsp_unsupp(), then we need to do nothing else for them here.
3363 # for byte, word, and long, we simply need to test the sign of the src
3364 # operand and save the appropriate minimum or maximum integer value
3365 # to the effective address as pointed to by the stacked effective address.
3366 #
3367 fsnan_out:
3374 tbl_snan:
3384 fsnan_out_b:
3395 bra.w fsnan_exit
3396 fsnan_out_b_dn:
3399 bra.w fsnan_exit
3401 fsnan_out_w:
3412 bra.w fsnan_exit
3413 fsnan_out_w_dn:
3416 bra.w fsnan_exit
3418 fsnan_out_l:
3429 bra.w fsnan_exit
3430 fsnan_out_l_dn:
3433 bra.w fsnan_exit
3435 fsnan_out_s:
3450 bra.w fsnan_exit
3451 fsnan_out_d_dn:
3462 bra.w fsnan_exit
3464 fsnan_out_d:
3488 bra.w fsnan_exit
3490 # for extended precision, if the addressing mode is pre-decrement or
3491 # post-increment, then the address register did not get updated.
3492 # in addition, for pre-decrement, the stacked <ea> is incorrect.
3493 fsnan_out_x:
3518 fsnan_out_x_save:
3526 bra.w fsnan_exit
3528 fsnan_out_x_s:
3540 # the operation was "fmove.x SNAN,-(a7)" from supervisor mode.
3559 bra.l _real_snan
3561 #########################################################################
3562 # XDEF **************************************************************** #
3563 # _fpsp_inex(): 060FPSP entry point for FP Inexact exception. #
3564 # #
3565 # This handler should be the first code executed upon taking the #
3566 # FP Inexact exception in an operating system. #
3567 # #
3568 # XREF **************************************************************** #
3569 # _imem_read_long() - read instruction longword #
3570 # fix_skewed_ops() - adjust src operand in fsave frame #
3571 # set_tag_x() - determine optype of src/dst operands #
3572 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
3573 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
3574 # load_fpn2() - load dst operand from FP regfile #
3575 # smovcr() - emulate an "fmovcr" instruction #
3576 # fout() - emulate an opclass 3 instruction #
3577 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
3578 # _real_inex() - "callout" to operating system inexact handler #
3579 # #
3580 # INPUT *************************************************************** #
3581 # - The system stack contains the FP Inexact exception frame #
3582 # - The fsave frame contains the source operand #
3583 # #
3584 # OUTPUT ************************************************************** #
3585 # - The system stack is unchanged #
3586 # - The fsave frame contains the adjusted src op for opclass 0,2 #
3587 # #
3588 # ALGORITHM *********************************************************** #
3589 # In a system where the FP Inexact exception is enabled, the goal #
3590 # is to get to the handler specified at _real_inex(). But, on the 060, #
3591 # for opclass zero and two instruction taking this exception, the #
3592 # hardware doesn't store the correct result to the destination FP #
3593 # register as did the '040 and '881/2. This handler must emulate the #
3594 # instruction in order to get this value and then store it to the #
3595 # correct register before calling _real_inex(). #
3596 # For opclass 3 instructions, the 060 doesn't store the default #
3597 # inexact result out to memory or data register file as it should. #
3598 # This code must emulate the move out by calling fout() before finally #
3599 # exiting through _real_inex(). #
3600 # #
3601 #########################################################################
3603 global _fpsp_inex
3604 _fpsp_inex:
3614 # the FPIAR holds the "current PC" of the faulting instruction
3622 ##############################################################################
3625 bne.w finex_out # fmove out
3628 # the hardware, for "fabs" and "fneg" w/ a long source format, puts the
3629 # longword integer directly into the upper longword of the mantissa along
3630 # w/ an exponent value of 0x401e. we convert this to extended precision here.
3640 finex_cont:
3644 # Here, we zero the ccode and exception byte field since we're going to
3645 # emulate the whole instruction. Notice, though, that we don't kill the
3646 # INEX1 bit. This is because a packed op has long since been converted
3647 # to extended before arriving here. Therefore, we need to retain the
3648 # INEX1 bit from when the operand was first converted.
3656 beq.w finex_fmovcr # yes
3662 # bits four and five of the fp extension word separate the monadic and dyadic
3663 # operations that can pass through fpsp_inex(). remember that fcmp and ftst
3664 # will never take this exception, but fsincos will.
3679 finex_op2_done:
3682 finex_extract:
3695 # the operation has been emulated. the result is in fp0.
3696 finex_save:
3698 bsr.l store_fpreg
3700 finex_exit:
3707 unlk %a6
3708 bra.l _real_inex
3710 finex_fmovcr:
3715 bsr.l smovcr
3716 bra.b finex_save
3718 ########################################################################
3720 #
3721 # the hardware does not save the default result to memory on enabled
3722 # inexact exceptions. we do this here before passing control to
3723 # the user inexact handler.
3724 #
3725 # byte, word, and long destination format operations can pass
3726 # through here. so can double and single precision.
3727 # although packed opclass three operations can take inexact
3728 # exceptions, they won't pass through here since they are caught
3729 # first by the unsupported data format exception handler. that handler
3730 # sends them directly to _real_inex() if necessary.
3731 #
3732 finex_out:
3745 bra.b finex_exit
3747 #########################################################################
3748 # XDEF **************************************************************** #
3749 # _fpsp_dz(): 060FPSP entry point for FP DZ exception. #
3750 # #
3751 # This handler should be the first code executed upon taking #
3752 # the FP DZ exception in an operating system. #
3753 # #
3754 # XREF **************************************************************** #
3755 # _imem_read_long() - read instruction longword from memory #
3756 # fix_skewed_ops() - adjust fsave operand #
3757 # _real_dz() - "callout" exit point from FP DZ handler #
3758 # #
3759 # INPUT *************************************************************** #
3760 # - The system stack contains the FP DZ exception stack. #
3761 # - The fsave frame contains the source operand. #
3762 # #
3763 # OUTPUT ************************************************************** #
3764 # - The system stack contains the FP DZ exception stack. #
3765 # - The fsave frame contains the adjusted source operand. #
3766 # #
3767 # ALGORITHM *********************************************************** #
3768 # In a system where the DZ exception is enabled, the goal is to #
3769 # get to the handler specified at _real_dz(). But, on the 060, when the #
3770 # exception is taken, the input operand in the fsave state frame may #
3771 # be incorrect for some cases and need to be adjusted. So, this package #
3772 # adjusts the operand using fix_skewed_ops() and then branches to #
3773 # _real_dz(). #
3774 # #
3775 #########################################################################
3777 global _fpsp_dz
3778 _fpsp_dz:
3788 # the FPIAR holds the "current PC" of the faulting instruction
3796 ##############################################################################
3799 # here, we simply see if the operand in the fsave frame needs to be "unskewed".
3800 # this would be the case for opclass two operations with a source zero
3801 # in the sgl or dbl format.
3805 fdz_exit:
3812 unlk %a6
3813 bra.l _real_dz
3815 #########################################################################
3816 # XDEF **************************************************************** #
3817 # _fpsp_fline(): 060FPSP entry point for "Line F emulator" exc. #
3818 # #
3819 # This handler should be the first code executed upon taking the #
3820 # "Line F Emulator" exception in an operating system. #
3821 # #
3822 # XREF **************************************************************** #
3823 # _fpsp_unimp() - handle "FP Unimplemented" exceptions #
3824 # _real_fpu_disabled() - handle "FPU disabled" exceptions #
3825 # _real_fline() - handle "FLINE" exceptions #
3826 # _imem_read_long() - read instruction longword #
3827 # #
3828 # INPUT *************************************************************** #
3829 # - The system stack contains a "Line F Emulator" exception #
3830 # stack frame. #
3831 # #
3832 # OUTPUT ************************************************************** #
3833 # - The system stack is unchanged #
3834 # #
3835 # ALGORITHM *********************************************************** #
3836 # When a "Line F Emulator" exception occurs, there are 3 possible #
3837 # exception types, denoted by the exception stack frame format number: #
3838 # (1) FPU unimplemented instruction (6 word stack frame) #
3839 # (2) FPU disabled (8 word stack frame) #
3840 # (3) Line F (4 word stack frame) #
3841 # #
3842 # This module determines which and forks the flow off to the #
3843 # appropriate "callout" (for "disabled" and "Line F") or to the #
3844 # correct emulation code (for "FPU unimplemented"). #
3845 # This code also must check for "fmovecr" instructions w/ a #
3846 # non-zero <ea> field. These may get flagged as "Line F" but should #
3847 # really be flagged as "FPU Unimplemented". (This is a "feature" on #
3848 # the '060. #
3849 # #
3850 #########################################################################
3852 global _fpsp_fline
3853 _fpsp_fline:
3855 # check to see if this exception is a "FP Unimplemented Instruction"
3856 # exception. if so, branch directly to that handler's entry point.
3858 beq.l _fpsp_unimp
3860 # check to see if the FPU is disabled. if so, jump to the OS entry
3861 # point for that condition.
3863 beq.l _real_fpu_disabled
3865 # the exception was an "F-Line Illegal" exception. we check to see
3866 # if the F-Line instruction is an "fmovecr" w/ a non-zero <ea>. if
3867 # so, convert the F-Line exception stack frame to an FP Unimplemented
3868 # Instruction exception stack frame else branch to the OS entry
3869 # point for the F-Line exception handler.
3887 # it's an fmovecr w/ a non-zero <ea> that has entered through
3888 # the F-Line Illegal exception.
3889 # so, we need to convert the F-Line exception stack frame into an
3890 # FP Unimplemented Instruction stack frame and jump to that entry
3891 # point.
3892 #
3893 # but, if the FPU is disabled, then we need to jump to the FPU diabled
3894 # entry point.
3897 beq.b fline_fmovcr
3901 unlk %a6
3910 bra.l _real_fpu_disabled
3912 fline_fmovcr:
3915 unlk %a6
3924 bra.l _fpsp_unimp
3926 fline_fline:
3929 unlk %a6
3931 bra.l _real_fline
3933 #########################################################################
3934 # XDEF **************************************************************** #
3935 # _fpsp_unimp(): 060FPSP entry point for FP "Unimplemented #
3936 # Instruction" exception. #
3937 # #
3938 # This handler should be the first code executed upon taking the #
3939 # FP Unimplemented Instruction exception in an operating system. #
3940 # #
3941 # XREF **************************************************************** #
3942 # _imem_read_{word,long}() - read instruction word/longword #
3943 # load_fop() - load src/dst ops from memory and/or FP regfile #
3944 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
3945 # tbl_trans - addr of table of emulation routines for trnscndls #
3946 # _real_access() - "callout" for access error exception #
3947 # _fpsp_done() - "callout" for exit; work all done #
3948 # _real_trace() - "callout" for Trace enabled exception #
3949 # smovcr() - emulate "fmovecr" instruction #
3950 # funimp_skew() - adjust fsave src ops to "incorrect" value #
3951 # _ftrapcc() - emulate an "ftrapcc" instruction #
3952 # _fdbcc() - emulate an "fdbcc" instruction #
3953 # _fscc() - emulate an "fscc" instruction #
3954 # _real_trap() - "callout" for Trap exception #
3955 # _real_bsun() - "callout" for enabled Bsun exception #
3956 # #
3957 # INPUT *************************************************************** #
3958 # - The system stack contains the "Unimplemented Instr" stk frame #
3959 # #
3960 # OUTPUT ************************************************************** #
3961 # If access error: #
3962 # - The system stack is changed to an access error stack frame #
3963 # If Trace exception enabled: #
3964 # - The system stack is changed to a Trace exception stack frame #
3965 # Else: (normal case) #
3966 # - Correct result has been stored as appropriate #
3967 # #
3968 # ALGORITHM *********************************************************** #
3969 # There are two main cases of instructions that may enter here to #
3970 # be emulated: (1) the FPgen instructions, most of which were also #
3971 # unimplemented on the 040, and (2) "ftrapcc", "fscc", and "fdbcc". #
3972 # For the first set, this handler calls the routine load_fop() #
3973 # to load the source and destination (for dyadic) operands to be used #
3974 # for instruction emulation. The correct emulation routine is then #
3975 # chosen by decoding the instruction type and indexing into an #
3976 # emulation subroutine index table. After emulation returns, this #
3977 # handler checks to see if an exception should occur as a result of the #
3978 # FP instruction emulation. If so, then an FP exception of the correct #
3979 # type is inserted into the FPU state frame using the "frestore" #
3980 # instruction before exiting through _fpsp_done(). In either the #
3981 # exceptional or non-exceptional cases, we must check to see if the #
3982 # Trace exception is enabled. If so, then we must create a Trace #
3983 # exception frame from the current exception frame and exit through #
3984 # _real_trace(). #
3985 # For "fdbcc", "ftrapcc", and "fscc", the emulation subroutines #
3986 # _fdbcc(), _ftrapcc(), and _fscc() respectively are used. All three #
3987 # may flag that a BSUN exception should be taken. If so, then the #
3988 # current exception stack frame is converted into a BSUN exception #
3989 # stack frame and an exit is made through _real_bsun(). If the #
3990 # instruction was "ftrapcc" and a Trap exception should result, a Trap #
3991 # exception stack frame is created from the current frame and an exit #
3992 # is made through _real_trap(). If a Trace exception is pending, then #
3993 # a Trace exception frame is created from the current frame and a jump #
3994 # is made to _real_trace(). Finally, if none of these conditions exist, #
3995 # then the handler exits though the callout _fpsp_done(). #
3996 # #
3997 # In any of the above scenarios, if a _mem_read() or _mem_write() #
3998 # "callout" returns a failing value, then an access error stack frame #
3999 # is created from the current stack frame and an exit is made through #
4000 # _real_access(). #
4001 # #
4002 #########################################################################
4004 #
4005 # FP UNIMPLEMENTED INSTRUCTION STACK FRAME:
4006 #
4007 # *****************
4008 # * * => <ea> of fp unimp instr.
4009 # - EA -
4010 # * *
4011 # *****************
4012 # * 0x2 * 0x02c * => frame format and vector offset(vector #11)
4013 # *****************
4014 # * *
4015 # - Next PC - => PC of instr to execute after exc handling
4016 # * *
4017 # *****************
4018 # * SR * => SR at the time the exception was taken
4019 # *****************
4020 #
4021 # Note: the !NULL bit does not get set in the fsave frame when the
4022 # machine encounters an fp unimp exception. Therefore, it must be set
4023 # before leaving this handler.
4024 #
4025 global _fpsp_unimp
4026 _fpsp_unimp:
4037 # save the value of the user stack pointer onto the stack frame
4038 funimp_u:
4041 bra.b funimp_cont
4043 # store the value of the supervisor stack pointer BEFORE the exc occurred.
4044 # old_sp is address just above stacked effective address.
4045 funimp_s:
4050 funimp_cont:
4052 # the FPIAR holds the "current PC" of the faulting instruction.
4060 ############################################################################
4067 # Divide the fp instructions into 8 types based on the TYPE field in
4068 # bits 6-8 of the opword(classes 6,7 are undefined).
4069 # (for the '060, only two types can take this exception)
4070 # bftst %d0{&7:&3} # test TYPE
4072 bne.w funimp_misc # type 1
4074 #########################################
4075 # TYPE == 0: General instructions #
4076 #########################################
4077 funimp_gen:
4081 # clear the ccode byte and exception status byte
4086 beq.w funimp_fmovcr # yes
4088 funimp_gen_op:
4105 funimp_fsave:
4107 bne.w funimp_ena # some are enabled
4109 funimp_store:
4113 funimp_gen_exit:
4118 funimp_gen_exit_cmp:
4125 funimp_gen_exit_cont:
4126 unlk %a6
4128 funimp_gen_exit_cont2:
4132 # this catches a problem with the case where an exception will be re-inserted
4133 # into the machine. the frestore has already been executed...so, the fmov.l
4134 # alone of the control register would trigger an unwanted exception.
4135 # until I feel like fixing this, we'll sidestep the exception.
4140 bra.l _real_trace
4142 funimp_gen_exit_a7:
4150 bra.b funimp_gen_exit_cont
4152 # if the instruction was executed from supervisor mode and the addressing
4153 # mode was (a7)+, then the stack frame for the rte must be shifted "up"
4154 # "n" bytes where "n" is the size of the src operand type.
4155 # f<op>.{b,w,l,s,d,x,p}
4156 funimp_gen_exit_a7_s:
4165 unlk %a6
4168 bra.b funimp_gen_exit_cont2
4170 ######################
4171 # fmovecr.x #ccc,fpn #
4172 ######################
4173 funimp_fmovcr:
4178 bsr.l smovcr
4179 bra.w funimp_fsave
4181 #########################################################################
4183 #
4184 # the user has enabled some exceptions. we figure not to see this too
4185 # often so that's why it gets lower priority.
4186 #
4187 funimp_ena:
4189 # was an exception set that was also enabled?
4194 # no exception that was enabled was set BUT if we got an exact overflow
4195 # and overflow wasn't enabled but inexact was (yech!) then this is
4196 # an inexact exception; otherwise, return to normal non-exception flow.
4198 beq.w funimp_store # no; return to normal flow
4200 # the overflow w/ exact result happened but was inexact set in the FPCR?
4201 funimp_ovfl:
4203 beq.w funimp_store # no; return to normal flow
4206 # some exception happened that was actually enabled.
4207 # we'll insert this new exception into the FPU and then return.
4208 funimp_exc:
4213 # the enabled exception was inexact. so, if it occurs with an overflow
4214 # or underflow that was disabled, then we have to force an overflow or
4215 # underflow frame. the eventual overflow or underflow handler will see that
4216 # it's actually an inexact and act appropriately. this is the only easy
4217 # way to have the EXOP available for the enabled inexact handler when
4218 # a disabled overflow or underflow has also happened.
4224 # force the fsave exception status bits to signal an exception of the
4225 # appropriate type. don't forget to "skew" the source operand in case we
4226 # "unskewed" the one the hardware initially gave us.
4227 funimp_exc_force:
4234 tbl_funimp_except:
4238 # insert an overflow frame
4239 funimp_exc_ovfl:
4242 bra.b funimp_gen_exit2
4244 # insert an underflow frame
4245 funimp_exc_unfl:
4249 # this is the general exit point for an enabled exception that will be
4250 # restored into the machine for the instruction just emulated.
4251 funimp_gen_exit2:
4258 bra.w funimp_gen_exit_cmp
4260 ############################################################################
4262 #
4263 # TYPE == 1: FDB<cc>, FS<cc>, FTRAP<cc>
4264 #
4265 # These instructions were implemented on the '881/2 and '040 in hardware but
4266 # are emulated in software on the '060.
4267 #
4268 funimp_misc:
4271 beq.w funimp_fdbcc # yes
4273 bne.w funimp_fscc # yes
4276 blt.w funimp_fscc # yes
4278 #########################
4279 # ftrap<cc> #
4280 # ftrap<cc>.w #<data> #
4281 # ftrap<cc>.l #<data> #
4282 #########################
4283 funimp_ftrapcc:
4288 beq.w funimp_bsun # yes
4291 bne.w funimp_done # no
4293 # FP UNIMP FRAME TRAP FRAME
4294 # ***************** *****************
4295 # ** <EA> ** ** Current PC **
4296 # ***************** *****************
4297 # * 0x2 * 0x02c * * 0x2 * 0x01c *
4298 # ***************** *****************
4299 # ** Next PC ** ** Next PC **
4300 # ***************** *****************
4301 # * SR * * SR *
4302 # ***************** *****************
4303 # (6 words) (6 words)
4304 #
4305 # the ftrapcc instruction should take a trap. so, here we must create a
4306 # trap stack frame from an unimplemented fp instruction stack frame and
4307 # jump to the user supplied entry point for the trap exception
4308 funimp_ftrapcc_tp:
4316 unlk %a6
4317 bra.l _real_trap
4319 #########################
4320 # fdb<cc> Dn,<label> #
4321 #########################
4322 funimp_fdbcc:
4329 bne.w funimp_iacc # yes
4336 beq.w funimp_bsun
4338 bra.w funimp_done # branch to finish
4340 #################
4341 # fs<cc>.b <ea> #
4342 #################
4343 funimp_fscc:
4347 # I am assuming here that an "fs<cc>.b -(An)" or "fs<cc>.b (An)+" instruction
4348 # does not need to update "An" before taking a bsun exception.
4350 beq.w funimp_bsun
4355 funimp_fscc_u:
4358 bra.w funimp_done # branch to finish
4360 # remember, I'm assuming that post-increment is bogus...(it IS!!!)
4361 # so, the least significant WORD of the stacked effective address got
4362 # overwritten by the "fs<cc> -(An)". We must shift the stack frame "down"
4363 # so that the rte will work correctly without destroying the result.
4364 # even though the operation size is byte, the stack ptr is decr by 2.
4365 #
4366 # remember, also, this instruction may be traced.
4367 funimp_fscc_s:
4369 bne.w funimp_done # no
4375 unlk %a6
4383 bra.l _fpsp_done
4385 funimp_fscc_s_trace:
4392 bra.l _real_trace
4394 #
4395 # The ftrap<cc>, fs<cc>, or fdb<cc> is to take an enabled bsun. we must convert
4396 # the fp unimplemented instruction exception stack frame into a bsun stack frame,
4397 # restore a bsun exception into the machine, and branch to the user
4398 # supplied bsun hook.
4399 #
4400 # FP UNIMP FRAME BSUN FRAME
4401 # ***************** *****************
4402 # ** <EA> ** * 0x0 * 0x0c0 *
4403 # ***************** *****************
4404 # * 0x2 * 0x02c * ** Current PC **
4405 # ***************** *****************
4406 # ** Next PC ** * SR *
4407 # ***************** *****************
4408 # * SR * (4 words)
4409 # *****************
4410 # (6 words)
4411 #
4412 funimp_bsun:
4425 unlk %a6
4431 #
4432 # all ftrapcc/fscc/fdbcc processing has been completed. unwind the stack frame
4433 # and return.
4434 #
4435 # as usual, we have to check for trace mode being on here. since instructions
4436 # modifying the supervisor stack frame don't pass through here, this is a
4437 # relatively easy task.
4438 #
4439 funimp_done:
4444 unlk %a6
4449 bra.l _fpsp_done
4451 # FP UNIMP FRAME TRACE FRAME
4452 # ***************** *****************
4453 # ** <EA> ** ** Current PC **
4454 # ***************** *****************
4455 # * 0x2 * 0x02c * * 0x2 * 0x024 *
4456 # ***************** *****************
4457 # ** Next PC ** ** Next PC **
4458 # ***************** *****************
4459 # * SR * * SR *
4460 # ***************** *****************
4461 # (6 words) (6 words)
4462 #
4463 # the fscc instruction should take a trace trap. so, here we must create a
4464 # trace stack frame from an unimplemented fp instruction stack frame and
4465 # jump to the user supplied entry point for the trace exception
4466 funimp_trace:
4470 bra.l _real_trace
4472 ################################################################
4474 global tbl_trans
4476 tbl_trans:
4981 ##########
4983 # the instruction fetch access for the displacement word for the
4984 # fdbcc emulation failed. here, we create an access error frame
4985 # from the current frame and branch to _real_access().
4986 funimp_iacc:
4993 unlk %a6
5005 funimp_iacc_end:
5006 bra.l _real_access
5008 #########################################################################
5009 # ssin(): computes the sine of a normalized input #
5010 # ssind(): computes the sine of a denormalized input #
5011 # scos(): computes the cosine of a normalized input #
5012 # scosd(): computes the cosine of a denormalized input #
5013 # ssincos(): computes the sine and cosine of a normalized input #
5014 # ssincosd(): computes the sine and cosine of a denormalized input #
5015 # #
5016 # INPUT *************************************************************** #
5017 # a0 = pointer to extended precision input #
5018 # d0 = round precision,mode #
5019 # #
5020 # OUTPUT ************************************************************** #
5021 # fp0 = sin(X) or cos(X) #
5022 # #
5023 # For ssincos(X): #
5024 # fp0 = sin(X) #
5025 # fp1 = cos(X) #
5026 # #
5027 # ACCURACY and MONOTONICITY ******************************************* #
5028 # The returned result is within 1 ulp in 64 significant bit, i.e. #
5029 # within 0.5001 ulp to 53 bits if the result is subsequently #
5030 # rounded to double precision. The result is provably monotonic #
5031 # in double precision. #
5032 # #
5033 # ALGORITHM *********************************************************** #
5034 # #
5035 # SIN and COS: #
5036 # 1. If SIN is invoked, set AdjN := 0; otherwise, set AdjN := 1. #
5037 # #
5038 # 2. If |X| >= 15Pi or |X| < 2**(-40), go to 7. #
5039 # #
5040 # 3. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let #
5041 # k = N mod 4, so in particular, k = 0,1,2,or 3. #
5042 # Overwrite k by k := k + AdjN. #
5043 # #
5044 # 4. If k is even, go to 6. #
5045 # #
5046 # 5. (k is odd) Set j := (k-1)/2, sgn := (-1)**j. #
5047 # Return sgn*cos(r) where cos(r) is approximated by an #
5048 # even polynomial in r, 1 + r*r*(B1+s*(B2+ ... + s*B8)), #
5049 # s = r*r. #
5050 # Exit. #
5051 # #
5052 # 6. (k is even) Set j := k/2, sgn := (-1)**j. Return sgn*sin(r) #
5053 # where sin(r) is approximated by an odd polynomial in r #
5054 # r + r*s*(A1+s*(A2+ ... + s*A7)), s = r*r. #
5055 # Exit. #
5056 # #
5057 # 7. If |X| > 1, go to 9. #
5058 # #
5059 # 8. (|X|<2**(-40)) If SIN is invoked, return X; #
5060 # otherwise return 1. #
5061 # #
5062 # 9. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, #
5063 # go back to 3. #
5064 # #
5065 # SINCOS: #
5066 # 1. If |X| >= 15Pi or |X| < 2**(-40), go to 6. #
5067 # #
5068 # 2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let #
5069 # k = N mod 4, so in particular, k = 0,1,2,or 3. #
5070 # #
5071 # 3. If k is even, go to 5. #
5072 # #
5073 # 4. (k is odd) Set j1 := (k-1)/2, j2 := j1 (EOR) (k mod 2), ie. #
5074 # j1 exclusive or with the l.s.b. of k. #
5075 # sgn1 := (-1)**j1, sgn2 := (-1)**j2. #
5076 # SIN(X) = sgn1 * cos(r) and COS(X) = sgn2*sin(r) where #
5077 # sin(r) and cos(r) are computed as odd and even #
5078 # polynomials in r, respectively. Exit #
5079 # #
5080 # 5. (k is even) Set j1 := k/2, sgn1 := (-1)**j1. #
5081 # SIN(X) = sgn1 * sin(r) and COS(X) = sgn1*cos(r) where #
5082 # sin(r) and cos(r) are computed as odd and even #
5083 # polynomials in r, respectively. Exit #
5084 # #
5085 # 6. If |X| > 1, go to 8. #
5086 # #
5087 # 7. (|X|<2**(-40)) SIN(X) = X and COS(X) = 1. Exit. #
5088 # #
5089 # 8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, #
5090 # go back to 2. #
5091 # #
5092 #########################################################################
5111 set INARG,FP_SCR0
5113 set X,FP_SCR0
5114 # set XDCARE,X+2
5117 set RPRIME,FP_SCR0
5118 set SPRIME,FP_SCR1
5120 set POSNEG1,L_SCR1
5121 set TWOTO63,L_SCR1
5123 set ENDFLAG,L_SCR2
5124 set INT,L_SCR2
5126 set ADJN,L_SCR3
5128 ############################################
5129 global ssin
5130 ssin:
5132 bra.b SINBGN
5134 ############################################
5135 global scos
5136 scos:
5139 ############################################
5140 SINBGN:
5141 #--SAVE FPCR, FP1. CHECK IF |X| IS TOO SMALL OR LARGE
5146 # "COMPACTIFY" X
5153 bra.w SINSM # yes; input is very small
5155 SOK1:
5158 bra.w SREDUCEX # yes; input is very large
5160 #--THIS IS THE USUAL CASE, |X| <= 15 PI.
5161 #--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
5162 SINMAIN:
5174 # A1 IS THE ADDRESS OF N*PIBY2
5175 # ...WHICH IS IN TWO PIECES Y1 & Y2
5179 SINCONT:
5180 #--continuation from REDUCEX
5182 #--GET N+ADJN AND SEE IF SIN(R) OR COS(R) IS NEEDED
5187 blt.w COSPOLY
5189 #--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
5190 #--THEN WE RETURN SGN*SIN(R). SGN*SIN(R) IS COMPUTED BY
5191 #--R' + R'*S*(A1 + S(A2 + S(A3 + S(A4 + ... + SA7)))), WHERE
5192 #--R' = SGN*R, S=R*R. THIS CAN BE REWRITTEN AS
5193 #--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
5194 #--WHERE T=S*S.
5195 #--NOTE THAT A3 THROUGH A7 ARE STORED IN DOUBLE PRECISION
5196 #--WHILE A1 AND A2 ARE IN DOUBLE-EXTENDED FORMAT.
5197 SINPOLY:
5211 # ...LEAST SIG. BIT OF D0 IN SIGN POSITION
5240 bra t_inx2
5242 #--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
5243 #--THEN WE RETURN SGN*COS(R). SGN*COS(R) IS COMPUTED BY
5244 #--SGN + S'*(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE
5245 #--S=R*R AND S'=SGN*S. THIS CAN BE REWRITTEN AS
5246 #--SGN + S'*([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))])
5247 #--WHERE T=S*S.
5248 #--NOTE THAT B4 THROUGH B8 ARE STORED IN DOUBLE PRECISION
5249 #--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2
5250 #--AND IS THEREFORE STORED AS SINGLE PRECISION.
5251 COSPOLY:
5265 # ...LEAST SIG. BIT OF D0 IN SIGN POSITION
5302 bra t_inx2
5304 ##############################################
5306 # SINe: Big OR Small?
5307 #--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
5308 #--IF |X| < 2**(-40), RETURN X OR 1.
5309 SINBORS:
5311 bgt.l SREDUCEX
5313 SINSM:
5316 bgt.b COSTINY
5318 # here, the operation may underflow iff the precision is sgl or dbl.
5319 # extended denorms are handled through another entry point.
5320 SINTINY:
5321 # mov.w &0x0000,XDCARE(%a6) # JUST IN CASE
5326 bra t_catch
5328 COSTINY:
5332 bra t_pinx2
5334 ################################################
5335 global ssind
5336 #--SIN(X) = X FOR DENORMALIZED X
5337 ssind:
5338 bra t_extdnrm
5340 ############################################
5341 global scosd
5342 #--COS(X) = 1 FOR DENORMALIZED X
5343 scosd:
5345 bra t_pinx2
5347 ##################################################
5349 global ssincos
5350 ssincos:
5351 #--SET ADJN TO 4
5362 bge.b SCOK1
5363 bra.w SCSM
5365 SCOK1:
5367 blt.b SCMAIN
5368 bra.w SREDUCEX
5371 #--THIS IS THE USUAL CASE, |X| <= 15 PI.
5372 #--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
5373 SCMAIN:
5389 SCCONT:
5390 #--continuation point from REDUCEX
5395 bge.w NEVEN
5397 SNODD:
5398 #--REGISTERS SAVED SO FAR: D0, A0, FP2.
5467 bsr sto_cos # store cosine result
5469 bra t_inx2
5471 NEVEN:
5472 #--REGISTERS SAVED SO FAR: FP2.
5540 bsr sto_cos # store cosine result
5542 bra t_inx2
5544 ################################################
5546 SCBORS:
5548 bgt.w SREDUCEX
5550 ################################################
5552 SCSM:
5553 # mov.w &0x0000,XDCARE(%a6)
5558 bsr sto_cos # store cosine result
5562 bra t_catch
5564 ##############################################
5566 global ssincosd
5567 #--SIN AND COS OF X FOR DENORMALIZED X
5568 ssincosd:
5571 bsr sto_cos # store cosine result
5573 bra t_extdnrm
5575 ############################################
5577 #--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
5578 #--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
5579 #--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
5580 SREDUCEX:
5585 #--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
5586 #--there is a danger of unwanted overflow in first LOOP iteration. In this
5587 #--case, reduce argument by one remainder step to make subsequent reduction
5588 #--safe.
5592 # yes; create 2**16383*PI/2
5597 # create low half of 2**16383*PI/2 at FP_SCR1
5603 fblt.w sred_neg
5607 sred_neg:
5614 #--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
5615 #--integer quotient will be stored in N
5616 #--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
5617 SLOOP:
5624 ble.b SLASTLOOP
5625 SCONTLOOP:
5628 bra.b SWORK
5629 SLASTLOOP:
5633 SWORK:
5634 #--FIND THE REMAINDER OF (R,r) W.R.T. 2**L * (PI/2). L IS SO CHOSEN
5635 #--THAT INT( X * (2/PI) / 2**(L) ) < 2**29.
5637 #--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
5638 #--2**L * (PIby2_1), 2**L * (PIby2_2)
5650 #--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
5651 #--FLOATING POINT FORMAT, THE TWO FMOVE'S FMOVE.L FP <--> N
5652 #--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
5653 #--(SIGN(INARG)*2**63 + FP2) - SIGN(INARG)*2**63 WILL GIVE
5654 #--US THE DESIRED VALUE IN FLOATING POINT.
5656 swap %d2
5662 # fint.x %fp2
5664 #--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
5679 #--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
5680 #--P2 = 2**(L) * Piby2_2
5687 #--we want P+p = W+w but |p| <= half ulp of P
5688 #--Then, we need to compute A := R-P and a := r-p
5698 #--Now we need to normalize (A,a) to "new (R,r)" where R+r = A+a but
5699 #--|r| <= half ulp of R.
5701 #--No need to calculate r if this is the last loop
5703 bgt.w SRESTORE
5705 #--Need to calculate r
5708 bra.w SLOOP
5710 SRESTORE:
5718 blt.w SINCONT
5719 bra.w SCCONT
5721 #########################################################################
5722 # stan(): computes the tangent of a normalized input #
5723 # stand(): computes the tangent of a denormalized input #
5724 # #
5725 # INPUT *************************************************************** #
5726 # a0 = pointer to extended precision input #
5727 # d0 = round precision,mode #
5728 # #
5729 # OUTPUT ************************************************************** #
5730 # fp0 = tan(X) #
5731 # #
5732 # ACCURACY and MONOTONICITY ******************************************* #
5733 # The returned result is within 3 ulp in 64 significant bit, i.e. #
5734 # within 0.5001 ulp to 53 bits if the result is subsequently #
5735 # rounded to double precision. The result is provably monotonic #
5736 # in double precision. #
5737 # #
5738 # ALGORITHM *********************************************************** #
5739 # #
5740 # 1. If |X| >= 15Pi or |X| < 2**(-40), go to 6. #
5741 # #
5742 # 2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let #
5743 # k = N mod 2, so in particular, k = 0 or 1. #
5744 # #
5745 # 3. If k is odd, go to 5. #
5746 # #
5747 # 4. (k is even) Tan(X) = tan(r) and tan(r) is approximated by a #
5748 # rational function U/V where #
5749 # U = r + r*s*(P1 + s*(P2 + s*P3)), and #
5750 # V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))), s = r*r. #
5751 # Exit. #
5752 # #
5753 # 4. (k is odd) Tan(X) = -cot(r). Since tan(r) is approximated by #
5754 # a rational function U/V where #
5755 # U = r + r*s*(P1 + s*(P2 + s*P3)), and #
5756 # V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))), s = r*r, #
5757 # -Cot(r) = -V/U. Exit. #
5758 # #
5759 # 6. If |X| > 1, go to 8. #
5760 # #
5761 # 7. (|X|<2**(-40)) Tan(X) = X. Exit. #
5762 # #
5763 # 8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, go back #
5764 # to 2. #
5765 # #
5766 #########################################################################
5768 TANQ4:
5770 TANP3:
5773 TANQ3:
5776 TANP2:
5779 TANQ2:
5782 TANP1:
5785 TANQ1:
5788 INVTWOPI:
5791 TWOPI1:
5793 TWOPI2:
5796 #--N*PI/2, -32 <= N <= 32, IN A LEADING TERM IN EXT. AND TRAILING
5797 #--TERM IN SGL. NOTE THAT PI IS 64-BIT LONG, THUS N*PI/2 IS AT
5798 #--MOST 69 BITS LONG.
5799 # global PITBL
5800 PITBL:
5867 set INARG,FP_SCR0
5869 set TWOTO63,L_SCR1
5870 set INT,L_SCR1
5871 set ENDFLAG,L_SCR2
5873 global stan
5874 stan:
5882 bge.b TANOK1
5883 bra.w TANSM
5884 TANOK1:
5886 blt.b TANMAIN
5887 bra.w REDUCEX
5889 TANMAIN:
5890 #--THIS IS THE USUAL CASE, |X| <= 15 PI.
5891 #--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
5909 TANCONT:
5913 blt.w NODD
5949 bra t_inx2
5951 NODD:
5988 bra t_inx2
5990 TANBORS:
5991 #--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
5992 #--IF |X| < 2**(-40), RETURN X OR 1.
5994 bgt.b REDUCEX
5996 TANSM:
6001 bra t_catch
6003 global stand
6004 #--TAN(X) = X FOR DENORMALIZED X
6005 stand:
6006 bra t_extdnrm
6008 #--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
6009 #--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
6010 #--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
6011 REDUCEX:
6016 #--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
6017 #--there is a danger of unwanted overflow in first LOOP iteration. In this
6018 #--case, reduce argument by one remainder step to make subsequent reduction
6019 #--safe.
6023 # yes; create 2**16383*PI/2
6028 # create low half of 2**16383*PI/2 at FP_SCR1
6034 fblt.w red_neg
6038 red_neg:
6045 #--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
6046 #--integer quotient will be stored in N
6047 #--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
6048 LOOP:
6055 ble.b LASTLOOP
6056 CONTLOOP:
6059 bra.b WORK
6060 LASTLOOP:
6064 WORK:
6065 #--FIND THE REMAINDER OF (R,r) W.R.T. 2**L * (PI/2). L IS SO CHOSEN
6066 #--THAT INT( X * (2/PI) / 2**(L) ) < 2**29.
6068 #--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
6069 #--2**L * (PIby2_1), 2**L * (PIby2_2)
6081 #--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
6082 #--FLOATING POINT FORMAT, THE TWO FMOVE'S FMOVE.L FP <--> N
6083 #--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
6084 #--(SIGN(INARG)*2**63 + FP2) - SIGN(INARG)*2**63 WILL GIVE
6085 #--US THE DESIRED VALUE IN FLOATING POINT.
6087 swap %d2
6093 # fintrz.x %fp2,%fp2
6095 #--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
6110 #--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
6111 #--P2 = 2**(L) * Piby2_2
6118 #--we want P+p = W+w but |p| <= half ulp of P
6119 #--Then, we need to compute A := R-P and a := r-p
6129 #--Now we need to normalize (A,a) to "new (R,r)" where R+r = A+a but
6130 #--|r| <= half ulp of R.
6132 #--No need to calculate r if this is the last loop
6134 bgt.w RESTORE
6136 #--Need to calculate r
6139 bra.w LOOP
6141 RESTORE:
6149 bra.w TANCONT
6151 #########################################################################
6152 # satan(): computes the arctangent of a normalized number #
6153 # satand(): computes the arctangent of a denormalized number #
6154 # #
6155 # INPUT *************************************************************** #
6156 # a0 = pointer to extended precision input #
6157 # d0 = round precision,mode #
6158 # #
6159 # OUTPUT ************************************************************** #
6160 # fp0 = arctan(X) #
6161 # #
6162 # ACCURACY and MONOTONICITY ******************************************* #
6163 # The returned result is within 2 ulps in 64 significant bit, #
6164 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
6165 # rounded to double precision. The result is provably monotonic #
6166 # in double precision. #
6167 # #
6168 # ALGORITHM *********************************************************** #
6169 # Step 1. If |X| >= 16 or |X| < 1/16, go to Step 5. #
6170 # #
6171 # Step 2. Let X = sgn * 2**k * 1.xxxxxxxx...x. #
6172 # Note that k = -4, -3,..., or 3. #
6173 # Define F = sgn * 2**k * 1.xxxx1, i.e. the first 5 #
6174 # significant bits of X with a bit-1 attached at the 6-th #
6175 # bit position. Define u to be u = (X-F) / (1 + X*F). #
6176 # #
6177 # Step 3. Approximate arctan(u) by a polynomial poly. #
6178 # #
6179 # Step 4. Return arctan(F) + poly, arctan(F) is fetched from a #
6180 # table of values calculated beforehand. Exit. #
6181 # #
6182 # Step 5. If |X| >= 16, go to Step 7. #
6183 # #
6184 # Step 6. Approximate arctan(X) by an odd polynomial in X. Exit. #
6185 # #
6186 # Step 7. Define X' = -1/X. Approximate arctan(X') by an odd #
6187 # polynomial in X'. #
6188 # Arctan(X) = sign(X)*Pi/2 + arctan(X'). Exit. #
6189 # #
6190 #########################################################################
6215 ATANTBL:
6345 set X,FP_SCR0
6350 set ATANF,FP_SCR1
6354 global satan
6355 #--ENTRY POINT FOR ATAN(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
6356 satan:
6365 bge.b ATANOK1
6366 bra.w ATANSM
6368 ATANOK1:
6370 ble.b ATANMAIN
6371 bra.w ATANBIG
6373 #--THE MOST LIKELY CASE, |X| IN [1/16, 16). WE USE TABLE TECHNIQUE
6374 #--THE IDEA IS ATAN(X) = ATAN(F) + ATAN( [X-F] / [1+XF] ).
6375 #--SO IF F IS CHOSEN TO BE CLOSE TO X AND ATAN(F) IS STORED IN
6376 #--A TABLE, ALL WE NEED IS TO APPROXIMATE ATAN(U) WHERE
6377 #--U = (X-F)/(1+XF) IS SMALL (REMEMBER F IS CLOSE TO X). IT IS
6378 #--TRUE THAT A DIVIDE IS NOW NEEDED, BUT THE APPROXIMATION FOR
6379 #--ATAN(U) IS A VERY SHORT POLYNOMIAL AND THE INDEXING TO
6380 #--FETCH F AND SAVING OF REGISTERS CAN BE ALL HIDED UNDER THE
6381 #--DIVIDE. IN THE END THIS METHOD IS MUCH FASTER THAN A TRADITIONAL
6382 #--ONE. NOTE ALSO THAT THE TRADITIONAL SCHEME THAT APPROXIMATE
6383 #--ATAN(X) DIRECTLY WILL NEED TO USE A RATIONAL APPROXIMATION
6384 #--(DIVISION NEEDED) ANYWAY BECAUSE A POLYNOMIAL APPROXIMATION
6385 #--WILL INVOLVE A VERY LONG POLYNOMIAL.
6387 #--NOW WE SEE X AS +-2^K * 1.BBBBBBB....B <- 1. + 63 BITS
6388 #--WE CHOSE F TO BE +-2^K * 1.BBBB1
6389 #--THAT IS IT MATCHES THE EXPONENT AND FIRST 5 BITS OF X, THE
6390 #--SIXTH BITS IS SET TO BE 1. SINCE K = -4, -3, ..., 3, THERE
6391 #--ARE ONLY 8 TIMES 16 = 2^7 = 128 |F|'S. SINCE ATAN(-|F|) IS
6392 #-- -ATAN(|F|), WE NEED TO STORE ONLY ATAN(|F|).
6394 ATANMAIN:
6406 #--WHILE THE DIVISION IS TAKING ITS TIME, WE FETCH ATAN(|F|)
6407 #--CREATE ATAN(F) AND STORE IT IN ATANF, AND
6408 #--SAVE REGISTERS FP2.
6428 #--THAT'S ALL I HAVE TO DO FOR NOW,
6429 #--BUT ALAS, THE DIVIDE IS STILL CRANKING!
6431 #--U IN FP0, WE ARE NOW READY TO COMPUTE ATAN(U) AS
6432 #--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
6433 #--THE POLYNOMIAL MAY LOOK STRANGE, BUT IS NEVERTHELESS CORRECT.
6434 #--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
6435 #--WHAT WE HAVE HERE IS MERELY A1 = A3, A2 = A1/A3, A3 = A2/A3.
6436 #--THE REASON FOR THIS REARRANGEMENT IS TO MAKE THE INDEPENDENT
6437 #--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED
6456 bra t_inx2
6458 ATANBORS:
6459 #--|X| IS IN d0 IN COMPACT FORM. FP1, d0 SAVED.
6460 #--FP0 IS X AND |X| <= 1/16 OR |X| >= 16.
6462 bgt.w ATANBIG # I.E. |X| >= 16
6464 ATANSM:
6465 #--|X| <= 1/16
6466 #--IF |X| < 2^(-40), RETURN X AS ANSWER. OTHERWISE, APPROXIMATE
6467 #--ATAN(X) BY X + X*Y*(B1+Y*(B2+Y*(B3+Y*(B4+Y*(B5+Y*B6)))))
6468 #--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] )
6469 #--WHERE Y = X*X, AND Z = Y*Y.
6472 blt.w ATANTINY
6474 #--COMPUTE POLYNOMIAL
6508 bra t_inx2
6510 ATANTINY:
6511 #--|X| < 2^(-40), ATAN(X) = X
6517 bra t_catch
6519 ATANBIG:
6520 #--IF |X| > 2^(100), RETURN SIGN(X)*(PI/2 - TINY). OTHERWISE,
6521 #--RETURN SIGN(X)*PI/2 + ATAN(-1/X).
6523 bgt.w ATANHUGE
6525 #--APPROXIMATE ATAN(-1/X) BY
6526 #--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X'
6527 #--THIS CAN BE RE-WRITTEN AS
6528 #--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y.
6535 #--DIVIDE IS STILL CRANKING
6562 # ... +[Y*(B2+Z*(B4+Z*B6))])
6569 bpl.b pos_big
6571 neg_big:
6573 bra t_minx2
6575 pos_big:
6577 bra t_pinx2
6579 ATANHUGE:
6580 #--RETURN SIGN(X)*(PIBY2 - TINY) = SIGN(X)*PIBY2 - SIGN(X)*TINY
6582 bpl.b pos_huge
6584 neg_huge:
6588 bra t_minx2
6590 pos_huge:
6594 bra t_pinx2
6596 global satand
6597 #--ENTRY POINT FOR ATAN(X) FOR DENORMALIZED ARGUMENT
6598 satand:
6599 bra t_extdnrm
6601 #########################################################################
6602 # sasin(): computes the inverse sine of a normalized input #
6603 # sasind(): computes the inverse sine of a denormalized input #
6604 # #
6605 # INPUT *************************************************************** #
6606 # a0 = pointer to extended precision input #
6607 # d0 = round precision,mode #
6608 # #
6609 # OUTPUT ************************************************************** #
6610 # fp0 = arcsin(X) #
6611 # #
6612 # ACCURACY and MONOTONICITY ******************************************* #
6613 # The returned result is within 3 ulps in 64 significant bit, #
6614 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
6615 # rounded to double precision. The result is provably monotonic #
6616 # in double precision. #
6617 # #
6618 # ALGORITHM *********************************************************** #
6619 # #
6620 # ASIN #
6621 # 1. If |X| >= 1, go to 3. #
6622 # #
6623 # 2. (|X| < 1) Calculate asin(X) by #
6624 # z := sqrt( [1-X][1+X] ) #
6625 # asin(X) = atan( x / z ). #
6626 # Exit. #
6627 # #
6628 # 3. If |X| > 1, go to 5. #
6629 # #
6630 # 4. (|X| = 1) sgn := sign(X), return asin(X) := sgn * Pi/2. Exit.#
6631 # #
6632 # 5. (|X| > 1) Generate an invalid operation by 0 * infinity. #
6633 # Exit. #
6634 # #
6635 #########################################################################
6637 global sasin
6638 sasin:
6645 bge.b ASINBIG
6647 # This catch is added here for the '060 QSP. Originally, the call to
6648 # satan() would handle this case by causing the exception which would
6649 # not be caught until gen_except(). Now, with the exceptions being
6650 # detected inside of satan(), the exception would have been handled there
6651 # instead of inside sasin() as expected.
6653 blt.w ASINTINY
6655 #--THIS IS THE USUAL CASE, |X| < 1
6656 #--ASIN(X) = ATAN( X / SQRT( (1-X)(1+X) ) )
6658 ASINMAIN:
6670 bsr satan
6672 bra t_inx2
6674 ASINBIG:
6677 fbgt t_operr # cause an operr exception
6679 #--|X| = 1, ASIN(X) = +- PI/2.
6680 ASINONE:
6688 bra t_inx2
6690 #--|X| < 2^(-40), ATAN(X) = X
6691 ASINTINY:
6695 bra t_catch
6697 global sasind
6698 #--ASIN(X) = X FOR DENORMALIZED X
6699 sasind:
6700 bra t_extdnrm
6702 #########################################################################
6703 # sacos(): computes the inverse cosine of a normalized input #
6704 # sacosd(): computes the inverse cosine of a denormalized input #
6705 # #
6706 # INPUT *************************************************************** #
6707 # a0 = pointer to extended precision input #
6708 # d0 = round precision,mode #
6709 # #
6710 # OUTPUT ************************************************************** #
6711 # fp0 = arccos(X) #
6712 # #
6713 # ACCURACY and MONOTONICITY ******************************************* #
6714 # The returned result is within 3 ulps in 64 significant bit, #
6715 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
6716 # rounded to double precision. The result is provably monotonic #
6717 # in double precision. #
6718 # #
6719 # ALGORITHM *********************************************************** #
6720 # #
6721 # ACOS #
6722 # 1. If |X| >= 1, go to 3. #
6723 # #
6724 # 2. (|X| < 1) Calculate acos(X) by #
6725 # z := (1-X) / (1+X) #
6726 # acos(X) = 2 * atan( sqrt(z) ). #
6727 # Exit. #
6728 # #
6729 # 3. If |X| > 1, go to 5. #
6730 # #
6731 # 4. (|X| = 1) If X > 0, return 0. Otherwise, return Pi. Exit. #
6732 # #
6733 # 5. (|X| > 1) Generate an invalid operation by 0 * infinity. #
6734 # Exit. #
6735 # #
6736 #########################################################################
6738 global sacos
6739 sacos:
6746 bge.b ACOSBIG
6748 #--THIS IS THE USUAL CASE, |X| < 1
6749 #--ACOS(X) = 2 * ATAN( SQRT( (1-X)/(1+X) ) )
6751 ACOSMAIN:
6762 bsr satan # ATAN(SQRT([1-X]/[1+X]))
6767 bra t_pinx2
6769 ACOSBIG:
6772 fbgt t_operr # cause an operr exception
6774 #--|X| = 1, ACOS(X) = 0 OR PI
6776 bpl.b ACOSP1
6778 #--X = -1
6779 #Returns PI and inexact exception
6780 ACOSM1:
6784 bra t_pinx2
6786 ACOSP1:
6787 bra ld_pzero # answer is positive zero
6789 global sacosd
6790 #--ACOS(X) = PI/2 FOR DENORMALIZED X
6791 sacosd:
6794 bra t_pinx2
6796 #########################################################################
6797 # setox(): computes the exponential for a normalized input #
6798 # setoxd(): computes the exponential for a denormalized input #
6799 # setoxm1(): computes the exponential minus 1 for a normalized input #
6800 # setoxm1d(): computes the exponential minus 1 for a denormalized input #
6801 # #
6802 # INPUT *************************************************************** #
6803 # a0 = pointer to extended precision input #
6804 # d0 = round precision,mode #
6805 # #
6806 # OUTPUT ************************************************************** #
6807 # fp0 = exp(X) or exp(X)-1 #
6808 # #
6809 # ACCURACY and MONOTONICITY ******************************************* #
6810 # The returned result is within 0.85 ulps in 64 significant bit, #
6811 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
6812 # rounded to double precision. The result is provably monotonic #
6813 # in double precision. #
6814 # #
6815 # ALGORITHM and IMPLEMENTATION **************************************** #
6816 # #
6817 # setoxd #
6818 # ------ #
6819 # Step 1. Set ans := 1.0 #
6820 # #
6821 # Step 2. Return ans := ans + sign(X)*2^(-126). Exit. #
6822 # Notes: This will always generate one exception -- inexact. #
6823 # #
6824 # #
6825 # setox #
6826 # ----- #
6827 # #
6828 # Step 1. Filter out extreme cases of input argument. #
6829 # 1.1 If |X| >= 2^(-65), go to Step 1.3. #
6830 # 1.2 Go to Step 7. #
6831 # 1.3 If |X| < 16380 log(2), go to Step 2. #
6832 # 1.4 Go to Step 8. #
6833 # Notes: The usual case should take the branches 1.1 -> 1.3 -> 2.#
6834 # To avoid the use of floating-point comparisons, a #
6835 # compact representation of |X| is used. This format is a #
6836 # 32-bit integer, the upper (more significant) 16 bits #
6837 # are the sign and biased exponent field of |X|; the #
6838 # lower 16 bits are the 16 most significant fraction #
6839 # (including the explicit bit) bits of |X|. Consequently, #
6840 # the comparisons in Steps 1.1 and 1.3 can be performed #
6841 # by integer comparison. Note also that the constant #
6842 # 16380 log(2) used in Step 1.3 is also in the compact #
6843 # form. Thus taking the branch to Step 2 guarantees #
6844 # |X| < 16380 log(2). There is no harm to have a small #
6845 # number of cases where |X| is less than, but close to, #
6846 # 16380 log(2) and the branch to Step 9 is taken. #
6847 # #
6848 # Step 2. Calculate N = round-to-nearest-int( X * 64/log2 ). #
6849 # 2.1 Set AdjFlag := 0 (indicates the branch 1.3 -> 2 #
6850 # was taken) #
6851 # 2.2 N := round-to-nearest-integer( X * 64/log2 ). #
6852 # 2.3 Calculate J = N mod 64; so J = 0,1,2,..., #
6853 # or 63. #
6854 # 2.4 Calculate M = (N - J)/64; so N = 64M + J. #
6855 # 2.5 Calculate the address of the stored value of #
6856 # 2^(J/64). #
6857 # 2.6 Create the value Scale = 2^M. #
6858 # Notes: The calculation in 2.2 is really performed by #
6859 # Z := X * constant #
6860 # N := round-to-nearest-integer(Z) #
6861 # where #
6862 # constant := single-precision( 64/log 2 ). #
6863 # #
6864 # Using a single-precision constant avoids memory #
6865 # access. Another effect of using a single-precision #
6866 # "constant" is that the calculated value Z is #
6867 # #
6868 # Z = X*(64/log2)*(1+eps), |eps| <= 2^(-24). #
6869 # #
6870 # This error has to be considered later in Steps 3 and 4. #
6871 # #
6872 # Step 3. Calculate X - N*log2/64. #
6873 # 3.1 R := X + N*L1, #
6874 # where L1 := single-precision(-log2/64). #
6875 # 3.2 R := R + N*L2, #
6876 # L2 := extended-precision(-log2/64 - L1).#
6877 # Notes: a) The way L1 and L2 are chosen ensures L1+L2 #
6878 # approximate the value -log2/64 to 88 bits of accuracy. #
6879 # b) N*L1 is exact because N is no longer than 22 bits #
6880 # and L1 is no longer than 24 bits. #
6881 # c) The calculation X+N*L1 is also exact due to #
6882 # cancellation. Thus, R is practically X+N(L1+L2) to full #
6883 # 64 bits. #
6884 # d) It is important to estimate how large can |R| be #
6885 # after Step 3.2. #
6886 # #
6887 # N = rnd-to-int( X*64/log2 (1+eps) ), |eps|<=2^(-24) #
6888 # X*64/log2 (1+eps) = N + f, |f| <= 0.5 #
6889 # X*64/log2 - N = f - eps*X 64/log2 #
6890 # X - N*log2/64 = f*log2/64 - eps*X #
6891 # #
6892 # #
6893 # Now |X| <= 16446 log2, thus #
6894 # #
6895 # |X - N*log2/64| <= (0.5 + 16446/2^(18))*log2/64 #
6896 # <= 0.57 log2/64. #
6897 # This bound will be used in Step 4. #
6898 # #
6899 # Step 4. Approximate exp(R)-1 by a polynomial #
6900 # p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5)))) #
6901 # Notes: a) In order to reduce memory access, the coefficients #
6902 # are made as "short" as possible: A1 (which is 1/2), A4 #
6903 # and A5 are single precision; A2 and A3 are double #
6904 # precision. #
6905 # b) Even with the restrictions above, #
6906 # |p - (exp(R)-1)| < 2^(-68.8) for all |R| <= 0.0062. #
6907 # Note that 0.0062 is slightly bigger than 0.57 log2/64. #
6908 # c) To fully use the pipeline, p is separated into #
6909 # two independent pieces of roughly equal complexities #
6910 # p = [ R + R*S*(A2 + S*A4) ] + #
6911 # [ S*(A1 + S*(A3 + S*A5)) ] #
6912 # where S = R*R. #
6913 # #
6914 # Step 5. Compute 2^(J/64)*exp(R) = 2^(J/64)*(1+p) by #
6915 # ans := T + ( T*p + t) #
6916 # where T and t are the stored values for 2^(J/64). #
6917 # Notes: 2^(J/64) is stored as T and t where T+t approximates #
6918 # 2^(J/64) to roughly 85 bits; T is in extended precision #
6919 # and t is in single precision. Note also that T is #
6920 # rounded to 62 bits so that the last two bits of T are #
6921 # zero. The reason for such a special form is that T-1, #
6922 # T-2, and T-8 will all be exact --- a property that will #
6923 # give much more accurate computation of the function #
6924 # EXPM1. #
6925 # #
6926 # Step 6. Reconstruction of exp(X) #
6927 # exp(X) = 2^M * 2^(J/64) * exp(R). #
6928 # 6.1 If AdjFlag = 0, go to 6.3 #
6929 # 6.2 ans := ans * AdjScale #
6930 # 6.3 Restore the user FPCR #
6931 # 6.4 Return ans := ans * Scale. Exit. #
6932 # Notes: If AdjFlag = 0, we have X = Mlog2 + Jlog2/64 + R, #
6933 # |M| <= 16380, and Scale = 2^M. Moreover, exp(X) will #
6934 # neither overflow nor underflow. If AdjFlag = 1, that #
6935 # means that #
6936 # X = (M1+M)log2 + Jlog2/64 + R, |M1+M| >= 16380. #
6937 # Hence, exp(X) may overflow or underflow or neither. #
6938 # When that is the case, AdjScale = 2^(M1) where M1 is #
6939 # approximately M. Thus 6.2 will never cause #
6940 # over/underflow. Possible exception in 6.4 is overflow #
6941 # or underflow. The inexact exception is not generated in #
6942 # 6.4. Although one can argue that the inexact flag #
6943 # should always be raised, to simulate that exception #
6944 # cost to much than the flag is worth in practical uses. #
6945 # #
6946 # Step 7. Return 1 + X. #
6947 # 7.1 ans := X #
6948 # 7.2 Restore user FPCR. #
6949 # 7.3 Return ans := 1 + ans. Exit #
6950 # Notes: For non-zero X, the inexact exception will always be #
6951 # raised by 7.3. That is the only exception raised by 7.3.#
6952 # Note also that we use the FMOVEM instruction to move X #
6953 # in Step 7.1 to avoid unnecessary trapping. (Although #
6954 # the FMOVEM may not seem relevant since X is normalized, #
6955 # the precaution will be useful in the library version of #
6956 # this code where the separate entry for denormalized #
6957 # inputs will be done away with.) #
6958 # #
6959 # Step 8. Handle exp(X) where |X| >= 16380log2. #
6960 # 8.1 If |X| > 16480 log2, go to Step 9. #
6961 # (mimic 2.2 - 2.6) #
6962 # 8.2 N := round-to-integer( X * 64/log2 ) #
6963 # 8.3 Calculate J = N mod 64, J = 0,1,...,63 #
6964 # 8.4 K := (N-J)/64, M1 := truncate(K/2), M = K-M1, #
6965 # AdjFlag := 1. #
6966 # 8.5 Calculate the address of the stored value #
6967 # 2^(J/64). #
6968 # 8.6 Create the values Scale = 2^M, AdjScale = 2^M1. #
6969 # 8.7 Go to Step 3. #
6970 # Notes: Refer to notes for 2.2 - 2.6. #
6971 # #
6972 # Step 9. Handle exp(X), |X| > 16480 log2. #
6973 # 9.1 If X < 0, go to 9.3 #
6974 # 9.2 ans := Huge, go to 9.4 #
6975 # 9.3 ans := Tiny. #
6976 # 9.4 Restore user FPCR. #
6977 # 9.5 Return ans := ans * ans. Exit. #
6978 # Notes: Exp(X) will surely overflow or underflow, depending on #
6979 # X's sign. "Huge" and "Tiny" are respectively large/tiny #
6980 # extended-precision numbers whose square over/underflow #
6981 # with an inexact result. Thus, 9.5 always raises the #
6982 # inexact together with either overflow or underflow. #
6983 # #
6984 # setoxm1d #
6985 # -------- #
6986 # #
6987 # Step 1. Set ans := 0 #
6988 # #
6989 # Step 2. Return ans := X + ans. Exit. #
6990 # Notes: This will return X with the appropriate rounding #
6991 # precision prescribed by the user FPCR. #
6992 # #
6993 # setoxm1 #
6994 # ------- #
6995 # #
6996 # Step 1. Check |X| #
6997 # 1.1 If |X| >= 1/4, go to Step 1.3. #
6998 # 1.2 Go to Step 7. #
6999 # 1.3 If |X| < 70 log(2), go to Step 2. #
7000 # 1.4 Go to Step 10. #
7001 # Notes: The usual case should take the branches 1.1 -> 1.3 -> 2.#
7002 # However, it is conceivable |X| can be small very often #
7003 # because EXPM1 is intended to evaluate exp(X)-1 #
7004 # accurately when |X| is small. For further details on #
7005 # the comparisons, see the notes on Step 1 of setox. #
7006 # #
7007 # Step 2. Calculate N = round-to-nearest-int( X * 64/log2 ). #
7008 # 2.1 N := round-to-nearest-integer( X * 64/log2 ). #
7009 # 2.2 Calculate J = N mod 64; so J = 0,1,2,..., #
7010 # or 63. #
7011 # 2.3 Calculate M = (N - J)/64; so N = 64M + J. #
7012 # 2.4 Calculate the address of the stored value of #
7013 # 2^(J/64). #
7014 # 2.5 Create the values Sc = 2^M and #
7015 # OnebySc := -2^(-M). #
7016 # Notes: See the notes on Step 2 of setox. #
7017 # #
7018 # Step 3. Calculate X - N*log2/64. #
7019 # 3.1 R := X + N*L1, #
7020 # where L1 := single-precision(-log2/64). #
7021 # 3.2 R := R + N*L2, #
7022 # L2 := extended-precision(-log2/64 - L1).#
7023 # Notes: Applying the analysis of Step 3 of setox in this case #
7024 # shows that |R| <= 0.0055 (note that |X| <= 70 log2 in #
7025 # this case). #
7026 # #
7027 # Step 4. Approximate exp(R)-1 by a polynomial #
7028 # p = R+R*R*(A1+R*(A2+R*(A3+R*(A4+R*(A5+R*A6))))) #
7029 # Notes: a) In order to reduce memory access, the coefficients #
7030 # are made as "short" as possible: A1 (which is 1/2), A5 #
7031 # and A6 are single precision; A2, A3 and A4 are double #
7032 # precision. #
7033 # b) Even with the restriction above, #
7034 # |p - (exp(R)-1)| < |R| * 2^(-72.7) #
7035 # for all |R| <= 0.0055. #
7036 # c) To fully use the pipeline, p is separated into #
7037 # two independent pieces of roughly equal complexity #
7038 # p = [ R*S*(A2 + S*(A4 + S*A6)) ] + #
7039 # [ R + S*(A1 + S*(A3 + S*A5)) ] #
7040 # where S = R*R. #
7041 # #
7042 # Step 5. Compute 2^(J/64)*p by #
7043 # p := T*p #
7044 # where T and t are the stored values for 2^(J/64). #
7045 # Notes: 2^(J/64) is stored as T and t where T+t approximates #
7046 # 2^(J/64) to roughly 85 bits; T is in extended precision #
7047 # and t is in single precision. Note also that T is #
7048 # rounded to 62 bits so that the last two bits of T are #
7049 # zero. The reason for such a special form is that T-1, #
7050 # T-2, and T-8 will all be exact --- a property that will #
7051 # be exploited in Step 6 below. The total relative error #
7052 # in p is no bigger than 2^(-67.7) compared to the final #
7053 # result. #
7054 # #
7055 # Step 6. Reconstruction of exp(X)-1 #
7056 # exp(X)-1 = 2^M * ( 2^(J/64) + p - 2^(-M) ). #
7057 # 6.1 If M <= 63, go to Step 6.3. #
7058 # 6.2 ans := T + (p + (t + OnebySc)). Go to 6.6 #
7059 # 6.3 If M >= -3, go to 6.5. #
7060 # 6.4 ans := (T + (p + t)) + OnebySc. Go to 6.6 #
7061 # 6.5 ans := (T + OnebySc) + (p + t). #
7062 # 6.6 Restore user FPCR. #
7063 # 6.7 Return ans := Sc * ans. Exit. #
7064 # Notes: The various arrangements of the expressions give #
7065 # accurate evaluations. #
7066 # #
7067 # Step 7. exp(X)-1 for |X| < 1/4. #
7068 # 7.1 If |X| >= 2^(-65), go to Step 9. #
7069 # 7.2 Go to Step 8. #
7070 # #
7071 # Step 8. Calculate exp(X)-1, |X| < 2^(-65). #
7072 # 8.1 If |X| < 2^(-16312), goto 8.3 #
7073 # 8.2 Restore FPCR; return ans := X - 2^(-16382). #
7074 # Exit. #
7075 # 8.3 X := X * 2^(140). #
7076 # 8.4 Restore FPCR; ans := ans - 2^(-16382). #
7077 # Return ans := ans*2^(140). Exit #
7078 # Notes: The idea is to return "X - tiny" under the user #
7079 # precision and rounding modes. To avoid unnecessary #
7080 # inefficiency, we stay away from denormalized numbers #
7081 # the best we can. For |X| >= 2^(-16312), the #
7082 # straightforward 8.2 generates the inexact exception as #
7083 # the case warrants. #
7084 # #
7085 # Step 9. Calculate exp(X)-1, |X| < 1/4, by a polynomial #
7086 # p = X + X*X*(B1 + X*(B2 + ... + X*B12)) #
7087 # Notes: a) In order to reduce memory access, the coefficients #
7088 # are made as "short" as possible: B1 (which is 1/2), B9 #
7089 # to B12 are single precision; B3 to B8 are double #
7090 # precision; and B2 is double extended. #
7091 # b) Even with the restriction above, #
7092 # |p - (exp(X)-1)| < |X| 2^(-70.6) #
7093 # for all |X| <= 0.251. #
7094 # Note that 0.251 is slightly bigger than 1/4. #
7095 # c) To fully preserve accuracy, the polynomial is #
7096 # computed as #
7097 # X + ( S*B1 + Q ) where S = X*X and #
7098 # Q = X*S*(B2 + X*(B3 + ... + X*B12)) #
7099 # d) To fully use the pipeline, Q is separated into #
7100 # two independent pieces of roughly equal complexity #
7101 # Q = [ X*S*(B2 + S*(B4 + ... + S*B12)) ] + #
7102 # [ S*S*(B3 + S*(B5 + ... + S*B11)) ] #
7103 # #
7104 # Step 10. Calculate exp(X)-1 for |X| >= 70 log 2. #
7105 # 10.1 If X >= 70log2 , exp(X) - 1 = exp(X) for all #
7106 # practical purposes. Therefore, go to Step 1 of setox. #
7107 # 10.2 If X <= -70log2, exp(X) - 1 = -1 for all practical #
7108 # purposes. #
7109 # ans := -1 #
7110 # Restore user FPCR #
7111 # Return ans := ans + 2^(-126). Exit. #
7112 # Notes: 10.2 will always create an inexact and return -1 + tiny #
7113 # in the user rounding precision and mode. #
7114 # #
7115 #########################################################################
7137 long 0x00000000
7140 TWON140:
7143 EEXPTBL:
7209 set ADJFLAG,L_SCR2
7210 set SCALE,FP_SCR0
7211 set ADJSCALE,FP_SCR1
7213 set ONEBYSC,FP_SCR1
7215 global setox
7216 setox:
7217 #--entry point for EXP(X), here X is finite, non-zero, and not NaN's
7219 #--Step 1.
7224 bra EXPSM
7226 EXPC1:
7227 #--The case |X| >= 2^(-65)
7231 bra EEXPBIG
7233 EXPMAIN:
7234 #--Step 2.
7235 #--This is the normal branch: 2^(-65) <= |X| < 16380 log2.
7255 EXPCONT1:
7256 #--Step 3.
7257 #--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
7258 #--a0 points to 2^(J/64), D0 is biased expo. of 2^(M)
7265 #--Step 4.
7266 #--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
7267 #-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
7268 #--TO FULLY USE THE PIPELINE, WE COMPUTE S = R*R
7269 #--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]
7299 #--Step 5
7300 #--final reconstruction process
7301 #--EXP(X) = 2^M * ( 2^(J/64) + 2^(J/64)*(EXP(R)-1) )
7310 #--Step 6
7312 beq.b NORMAL
7313 ADJUST:
7315 NORMAL:
7319 bra t_catch
7321 EXPSM:
7322 #--Step 7
7326 bra t_pinx2
7328 EEXPBIG:
7329 #--Step 8
7331 bgt.b EXP2BIG
7332 #--Steps 8.2 -- 8.6
7357 bra.w EXPCONT1 # go back to Step 3
7359 EXP2BIG:
7360 #--Step 9
7362 bmi t_unfl2
7363 bra t_ovfl2
7365 global setoxd
7366 setoxd:
7367 #--entry point for EXP(X), X is denormalized
7376 bra t_pinx2
7378 global setoxm1
7379 setoxm1:
7380 #--entry point for EXPM1(X), here X is finite, non-zero, non-NaN
7382 #--Step 1.
7383 #--Step 1.1
7388 bra EM1SM
7390 EM1CON1:
7391 #--Step 1.3
7392 #--The case |X| >= 1/4
7396 bra EM1BIG
7398 EM1MAIN:
7399 #--Step 2.
7400 #--This is the case: 1/4 <= |X| <= 70 log2.
7418 #--Step 3.
7419 #--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
7420 #--a0 points to 2^(J/64), D0 and a1 both contain M
7428 #--Step 4.
7429 #--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
7430 #-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*(A5 + R*A6)))))
7431 #--TO FULLY USE THE PIPELINE, WE COMPUTE S = R*R
7432 #--[R*S*(A2+S*(A4+S*A6))] + [R+S*(A1+S*(A3+S*A5))]
7471 #--Step 5
7472 #--Compute 2^(J/64)*p
7476 #--Step 6
7477 #--Step 6.1
7480 ble.b MLE63
7481 #--Step 6.2 M >= 64
7486 bra EM1SCALE
7487 MLE63:
7488 #--Step 6.3 M <= 63
7490 bge.b MGEN3
7491 MLTN3:
7492 #--Step 6.4 M <= -4
7496 bra EM1SCALE
7497 MGEN3:
7498 #--Step 6.5 -3 <= M <= 63
7504 EM1SCALE:
7505 #--Step 6.6
7508 bra t_inx2
7510 EM1SM:
7511 #--Step 7 |X| < 1/4.
7513 bge.b EM1POLY
7515 EM1TINY:
7516 #--Step 8 |X| < 2^(-65)
7518 blt.b EM12TINY
7519 #--Step 8.2
7527 bra t_catch
7529 EM12TINY:
7530 #--Step 8.3
7540 bra t_catch
7542 EM1POLY:
7543 #--Step 9 exp(X)-1 by a simple polynomial
7591 bra t_inx2
7593 EM1BIG:
7594 #--Step 10 |X| > 70 log2
7597 bgt.w EXPC1
7598 #--Step 10.2
7602 bra t_minx2
7604 global setoxm1d
7605 setoxm1d:
7606 #--entry point for EXPM1(X), here X is denormalized
7607 #--Step 0.
7608 bra t_extdnrm
7610 #########################################################################
7611 # sgetexp(): returns the exponent portion of the input argument. #
7612 # The exponent bias is removed and the exponent value is #
7613 # returned as an extended precision number in fp0. #
7614 # sgetexpd(): handles denormalized numbers. #
7615 # #
7616 # sgetman(): extracts the mantissa of the input argument. The #
7617 # mantissa is converted to an extended precision number w/ #
7618 # an exponent of $3fff and is returned in fp0. The range of #
7619 # the result is [1.0 - 2.0). #
7620 # sgetmand(): handles denormalized numbers. #
7621 # #
7622 # INPUT *************************************************************** #
7623 # a0 = pointer to extended precision input #
7624 # #
7625 # OUTPUT ************************************************************** #
7626 # fp0 = exponent(X) or mantissa(X) #
7627 # #
7628 #########################################################################
7630 global sgetexp
7631 sgetexp:
7637 rts
7639 sgetexpn:
7641 rts
7643 global sgetexpd
7644 sgetexpd:
7650 rts
7652 global sgetman
7653 sgetman:
7658 # here, we build the result in a tmp location so as not to disturb the input
7664 rts
7666 sgetmann:
7668 rts
7670 #
7671 # For denormalized numbers, shift the mantissa until the j-bit = 1,
7672 # then load the exponent with +/1 $3fff.
7673 #
7674 global sgetmand
7675 sgetmand:
7677 bra.b sgetman
7679 #########################################################################
7680 # scosh(): computes the hyperbolic cosine of a normalized input #
7681 # scoshd(): computes the hyperbolic cosine of a denormalized input #
7682 # #
7683 # INPUT *************************************************************** #
7684 # a0 = pointer to extended precision input #
7685 # d0 = round precision,mode #
7686 # #
7687 # OUTPUT ************************************************************** #
7688 # fp0 = cosh(X) #
7689 # #
7690 # ACCURACY and MONOTONICITY ******************************************* #
7691 # The returned result is within 3 ulps in 64 significant bit, #
7692 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
7693 # rounded to double precision. The result is provably monotonic #
7694 # in double precision. #
7695 # #
7696 # ALGORITHM *********************************************************** #
7697 # #
7698 # COSH #
7699 # 1. If |X| > 16380 log2, go to 3. #
7700 # #
7701 # 2. (|X| <= 16380 log2) Cosh(X) is obtained by the formulae #
7702 # y = |X|, z = exp(Y), and #
7703 # cosh(X) = (1/2)*( z + 1/z ). #
7704 # Exit. #
7705 # #
7706 # 3. (|X| > 16380 log2). If |X| > 16480 log2, go to 5. #
7707 # #
7708 # 4. (16380 log2 < |X| <= 16480 log2) #
7709 # cosh(X) = sign(X) * exp(|X|)/2. #
7710 # However, invoking exp(|X|) may cause premature #
7711 # overflow. Thus, we calculate sinh(X) as follows: #
7712 # Y := |X| #
7713 # Fact := 2**(16380) #
7714 # Y' := Y - 16381 log2 #
7715 # cosh(X) := Fact * exp(Y'). #
7716 # Exit. #
7717 # #
7718 # 5. (|X| > 16480 log2) sinh(X) must overflow. Return #
7719 # Huge*Huge to generate overflow and an infinity with #
7720 # the appropriate sign. Huge is the largest finite number #
7721 # in extended format. Exit. #
7722 # #
7723 #########################################################################
7725 TWO16380:
7728 global scosh
7729 scosh:
7736 bgt.b COSHBIG
7738 #--THIS IS THE USUAL CASE, |X| < 16380 LOG2
7739 #--COSH(X) = (1/2) * ( EXP(X) + 1/EXP(X) )
7747 bsr setox # FP0 IS EXP(|X|)
7758 bra t_catch
7760 COSHBIG:
7762 bgt.b COSHHUGE
7772 bsr setox
7779 bra t_catch
7781 COSHHUGE:
7782 bra t_ovfl2
7784 global scoshd
7785 #--COSH(X) = 1 FOR DENORMALIZED X
7786 scoshd:
7791 bra t_pinx2
7793 #########################################################################
7794 # ssinh(): computes the hyperbolic sine of a normalized input #
7795 # ssinhd(): computes the hyperbolic sine of a denormalized input #
7796 # #
7797 # INPUT *************************************************************** #
7798 # a0 = pointer to extended precision input #
7799 # d0 = round precision,mode #
7800 # #
7801 # OUTPUT ************************************************************** #
7802 # fp0 = sinh(X) #
7803 # #
7804 # ACCURACY and MONOTONICITY ******************************************* #
7805 # The returned result is within 3 ulps in 64 significant bit, #
7806 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
7807 # rounded to double precision. The result is provably monotonic #
7808 # in double precision. #
7809 # #
7810 # ALGORITHM *********************************************************** #
7811 # #
7812 # SINH #
7813 # 1. If |X| > 16380 log2, go to 3. #
7814 # #
7815 # 2. (|X| <= 16380 log2) Sinh(X) is obtained by the formula #
7816 # y = |X|, sgn = sign(X), and z = expm1(Y), #
7817 # sinh(X) = sgn*(1/2)*( z + z/(1+z) ). #
7818 # Exit. #
7819 # #
7820 # 3. If |X| > 16480 log2, go to 5. #
7821 # #
7822 # 4. (16380 log2 < |X| <= 16480 log2) #
7823 # sinh(X) = sign(X) * exp(|X|)/2. #
7824 # However, invoking exp(|X|) may cause premature overflow. #
7825 # Thus, we calculate sinh(X) as follows: #
7826 # Y := |X| #
7827 # sgn := sign(X) #
7828 # sgnFact := sgn * 2**(16380) #
7829 # Y' := Y - 16381 log2 #
7830 # sinh(X) := sgnFact * exp(Y'). #
7831 # Exit. #
7832 # #
7833 # 5. (|X| > 16480 log2) sinh(X) must overflow. Return #
7834 # sign(X)*Huge*Huge to generate overflow and an infinity with #
7835 # the appropriate sign. Huge is the largest finite number in #
7836 # extended format. Exit. #
7837 # #
7838 #########################################################################
7840 global ssinh
7841 ssinh:
7849 bgt.b SINHBIG
7851 #--THIS IS THE USUAL CASE, |X| < 16380 LOG2
7852 #--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) )
7860 bsr setoxm1 # FP0 IS Z = EXPM1(Y)
7878 bra t_catch
7880 SINHBIG:
7882 bgt t_ovfl
7897 bsr setox
7904 bra t_catch
7906 global ssinhd
7907 #--SINH(X) = X FOR DENORMALIZED X
7908 ssinhd:
7909 bra t_extdnrm
7911 #########################################################################
7912 # stanh(): computes the hyperbolic tangent of a normalized input #
7913 # stanhd(): computes the hyperbolic tangent of a denormalized input #
7914 # #
7915 # INPUT *************************************************************** #
7916 # a0 = pointer to extended precision input #
7917 # d0 = round precision,mode #
7918 # #
7919 # OUTPUT ************************************************************** #
7920 # fp0 = tanh(X) #
7921 # #
7922 # ACCURACY and MONOTONICITY ******************************************* #
7923 # The returned result is within 3 ulps in 64 significant bit, #
7924 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
7925 # rounded to double precision. The result is provably monotonic #
7926 # in double precision. #
7927 # #
7928 # ALGORITHM *********************************************************** #
7929 # #
7930 # TANH #
7931 # 1. If |X| >= (5/2) log2 or |X| <= 2**(-40), go to 3. #
7932 # #
7933 # 2. (2**(-40) < |X| < (5/2) log2) Calculate tanh(X) by #
7934 # sgn := sign(X), y := 2|X|, z := expm1(Y), and #
7935 # tanh(X) = sgn*( z/(2+z) ). #
7936 # Exit. #
7937 # #
7938 # 3. (|X| <= 2**(-40) or |X| >= (5/2) log2). If |X| < 1, #
7939 # go to 7. #
7940 # #
7941 # 4. (|X| >= (5/2) log2) If |X| >= 50 log2, go to 6. #
7942 # #
7943 # 5. ((5/2) log2 <= |X| < 50 log2) Calculate tanh(X) by #
7944 # sgn := sign(X), y := 2|X|, z := exp(Y), #
7945 # tanh(X) = sgn - [ sgn*2/(1+z) ]. #
7946 # Exit. #
7947 # #
7948 # 6. (|X| >= 50 log2) Tanh(X) = +-1 (round to nearest). Thus, we #
7949 # calculate Tanh(X) by #
7950 # sgn := sign(X), Tiny := 2**(-126), #
7951 # tanh(X) := sgn - sgn*Tiny. #
7952 # Exit. #
7953 # #
7954 # 7. (|X| < 2**(-40)). Tanh(X) = X. Exit. #
7955 # #
7956 #########################################################################
7958 set X,FP_SCR0
7961 set SGN,L_SCR3
7963 set V,FP_SCR0
7965 global stanh
7966 stanh:
7975 blt.w TANHBORS # yes
7977 bgt.w TANHBORS # yes
7979 #--THIS IS THE USUAL CASE
7980 #--Y = 2|X|, Z = EXPM1(Y), TANH(X) = SIGN(X) * Z / (Z+2).
7994 bsr setoxm1 # FP0 IS Z = EXPM1(Y)
8006 bra t_inx2
8008 TANHBORS:
8010 blt.w TANHSM
8013 bgt.w TANHHUGE
8015 #-- (5/2) LOG2 < |X| < 50 LOG2,
8016 #--TANH(X) = 1 - (2/[EXP(2X)+1]). LET Y = 2|X|, SGN = SIGN(X),
8017 #--TANH(X) = SGN - SGN*2/[EXP(Y)+1].
8032 bsr setox # FP0 IS EXP(Y)
8049 bra t_inx2
8051 TANHSM:
8055 bra t_catch
8057 #---RETURN SGN(X) - SGN(X)EPS
8058 TANHHUGE:
8068 bra t_inx2
8070 global stanhd
8071 #--TANH(X) = X FOR DENORMALIZED X
8072 stanhd:
8073 bra t_extdnrm
8075 #########################################################################
8076 # slogn(): computes the natural logarithm of a normalized input #
8077 # slognd(): computes the natural logarithm of a denormalized input #
8078 # slognp1(): computes the log(1+X) of a normalized input #
8079 # slognp1d(): computes the log(1+X) of a denormalized input #
8080 # #
8081 # INPUT *************************************************************** #
8082 # a0 = pointer to extended precision input #
8083 # d0 = round precision,mode #
8084 # #
8085 # OUTPUT ************************************************************** #
8086 # fp0 = log(X) or log(1+X) #
8087 # #
8088 # ACCURACY and MONOTONICITY ******************************************* #
8089 # The returned result is within 2 ulps in 64 significant bit, #
8090 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
8091 # rounded to double precision. The result is provably monotonic #
8092 # in double precision. #
8093 # #
8094 # ALGORITHM *********************************************************** #
8095 # LOGN: #
8096 # Step 1. If |X-1| < 1/16, approximate log(X) by an odd #
8097 # polynomial in u, where u = 2(X-1)/(X+1). Otherwise, #
8098 # move on to Step 2. #
8099 # #
8100 # Step 2. X = 2**k * Y where 1 <= Y < 2. Define F to be the first #
8101 # seven significant bits of Y plus 2**(-7), i.e. #
8102 # F = 1.xxxxxx1 in base 2 where the six "x" match those #
8103 # of Y. Note that |Y-F| <= 2**(-7). #
8104 # #
8105 # Step 3. Define u = (Y-F)/F. Approximate log(1+u) by a #
8106 # polynomial in u, log(1+u) = poly. #
8107 # #
8108 # Step 4. Reconstruct #
8109 # log(X) = log( 2**k * Y ) = k*log(2) + log(F) + log(1+u) #
8110 # by k*log(2) + (log(F) + poly). The values of log(F) are #
8111 # calculated beforehand and stored in the program. #
8112 # #
8113 # lognp1: #
8114 # Step 1: If |X| < 1/16, approximate log(1+X) by an odd #
8115 # polynomial in u where u = 2X/(2+X). Otherwise, move on #
8116 # to Step 2. #
8117 # #
8118 # Step 2: Let 1+X = 2**k * Y, where 1 <= Y < 2. Define F as done #
8119 # in Step 2 of the algorithm for LOGN and compute #
8120 # log(1+X) as k*log(2) + log(F) + poly where poly #
8121 # approximates log(1+u), u = (Y-F)/F. #
8122 # #
8123 # Implementation Notes: #
8124 # Note 1. There are 64 different possible values for F, thus 64 #
8125 # log(F)'s need to be tabulated. Moreover, the values of #
8126 # 1/F are also tabulated so that the division in (Y-F)/F #
8127 # can be performed by a multiplication. #
8128 # #
8129 # Note 2. In Step 2 of lognp1, in order to preserved accuracy, #
8130 # the value Y-F has to be calculated carefully when #
8131 # 1/2 <= X < 3/2. #
8132 # #
8133 # Note 3. To fully exploit the pipeline, polynomials are usually #
8134 # separated into two parts evaluated independently before #
8135 # being added up. #
8136 # #
8137 #########################################################################
8138 LOGOF2:
8141 one:
8142 long 0x3F800000
8143 zero:
8144 long 0x00000000
8145 infty:
8146 long 0x7F800000
8147 negone:
8148 long 0xBF800000
8150 LOGA6:
8152 LOGA5:
8155 LOGA4:
8157 LOGA3:
8160 LOGA2:
8162 LOGA1:
8165 LOGB5:
8167 LOGB4:
8170 LOGB3:
8172 LOGB2:
8175 LOGB1:
8177 TWO:
8180 LTHOLD:
8183 LOGTBL:
8313 set ADJK,L_SCR1
8315 set X,FP_SCR0
8319 set F,FP_SCR1
8322 set KLOG2,FP_SCR0
8324 set SAVEU,FP_SCR0
8326 global slogn
8327 #--ENTRY POINT FOR LOG(X) FOR X FINITE, NON-ZERO, NOT NAN'S
8328 slogn:
8332 LOGBGN:
8333 #--FPCR SAVED AND CLEARED, INPUT IS 2^(ADJK)*FP0, FP0 CONTAINS
8334 #--A FINITE, NON-ZERO, NORMALIZED NUMBER.
8344 blt.w LOGNEG # LOG OF NEGATIVE ARGUMENT IS INVALID
8345 # X IS POSITIVE, CHECK IF X IS NEAR 1
8349 ble.w LOGNEAR1 # NO
8351 LOGMAIN:
8352 #--THIS SHOULD BE THE USUAL CASE, X NOT VERY CLOSE TO 1
8354 #--X = 2^(K) * Y, 1 <= Y < 2. THUS, Y = 1.XXXXXXXX....XX IN BINARY.
8355 #--WE DEFINE F = 1.XXXXXX1, I.E. FIRST 7 BITS OF Y AND ATTACH A 1.
8356 #--THE IDEA IS THAT LOG(X) = K*LOG2 + LOG(Y)
8357 #-- = K*LOG2 + LOG(F) + LOG(1 + (Y-F)/F).
8358 #--NOTE THAT U = (Y-F)/F IS VERY SMALL AND THUS APPROXIMATING
8359 #--LOG(1+U) CAN BE VERY EFFICIENT.
8360 #--ALSO NOTE THAT THE VALUE 1/F IS STORED IN A TABLE SO THAT NO
8361 #--DIVISION IS NEEDED TO CALCULATE (Y-F)/F.
8363 #--GET K, Y, F, AND ADDRESS OF 1/F.
8371 #--WHILE THE CONVERSION IS GOING ON, WE GET F AND ADDRESS OF 1/F
8388 #--SUMMARY: FP0 IS Y-F, A0 IS ADDRESS OF 1/F, FP1 IS K
8389 #--REGISTERS SAVED: FPCR, FP1, FP2
8391 LP1CONT1:
8392 #--AN RE-ENTRY POINT FOR LOGNP1
8399 #--LOG(1+U) IS APPROXIMATED BY
8400 #--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS
8401 #--[U + V*(A1+V*(A3+V*A5))] + [U*V*(A2+V*(A4+V*A6))]
8431 bra t_inx2
8434 LOGNEAR1:
8436 # if the input is exactly equal to one, then exit through ld_pzero.
8437 # if these 2 lines weren't here, the correct answer would be returned
8438 # but the INEX2 bit would be set.
8442 #--REGISTERS SAVED: FPCR, FP1. FP0 CONTAINS THE INPUT.
8447 #--LOG(X) = LOG(1+U/2)-LOG(1-U/2) WHICH IS AN ODD POLYNOMIAL
8448 #--IN U, U = 2(X-1)/(X+1) = FP1/FP0
8450 LP1CONT2:
8451 #--THIS IS AN RE-ENTRY POINT FOR LOGNP1
8454 #--REGISTERS SAVED ARE NOW FPCR,FP1,FP2,FP3
8455 #--LET V=U*U, W=V*V, CALCULATE
8456 #--U + U*V*(B1 + V*(B2 + V*(B3 + V*(B4 + V*B5)))) BY
8457 #--U + U*V*( [B1 + W*(B3 + W*B5)] + [V*(B2 + W*B4)] )
8487 bra t_inx2
8489 #--REGISTERS SAVED FPCR. LOG(-VE) IS INVALID
8490 LOGNEG:
8491 bra t_operr
8493 global slognd
8494 slognd:
8495 #--ENTRY POINT FOR LOG(X) FOR DENORMALIZED INPUT
8499 #----normalize the input value by left shifting k bits (k to be determined
8500 #----below), adjusting exponent and storing -k to ADJK
8501 #----the value TWOTO100 is no longer needed.
8502 #----Note that this code assumes the denormalized input is NON-ZERO.
8511 bne.b Hi_not0
8513 Hi_0:
8530 bra.w LOGBGN # begin regular log(X)
8532 Hi_not0:
8552 bra.w LOGBGN # begin regular log(X)
8554 global slognp1
8555 #--ENTRY POINT FOR LOG(1+X) FOR X FINITE, NON-ZERO, NOT NAN'S
8556 slognp1:
8560 fbgt.w LP1REAL # if greater, continue
8564 bra t_catch
8566 LP1REAL:
8575 ble.w LP1NEG0 # LOG OF ZERO OR -VE
8577 blt.w LOGMAIN
8579 bgt.w LOGMAIN
8580 #--IF 1+Z > 3/2 OR 1+Z < 1/2, THEN X, WHICH IS ROUNDING 1+Z,
8581 #--CONTAINS AT LEAST 63 BITS OF INFORMATION OF Z. IN THAT CASE,
8582 #--SIMPLY INVOKE LOG(X) FOR LOG(1+Z).
8584 LP1NEAR1:
8585 #--NEXT SEE IF EXP(-1/16) < X < EXP(1/16)
8587 blt.w LP1CARE
8589 bgt.w LP1CARE
8591 LP1ONE16:
8592 #--EXP(-1/16) < X < EXP(1/16). LOG(1+Z) = LOG(1+U/2) - LOG(1-U/2)
8593 #--WHERE U = 2Z/(2+Z) = 2Z/(1+X).
8596 #--U = FP1/FP0
8597 bra.w LP1CONT2
8599 LP1CARE:
8600 #--HERE WE USE THE USUAL TABLE DRIVEN APPROACH. CARE HAS TO BE
8601 #--TAKEN BECAUSE 1+Z CAN HAVE 67 BITS OF INFORMATION AND WE MUST
8602 #--PRESERVE ALL THE INFORMATION. BECAUSE 1+Z IS IN [1/2,3/2],
8603 #--THERE ARE ONLY TWO CASES.
8604 #--CASE 1: 1+Z < 1, THEN K = -1 AND Y-F = (2-F) + 2Z
8605 #--CASE 2: 1+Z > 1, THEN K = 0 AND Y-F = (1-F) + Z
8606 #--ON RETURNING TO LP1CONT1, WE MUST HAVE K IN FP1, ADDRESS OF
8607 #--(1/F) IN A0, Y-F IN FP0, AND FP2 SAVED.
8613 bge.b KISZERO
8615 KISNEG1:
8631 bra.w LP1CONT1
8633 KISZERO:
8648 bra.w LP1CONT1
8650 LP1NEG0:
8651 #--FPCR SAVED. D0 IS X IN COMPACT FORM.
8653 blt.b LP1NEG
8654 LP1ZERO:
8658 bra t_dz
8660 LP1NEG:
8664 bra t_operr
8666 global slognp1d
8667 #--ENTRY POINT FOR LOG(1+Z) FOR DENORMALIZED INPUT
8668 # Simply return the denorm
8669 slognp1d:
8670 bra t_extdnrm
8672 #########################################################################
8673 # satanh(): computes the inverse hyperbolic tangent of a norm input #
8674 # satanhd(): computes the inverse hyperbolic tangent of a denorm input #
8675 # #
8676 # INPUT *************************************************************** #
8677 # a0 = pointer to extended precision input #
8678 # d0 = round precision,mode #
8679 # #
8680 # OUTPUT ************************************************************** #
8681 # fp0 = arctanh(X) #
8682 # #
8683 # ACCURACY and MONOTONICITY ******************************************* #
8684 # The returned result is within 3 ulps in 64 significant bit, #
8685 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
8686 # rounded to double precision. The result is provably monotonic #
8687 # in double precision. #
8688 # #
8689 # ALGORITHM *********************************************************** #
8690 # #
8691 # ATANH #
8692 # 1. If |X| >= 1, go to 3. #
8693 # #
8694 # 2. (|X| < 1) Calculate atanh(X) by #
8695 # sgn := sign(X) #
8696 # y := |X| #
8697 # z := 2y/(1-y) #
8698 # atanh(X) := sgn * (1/2) * logp1(z) #
8699 # Exit. #
8700 # #
8701 # 3. If |X| > 1, go to 5. #
8702 # #
8703 # 4. (|X| = 1) Generate infinity with an appropriate sign and #
8704 # divide-by-zero by #
8705 # sgn := sign(X) #
8706 # atan(X) := sgn / (+0). #
8707 # Exit. #
8708 # #
8709 # 5. (|X| > 1) Generate an invalid operation by 0 * infinity. #
8710 # Exit. #
8711 # #
8712 #########################################################################
8714 global satanh
8715 satanh:
8720 bge.b ATANHBIG
8722 #--THIS IS THE USUAL CASE, |X| < 1
8723 #--Y = |X|, Z = 2Y/(1-Y), ATANH(X) = SIGN(X) * (1/2) * LOG1P(Z).
8740 bsr slognp1 # LOG1P(Z)
8747 bra t_catch
8749 ATANHBIG:
8752 fbgt t_operr
8753 bra t_dz
8755 global satanhd
8756 #--ATANH(X) = X FOR DENORMALIZED X
8757 satanhd:
8758 bra t_extdnrm
8760 #########################################################################
8761 # slog10(): computes the base-10 logarithm of a normalized input #
8762 # slog10d(): computes the base-10 logarithm of a denormalized input #
8763 # slog2(): computes the base-2 logarithm of a normalized input #
8764 # slog2d(): computes the base-2 logarithm of a denormalized input #
8765 # #
8766 # INPUT *************************************************************** #
8767 # a0 = pointer to extended precision input #
8768 # d0 = round precision,mode #
8769 # #
8770 # OUTPUT ************************************************************** #
8771 # fp0 = log_10(X) or log_2(X) #
8772 # #
8773 # ACCURACY and MONOTONICITY ******************************************* #
8774 # The returned result is within 1.7 ulps in 64 significant bit, #
8775 # i.e. within 0.5003 ulp to 53 bits if the result is subsequently #
8776 # rounded to double precision. The result is provably monotonic #
8777 # in double precision. #
8778 # #
8779 # ALGORITHM *********************************************************** #
8780 # #
8781 # slog10d: #
8782 # #
8783 # Step 0. If X < 0, create a NaN and raise the invalid operation #
8784 # flag. Otherwise, save FPCR in D1; set FpCR to default. #
8785 # Notes: Default means round-to-nearest mode, no floating-point #
8786 # traps, and precision control = double extended. #
8787 # #
8788 # Step 1. Call slognd to obtain Y = log(X), the natural log of X. #
8789 # Notes: Even if X is denormalized, log(X) is always normalized. #
8790 # #
8791 # Step 2. Compute log_10(X) = log(X) * (1/log(10)). #
8792 # 2.1 Restore the user FPCR #
8793 # 2.2 Return ans := Y * INV_L10. #
8794 # #
8795 # slog10: #
8796 # #
8797 # Step 0. If X < 0, create a NaN and raise the invalid operation #
8798 # flag. Otherwise, save FPCR in D1; set FpCR to default. #
8799 # Notes: Default means round-to-nearest mode, no floating-point #
8800 # traps, and precision control = double extended. #
8801 # #
8802 # Step 1. Call sLogN to obtain Y = log(X), the natural log of X. #
8803 # #
8804 # Step 2. Compute log_10(X) = log(X) * (1/log(10)). #
8805 # 2.1 Restore the user FPCR #
8806 # 2.2 Return ans := Y * INV_L10. #
8807 # #
8808 # sLog2d: #
8809 # #
8810 # Step 0. If X < 0, create a NaN and raise the invalid operation #
8811 # flag. Otherwise, save FPCR in D1; set FpCR to default. #
8812 # Notes: Default means round-to-nearest mode, no floating-point #
8813 # traps, and precision control = double extended. #
8814 # #
8815 # Step 1. Call slognd to obtain Y = log(X), the natural log of X. #
8816 # Notes: Even if X is denormalized, log(X) is always normalized. #
8817 # #
8818 # Step 2. Compute log_10(X) = log(X) * (1/log(2)). #
8819 # 2.1 Restore the user FPCR #
8820 # 2.2 Return ans := Y * INV_L2. #
8821 # #
8822 # sLog2: #
8823 # #
8824 # Step 0. If X < 0, create a NaN and raise the invalid operation #
8825 # flag. Otherwise, save FPCR in D1; set FpCR to default. #
8826 # Notes: Default means round-to-nearest mode, no floating-point #
8827 # traps, and precision control = double extended. #
8828 # #
8829 # Step 1. If X is not an integer power of two, i.e., X != 2^k, #
8830 # go to Step 3. #
8831 # #
8832 # Step 2. Return k. #
8833 # 2.1 Get integer k, X = 2^k. #
8834 # 2.2 Restore the user FPCR. #
8835 # 2.3 Return ans := convert-to-double-extended(k). #
8836 # #
8837 # Step 3. Call sLogN to obtain Y = log(X), the natural log of X. #
8838 # #
8839 # Step 4. Compute log_2(X) = log(X) * (1/log(2)). #
8840 # 4.1 Restore the user FPCR #
8841 # 4.2 Return ans := Y * INV_L2. #
8842 # #
8843 #########################################################################
8845 INV_L10:
8848 INV_L2:
8851 global slog10
8852 #--entry point for Log10(X), X is normalized
8853 slog10:
8859 blt.w invalid
8862 bsr slogn # log(X), X normal.
8865 bra t_inx2
8867 global slog10d
8868 #--entry point for Log10(X), X is denormalized
8869 slog10d:
8871 blt.w invalid
8874 bsr slognd # log(X), X denorm.
8877 bra t_minx2
8879 global slog2
8880 #--entry point for Log2(X), X is normalized
8881 slog2:
8883 blt.w invalid
8890 bne.b continue
8892 #--X = 2^k.
8896 beq.l ld_pzero
8899 bra t_inx2
8901 continue:
8904 bsr slogn # log(X), X normal.
8907 bra t_inx2
8909 invalid:
8910 bra t_operr
8912 global slog2d
8913 #--entry point for Log2(X), X is denormalized
8914 slog2d:
8916 blt.w invalid
8919 bsr slognd # log(X), X denorm.
8922 bra t_minx2
8924 #########################################################################
8925 # stwotox(): computes 2**X for a normalized input #
8926 # stwotoxd(): computes 2**X for a denormalized input #
8927 # stentox(): computes 10**X for a normalized input #
8928 # stentoxd(): computes 10**X for a denormalized input #
8929 # #
8930 # INPUT *************************************************************** #
8931 # a0 = pointer to extended precision input #
8932 # d0 = round precision,mode #
8933 # #
8934 # OUTPUT ************************************************************** #
8935 # fp0 = 2**X or 10**X #
8936 # #
8937 # ACCURACY and MONOTONICITY ******************************************* #
8938 # The returned result is within 2 ulps in 64 significant bit, #
8939 # i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
8940 # rounded to double precision. The result is provably monotonic #
8941 # in double precision. #
8942 # #
8943 # ALGORITHM *********************************************************** #
8944 # #
8945 # twotox #
8946 # 1. If |X| > 16480, go to ExpBig. #
8947 # #
8948 # 2. If |X| < 2**(-70), go to ExpSm. #
8949 # #
8950 # 3. Decompose X as X = N/64 + r where |r| <= 1/128. Furthermore #
8951 # decompose N as #
8952 # N = 64(M + M') + j, j = 0,1,2,...,63. #
8953 # #
8954 # 4. Overwrite r := r * log2. Then #
8955 # 2**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r). #
8956 # Go to expr to compute that expression. #
8957 # #
8958 # tentox #
8959 # 1. If |X| > 16480*log_10(2) (base 10 log of 2), go to ExpBig. #
8960 # #
8961 # 2. If |X| < 2**(-70), go to ExpSm. #
8962 # #
8963 # 3. Set y := X*log_2(10)*64 (base 2 log of 10). Set #
8964 # N := round-to-int(y). Decompose N as #
8965 # N = 64(M + M') + j, j = 0,1,2,...,63. #
8966 # #
8967 # 4. Define r as #
8968 # r := ((X - N*L1)-N*L2) * L10 #
8969 # where L1, L2 are the leading and trailing parts of #
8970 # log_10(2)/64 and L10 is the natural log of 10. Then #
8971 # 10**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r). #
8972 # Go to expr to compute that expression. #
8973 # #
8974 # expr #
8975 # 1. Fetch 2**(j/64) from table as Fact1 and Fact2. #
8976 # #
8977 # 2. Overwrite Fact1 and Fact2 by #
8978 # Fact1 := 2**(M) * Fact1 #
8979 # Fact2 := 2**(M) * Fact2 #
8980 # Thus Fact1 + Fact2 = 2**(M) * 2**(j/64). #
8981 # #
8982 # 3. Calculate P where 1 + P approximates exp(r): #
8983 # P = r + r*r*(A1+r*(A2+...+r*A5)). #
8984 # #
8985 # 4. Let AdjFact := 2**(M'). Return #
8986 # AdjFact * ( Fact1 + ((Fact1*P) + Fact2) ). #
8987 # Exit. #
8988 # #
8989 # ExpBig #
8990 # 1. Generate overflow by Huge * Huge if X > 0; otherwise, #
8991 # generate underflow by Tiny * Tiny. #
8992 # #
8993 # ExpSm #
8994 # 1. Return 1 + X. #
8995 # #
8996 #########################################################################
8998 L2TEN64:
9000 L10TWO1:
9003 L10TWO2:
9016 TEXPTBL:
9082 set INT,L_SCR1
9084 set X,FP_SCR0
9088 set ADJFACT,FP_SCR0
9090 set FACT1,FP_SCR0
9094 set FACT2,FP_SCR1
9098 global stwotox
9099 #--ENTRY POINT FOR 2**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
9100 stwotox:
9109 bge.b TWOOK1
9110 bra.w EXPBORS
9112 TWOOK1:
9114 ble.b TWOMAIN
9115 bra.w EXPBORS
9117 TWOMAIN:
9118 #--USUAL CASE, 2^(-70) <= |X| <= 16480
9137 #--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
9138 #--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
9139 #--ADJFACT = 2^(M').
9140 #--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.
9159 bra.w expr
9161 EXPBORS:
9162 #--FPCR, D0 SAVED
9164 bgt.b TEXPBIG
9166 #--|X| IS SMALL, RETURN 1 + X
9170 bra t_pinx2
9172 TEXPBIG:
9173 #--|X| IS LARGE, GENERATE OVERFLOW IF X > 0; ELSE GENERATE UNDERFLOW
9174 #--REGISTERS SAVE SO FAR ARE FPCR AND D0
9177 blt.b EXPNEG
9179 bra t_ovfl2 # t_ovfl expects positive value
9181 EXPNEG:
9182 bra t_unfl2 # t_unfl expects positive value
9184 global stwotoxd
9185 stwotoxd:
9186 #--ENTRY POINT FOR 2**(X) FOR DENORMALIZED ARGUMENT
9193 bra t_pinx2
9195 global stentox
9196 #--ENTRY POINT FOR 10**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
9197 stentox:
9206 bge.b TENOK1
9207 bra.w EXPBORS
9209 TENOK1:
9211 ble.b TENMAIN
9212 bra.w EXPBORS
9214 TENMAIN:
9215 #--USUAL CASE, 2^(-70) <= |X| <= 16480 LOG 2 / LOG 10
9234 #--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
9235 #--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
9236 #--ADJFACT = 2^(M').
9237 #--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.
9262 expr:
9263 #--FPCR, FP2, FP3 ARE SAVED IN ORDER AS SHOWN.
9264 #--ADJFACT CONTAINS 2**(M'), FACT1 + FACT2 = 2**(M) * 2**(J/64).
9265 #--FP0 IS R. THE FOLLOWING CODE COMPUTES
9266 #-- 2**(M'+M) * 2**(J/64) * EXP(R)
9292 #--FINAL RECONSTRUCTION PROCESS
9293 #--EXP(X) = 2^M*2^(J/64) + 2^M*2^(J/64)*(EXP(R)-1) - (1 OR 0)
9306 bra t_catch
9308 global stentoxd
9309 stentoxd:
9310 #--ENTRY POINT FOR 10**(X) FOR DENORMALIZED ARGUMENT
9317 bra t_pinx2
9319 #########################################################################
9320 # smovcr(): returns the ROM constant at the offset specified in d1 #
9321 # rounded to the mode and precision specified in d0. #
9322 # #
9323 # INPUT *************************************************************** #
9324 # d0 = rnd prec,mode #
9325 # d1 = ROM offset #
9326 # #
9327 # OUTPUT ************************************************************** #
9328 # fp0 = the ROM constant rounded to the user's rounding mode,prec #
9329 # #
9330 #########################################################################
9332 global smovcr
9333 smovcr:
9345 #
9346 # check range of offset
9347 #
9359 z_val:
9362 #
9363 # the answer is PI rounded to the proper precision.
9364 #
9365 # fetch a pointer to the answer table relating to the proper rounding
9366 # precision.
9367 #
9368 pi_tbl:
9371 pi_rn:
9373 bra.w set_finx
9374 pi_not_rn:
9377 pi_rzrm:
9379 bra.b set_finx
9380 pi_rp:
9382 bra.b set_finx
9384 #
9385 # the answer is one of:
9386 # $0B log10(2) (inexact)
9387 # $0C e (inexact)
9388 # $0D log2(e) (inexact)
9389 # $0E log10(e) (exact)
9390 #
9391 # fetch a pointer to the answer table relating to the proper rounding
9392 # precision.
9393 #
9394 sm_tbl:
9398 sm_rn:
9400 sm_tbl_cont:
9404 sm_not_rn:
9407 sm_rzrm:
9409 bra.b sm_tbl_cont
9410 sm_rp:
9412 bra.b sm_tbl_cont
9414 #
9415 # the answer is one of:
9416 # $30 ln(2) (inexact)
9417 # $31 ln(10) (inexact)
9418 # $32 10^0 (exact)
9419 # $33 10^1 (exact)
9420 # $34 10^2 (exact)
9421 # $35 10^4 (exact)
9422 # $36 10^8 (exact)
9423 # $37 10^16 (exact)
9424 # $38 10^32 (inexact)
9425 # $39 10^64 (inexact)
9426 # $3A 10^128 (inexact)
9427 # $3B 10^256 (inexact)
9428 # $3C 10^512 (inexact)
9429 # $3D 10^1024 (inexact)
9430 # $3E 10^2048 (inexact)
9431 # $3F 10^4096 (inexact)
9432 #
9433 # fetch a pointer to the answer table relating to the proper rounding
9434 # precision.
9435 #
9436 bg_tbl:
9440 bg_rn:
9442 bg_tbl_cont:
9448 bg_not_rn:
9451 bg_rzrm:
9453 bra.b bg_tbl_cont
9454 bg_rp:
9456 bra.b bg_tbl_cont
9458 # answer is inexact, so set INEX2 and AINEX in the user's FPSR.
9459 set_finx:
9461 no_finx:
9468 # Precision is extended
9470 rts
9472 # Precision is single or double
9473 not_ext:
9476 # call round() to round the answer to the proper precision.
9477 # exponents out of range for single or double DO NOT cause underflow
9478 # or overflow.
9489 rts
9491 align 0x4
9503 SMALRZRM:
9534 BIGRZRM:
9553 BIGRP:
9572 #########################################################################
9573 # sscale(): computes the destination operand scaled by the source #
9574 # operand. If the absoulute value of the source operand is #
9575 # >= 2^14, an overflow or underflow is returned. #
9576 # #
9577 # INPUT *************************************************************** #
9578 # a0 = pointer to double-extended source operand X #
9579 # a1 = pointer to double-extended destination operand Y #
9580 # #
9581 # OUTPUT ************************************************************** #
9582 # fp0 = scale(X,Y) #
9583 # #
9584 #########################################################################
9586 set SIGN, L_SCR1
9588 global sscale
9589 sscale:
9599 blt.w src_small # yes
9601 bgt.w src_out # yes
9603 #
9604 # Source is within 2^14 range.
9605 #
9606 src_ok:
9609 # don't want any accrued bits from the fintrz showing up later since
9610 # we may need to read the fpsr for the last fp op in t_catch2().
9614 bmi.b sok_norm
9616 # the dst is a DENORM. normalize the DENORM and add the adjustment to
9617 # the src value. then, jump to the norm part of the routine.
9618 sok_dnrm:
9635 # the multiply factor that we're trying to create should be a denorm
9636 # for the multiply to work. therefore, we're going to actually do a
9637 # multiply with a denorm which will cause an unimplemented data type
9638 # exception to be put into the machine which will be caught and corrected
9639 # later. we don't do this with the DENORMs above because this method
9640 # is slower. but, don't fret, I don't see it being used much either.
9651 bra.b sok_norm_cont
9652 sok_dnrm_32:
9658 bra.b sok_norm_cont
9660 # the src will force the dst to a DENORM value or worse. so, let's
9661 # create an fp multiply that will create the result.
9662 sok_norm:
9664 sok_norm2:
9673 sok_norm_cont:
9677 bra t_catch2 # catch any exceptions
9679 #
9680 # Source is outside of 2^14 range. Test the sign and branch
9681 # to the appropriate exception handler.
9682 #
9683 src_out:
9687 bmi t_unfl # yes; underflow
9688 bra t_ovfl_sc # no; overflow
9690 #
9691 # The source input is below 1, so we check for denormalized numbers
9692 # and set unfl.
9693 #
9694 src_small:
9702 bra t_catch2
9703 ssmall_done:
9706 bra t_resdnrm
9708 #########################################################################
9709 # smod(): computes the fp MOD of the input values X,Y. #
9710 # srem(): computes the fp (IEEE) REM of the input values X,Y. #
9711 # #
9712 # INPUT *************************************************************** #
9713 # a0 = pointer to extended precision input X #
9714 # a1 = pointer to extended precision input Y #
9715 # d0 = round precision,mode #
9716 # #
9717 # The input operands X and Y can be either normalized or #
9718 # denormalized. #
9719 # #
9720 # OUTPUT ************************************************************** #
9721 # fp0 = FREM(X,Y) or FMOD(X,Y) #
9722 # #
9723 # ALGORITHM *********************************************************** #
9724 # #
9725 # Step 1. Save and strip signs of X and Y: signX := sign(X), #
9726 # signY := sign(Y), X := |X|, Y := |Y|, #
9727 # signQ := signX EOR signY. Record whether MOD or REM #
9728 # is requested. #
9729 # #
9730 # Step 2. Set L := expo(X)-expo(Y), k := 0, Q := 0. #
9731 # If (L < 0) then #
9732 # R := X, go to Step 4. #
9733 # else #
9734 # R := 2^(-L)X, j := L. #
9735 # endif #
9736 # #
9737 # Step 3. Perform MOD(X,Y) #
9738 # 3.1 If R = Y, go to Step 9. #
9739 # 3.2 If R > Y, then { R := R - Y, Q := Q + 1} #
9740 # 3.3 If j = 0, go to Step 4. #
9741 # 3.4 k := k + 1, j := j - 1, Q := 2Q, R := 2R. Go to #
9742 # Step 3.1. #
9743 # #
9744 # Step 4. At this point, R = X - QY = MOD(X,Y). Set #
9745 # Last_Subtract := false (used in Step 7 below). If #
9746 # MOD is requested, go to Step 6. #
9747 # #
9748 # Step 5. R = MOD(X,Y), but REM(X,Y) is requested. #
9749 # 5.1 If R < Y/2, then R = MOD(X,Y) = REM(X,Y). Go to #
9750 # Step 6. #
9751 # 5.2 If R > Y/2, then { set Last_Subtract := true, #
9752 # Q := Q + 1, Y := signY*Y }. Go to Step 6. #
9753 # 5.3 This is the tricky case of R = Y/2. If Q is odd, #
9754 # then { Q := Q + 1, signX := -signX }. #
9755 # #
9756 # Step 6. R := signX*R. #
9757 # #
9758 # Step 7. If Last_Subtract = true, R := R - Y. #
9759 # #
9760 # Step 8. Return signQ, last 7 bits of Q, and R as required. #
9761 # #
9762 # Step 9. At this point, R = 2^(-j)*X - Q Y = Y. Thus, #
9763 # X = 2^(j)*(Q+1)Y. set Q := 2^(j)*(Q+1), #
9764 # R := 0. Return signQ, last 7 bits of Q, and R. #
9765 # #
9766 #########################################################################
9768 set Mod_Flag,L_SCR3
9771 set SignY,L_SCR2
9775 set Y,FP_SCR0
9779 set R,FP_SCR1
9783 Scale:
9786 global smod
9787 smod:
9791 bra.b Mod_Rem
9793 global srem
9794 srem:
9799 Mod_Rem:
9800 #..Save sign of X and Y
9806 #
9811 bne.b Y_Normal
9815 bne.b HiY_not0
9817 HiY_0:
9825 # ...with bias $7FFD
9826 bra.b Chk_X
9828 HiY_not0:
9839 # ...with bias $7FFD
9840 bra.b Chk_X
9842 Y_Normal:
9844 # ...with bias $7FFD
9846 Chk_X:
9857 bne.b X_Normal
9860 bne.b HiX_not0
9862 HiX_0:
9870 # ...with bias $7FFD
9871 bra.b Init
9873 HiX_not0:
9884 # ...with bias $7FFD
9885 bra.b Init
9887 X_Normal:
9889 # ...with bias $7FFD
9891 Init:
9892 #
9901 #..(Carry,D1,D2) is R
9903 bge.b Mod_Loop_pre
9905 #..expo(X) < expo(Y). Thus X = mod(X,Y)
9906 #
9908 bra.w Get_Mod
9910 Mod_Loop_pre:
9912 #..At this point R = 2^(-L)X; Q = 0; k = 0; and k+j = L
9913 Mod_Loop:
9915 bgt.b R_GT_Y
9917 #..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
9919 bne.b R_NE_Y
9921 bne.b R_NE_Y
9923 #..At this point, R = Y
9924 bra.w Rem_is_0
9926 R_NE_Y:
9927 #..use the borrow of the previous compare
9930 R_GT_Y:
9931 #..If Carry is set, then Y < (Carry,D1,D2) < 2Y. Otherwise, Carry = 0
9932 #..and Y < (D1,D2) < 2Y. Either way, perform R - Y
9938 R_LT_Y:
9939 #..At this point, Carry=0, R < Y. R = 2^(k-L)X - QY; k+j = L; j >= 0.
9941 beq.b PostLoop
9949 #..At this point, R=(Carry,D1,D2) = 2^(k-L)X - QY, j+k=L, j >= 0, R < 2Y.
9951 bra.b Mod_Loop
9953 PostLoop:
9954 #..k = L, j = 0, Carry = 0, R = (D1,D2) = X - QY, R < Y.
9956 #..normalize R.
9959 bne.b HiR_not0
9961 HiR_0:
9969 # ...with bias $7FFD
9970 bra.b Get_Mod
9972 HiR_not0:
9985 #
9986 Get_Mod:
9988 bge.b No_Scale
9989 Do_Scale:
9999 bra.b ModOrRem
10000 No_Scale:
10014 #
10015 ModOrRem:
10017 beq.b Fix_Sign
10022 blt.b Fix_Sign
10023 bgt.b Last_Sub
10026 bne.b Not_EQ
10028 bne.b Not_EQ
10029 bra.w Tie_Case
10031 Not_EQ:
10032 bcs.b Fix_Sign
10034 Last_Sub:
10035 #
10039 #
10040 Fix_Sign:
10041 #..Get sign of X
10043 bge.b Get_Q
10046 #..Get Q
10047 #
10048 Get_Q:
10055 # swap %d3
10056 # fmov.l %fpsr,%d6
10057 # and.l &0xFF00FFFF,%d6
10058 # or.l %d3,%d6
10059 # fmov.l %d6,%fpsr # put Q in fpsr
10062 #
10063 Restore:
10068 beq.b Finish
10071 bra t_catch2
10072 # the '040 package did this apparently to see if the dst operand for the
10073 # preceding fmul was a denorm. but, it better not have been since the
10074 # algorithm just got done playing with fp0 and expected no exceptions
10075 # as a result. trust me...
10076 # bra t_avoid_unsupp # check for denorm as a
10077 # ;result of the scaling
10079 Finish:
10082 bra t_catch2
10084 Rem_is_0:
10085 #..R = 2^(-j)X - Q Y = Y, thus R = 0 and quotient = 2^j (Q+1)
10088 bge.b Q_Big
10091 bra.b Set_R_0
10093 Q_Big:
10096 Set_R_0:
10099 bra.w Fix_Sign
10101 Tie_Case:
10102 #..Check parity of Q
10106 beq.w Fix_Sign # Q is even
10108 #..Q is odd, Q := Q + 1, signX := -signX
10113 bra.w Fix_Sign
10117 #########################################################################
10118 # XDEF **************************************************************** #
10119 # t_dz(): Handle DZ exception during transcendental emulation. #
10120 # Sets N bit according to sign of source operand. #
10121 # t_dz2(): Handle DZ exception during transcendental emulation. #
10122 # Sets N bit always. #
10123 # #
10124 # XREF **************************************************************** #
10125 # None #
10126 # #
10127 # INPUT *************************************************************** #
10128 # a0 = pointer to source operand #
10129 # #
10130 # OUTPUT ************************************************************** #
10131 # fp0 = default result #
10132 # #
10133 # ALGORITHM *********************************************************** #
10134 # - Store properly signed INF into fp0. #
10135 # - Set FPSR exception status dz bit, ccode inf bit, and #
10136 # accrued dz bit. #
10137 # #
10138 #########################################################################
10140 global t_dz
10141 t_dz:
10145 dz_pinf:
10148 rts
10150 global t_dz2
10151 t_dz2:
10154 rts
10156 #################################################################
10157 # OPERR exception: #
10158 # - set FPSR exception status operr bit, condition code #
10159 # nan bit; Store default NAN into fp0 #
10160 #################################################################
10161 global t_operr
10162 t_operr:
10165 rts
10167 #################################################################
10168 # Extended DENORM: #
10169 # - For all functions that have a denormalized input and #
10170 # that f(x)=x, this is the entry point. #
10171 # - we only return the EXOP here if either underflow or #
10172 # inexact is enabled. #
10173 #################################################################
10175 # Entry point for scale w/ extended denorm. The function does
10176 # NOT set INEX2/AUNFL/AINEX.
10177 global t_resdnrm
10178 t_resdnrm:
10180 bra.b xdnrm_con
10182 global t_extdnrm
10183 t_extdnrm:
10186 xdnrm_con:
10192 # result precision is extended.
10197 bra.b xdnrm_exit
10199 # result precision is single or double
10200 xdnrm_sd:
10204 bsr.l unf_sub
10206 xdnrm_exit:
10212 rts
10214 ################
10215 # unfl enabled #
10216 ################
10217 # we have a DENORM that needs to be converted into an EXOP.
10218 # so, normalize the mantissa, add 0x6000 to the new exponent,
10219 # and return the result in fp1.
10220 xdnrm_ena:
10232 rts
10234 #################################################################
10235 # UNFL exception: #
10236 # - This routine is for cases where even an EXOP isn't #
10237 # large enough to hold the range of this result. #
10238 # In such a case, the EXOP equals zero. #
10239 # - Return the default result to the proper precision #
10240 # with the sign of this result being the same as that #
10241 # of the src operand. #
10242 # - t_unfl2() is provided to force the result sign to #
10243 # positive which is the desired result for fetox(). #
10244 #################################################################
10245 global t_unfl
10246 t_unfl:
10255 rts
10257 # t_unfl2 ALWAYS tells unf_sub to create a positive result
10258 global t_unfl2
10259 t_unfl2:
10267 rts
10269 #################################################################
10270 # OVFL exception: #
10271 # - This routine is for cases where even an EXOP isn't #
10272 # large enough to hold the range of this result. #
10273 # - Return the default result to the proper precision #
10274 # with the sign of this result being the same as that #
10275 # of the src operand. #
10276 # - t_ovfl2() is provided to force the result sign to #
10277 # positive which is the desired result for fcosh(). #
10278 # - t_ovfl_sc() is provided for scale() which only sets #
10279 # the inexact bits if the number is inexact for the #
10280 # precision indicated. #
10281 #################################################################
10283 global t_ovfl_sc
10284 t_ovfl_sc:
10294 # dst op is a DENORM. we have to normalize the mantissa to see if the
10295 # result would be inexact for the given precision. make a copy of the
10296 # dst so we don't screw up the version passed to us.
10305 ovfl_sc_norm:
10308 ovfl_sc_sgl:
10314 ovfl_sc_dbl:
10318 ovfl_sc_inx:
10322 global t_ovfl
10323 t_ovfl:
10326 ovfl_work:
10334 rts
10336 # t_ovfl2 ALWAYS tells ovf_res to create a positive result
10337 global t_ovfl2
10338 t_ovfl2:
10347 rts
10349 #################################################################
10350 # t_catch(): #
10351 # - the last operation of a transcendental emulation #
10352 # routine may have caused an underflow or overflow. #
10353 # we find out if this occurred by doing an fsave and #
10354 # checking the exception bit. if one did occur, then we #
10355 # jump to fgen_except() which creates the default #
10356 # result and EXOP for us. #
10357 #################################################################
10358 global t_catch
10359 t_catch:
10363 bmi.b catch
10366 #################################################################
10367 # INEX2 exception: #
10368 # - The inex2 and ainex bits are set. #
10369 #################################################################
10370 global t_inx2
10371 t_inx2:
10372 fblt.w t_minx2
10373 fbeq.w inx2_zero
10375 global t_pinx2
10376 t_pinx2:
10378 rts
10380 global t_minx2
10381 t_minx2:
10383 rts
10385 inx2_zero:
10388 rts
10390 # an underflow or overflow exception occurred.
10391 # we must set INEX/AINEX since the fmul/fdiv/fmov emulation may not!
10392 catch:
10394 catch2:
10395 bsr.l fgen_except
10397 rts
10399 global t_catch2
10400 t_catch2:
10405 bmi.b catch2
10411 rts
10413 #########################################################################
10415 #########################################################################
10416 # unf_res(): underflow default result calculation for transcendentals #
10417 # #
10418 # INPUT: #
10419 # d0 : rnd mode,precision #
10420 # d1.b : sign bit of result ('11111111 = (-) ; '00000000 = (+)) #
10421 # OUTPUT: #
10422 # a0 : points to result (in instruction memory) #
10423 #########################################################################
10424 unf_sub:
10438 rts
10440 tbl_unf_cc:
10449 tbl_unf_result:
10485 ############################################################
10487 #########################################################################
10488 # src_zero(): Return signed zero according to sign of src operand. #
10489 #########################################################################
10490 global src_zero
10491 src_zero:
10495 #
10496 # ld_pzero(): return a positive zero.
10497 #
10498 global ld_pzero
10499 ld_pzero:
10502 rts
10504 # ld_mzero(): return a negative zero.
10505 global ld_mzero
10506 ld_mzero:
10509 rts
10511 #########################################################################
10512 # dst_zero(): Return signed zero according to sign of dst operand. #
10513 #########################################################################
10514 global dst_zero
10515 dst_zero:
10520 #########################################################################
10521 # src_inf(): Return signed inf according to sign of src operand. #
10522 #########################################################################
10523 global src_inf
10524 src_inf:
10528 #
10529 # ld_pinf(): return a positive infinity.
10530 #
10531 global ld_pinf
10532 ld_pinf:
10535 rts
10537 #
10538 # ld_minf():return a negative infinity.
10539 #
10540 global ld_minf
10541 ld_minf:
10544 rts
10546 #########################################################################
10547 # dst_inf(): Return signed inf according to sign of dst operand. #
10548 #########################################################################
10549 global dst_inf
10550 dst_inf:
10553 bra.b ld_pinf
10555 global szr_inf
10556 #################################################################
10557 # szr_inf(): Return +ZERO for a negative src operand or #
10558 # +INF for a positive src operand. #
10559 # Routine used for fetox, ftwotox, and ftentox. #
10560 #################################################################
10561 szr_inf:
10563 bmi.b ld_pzero
10564 bra.b ld_pinf
10566 #########################################################################
10567 # sopr_inf(): Return +INF for a positive src operand or #
10568 # jump to operand error routine for a negative src operand. #
10569 # Routine used for flogn, flognp1, flog10, and flog2. #
10570 #########################################################################
10571 global sopr_inf
10572 sopr_inf:
10574 bmi.w t_operr
10575 bra.b ld_pinf
10577 #################################################################
10578 # setoxm1i(): Return minus one for a negative src operand or #
10579 # positive infinity for a positive src operand. #
10580 # Routine used for fetoxm1. #
10581 #################################################################
10582 global setoxm1i
10583 setoxm1i:
10585 bmi.b ld_mone
10586 bra.b ld_pinf
10588 #########################################################################
10589 # src_one(): Return signed one according to sign of src operand. #
10590 #########################################################################
10591 global src_one
10592 src_one:
10594 bmi.b ld_mone
10596 #
10597 # ld_pone(): return positive one.
10598 #
10599 global ld_pone
10600 ld_pone:
10603 rts
10605 #
10606 # ld_mone(): return negative one.
10607 #
10608 global ld_mone
10609 ld_mone:
10612 rts
10617 #################################################################
10618 # spi_2(): Return signed PI/2 according to sign of src operand. #
10619 #################################################################
10620 global spi_2
10621 spi_2:
10623 bmi.b ld_mpi2
10625 #
10626 # ld_ppi2(): return positive PI/2.
10627 #
10628 global ld_ppi2
10629 ld_ppi2:
10632 bra.w t_pinx2 # set INEX2
10634 #
10635 # ld_mpi2(): return negative PI/2.
10636 #
10637 global ld_mpi2
10638 ld_mpi2:
10641 bra.w t_minx2 # set INEX2
10643 ####################################################
10644 # The following routines give support for fsincos. #
10645 ####################################################
10647 #
10648 # ssincosz(): When the src operand is ZERO, store a one in the
10649 # cosine register and return a ZERO in fp0 w/ the same sign
10650 # as the src operand.
10651 #
10652 global ssincosz
10653 ssincosz:
10656 bpl.b sincoszp
10660 sincoszp:
10665 #
10666 # ssincosi(): When the src operand is INF, store a QNAN in the cosine
10667 # register and jump to the operand error routine for negative
10668 # src operands.
10669 #
10670 global ssincosi
10671 ssincosi:
10674 bra.w t_operr
10676 #
10677 # ssincosqnan(): When the src operand is a QNAN, store the QNAN in the cosine
10678 # register and branch to the src QNAN routine.
10679 #
10680 global ssincosqnan
10681 ssincosqnan:
10683 bsr.l sto_cos
10684 bra.w src_qnan
10686 #
10687 # ssincossnan(): When the src operand is an SNAN, store the SNAN w/ the SNAN bit set
10688 # in the cosine register and branch to the src SNAN routine.
10689 #
10690 global ssincossnan
10691 ssincossnan:
10693 bsr.l sto_cos
10694 bra.w src_snan
10696 ########################################################################
10698 #########################################################################
10699 # sto_cos(): store fp1 to the fpreg designated by the CMDREG dst field. #
10700 # fp1 holds the result of the cosine portion of ssincos(). #
10701 # the value in fp1 will not take any exceptions when moved. #
10702 # INPUT: #
10703 # fp1 : fp value to store #
10704 # MODIFIED: #
10705 # d0 #
10706 #########################################################################
10707 global sto_cos
10708 sto_cos:
10714 tbl_sto_cos:
10715 short sto_cos_0 - tbl_sto_cos
10716 short sto_cos_1 - tbl_sto_cos
10717 short sto_cos_2 - tbl_sto_cos
10718 short sto_cos_3 - tbl_sto_cos
10719 short sto_cos_4 - tbl_sto_cos
10720 short sto_cos_5 - tbl_sto_cos
10721 short sto_cos_6 - tbl_sto_cos
10722 short sto_cos_7 - tbl_sto_cos
10724 sto_cos_0:
10726 rts
10727 sto_cos_1:
10729 rts
10730 sto_cos_2:
10732 rts
10733 sto_cos_3:
10735 rts
10736 sto_cos_4:
10738 rts
10739 sto_cos_5:
10741 rts
10742 sto_cos_6:
10744 rts
10745 sto_cos_7:
10747 rts
10749 ##################################################################
10750 global smod_sdnrm
10751 global smod_snorm
10752 smod_sdnrm:
10753 smod_snorm:
10755 beq.l smod
10757 beq.w smod_zro
10759 beq.l t_operr
10761 beq.l smod
10763 beq.l dst_snan
10764 bra.l dst_qnan
10766 global smod_szero
10767 smod_szero:
10769 beq.l t_operr
10771 beq.l t_operr
10773 beq.l t_operr
10775 beq.l t_operr
10777 beq.l dst_qnan
10778 bra.l dst_snan
10780 global smod_sinf
10781 smod_sinf:
10783 beq.l smod_fpn
10785 beq.l smod_zro
10787 beq.l t_operr
10789 beq.l smod_fpn
10791 beq.l dst_qnan
10792 bra.l dst_snan
10794 smod_zro:
10795 srem_zro:
10802 bpl.w ld_pzero
10803 bra.w ld_mzero
10805 smod_fpn:
10806 srem_fpn:
10815 bne.b smod_nrm
10818 bra t_resdnrm
10819 smod_nrm:
10823 bmi.b smod_nrm_neg
10824 rts
10826 smod_nrm_neg:
10828 rts
10830 #########################################################################
10831 global srem_snorm
10832 global srem_sdnrm
10833 srem_sdnrm:
10834 srem_snorm:
10836 beq.l srem
10838 beq.w srem_zro
10840 beq.l t_operr
10842 beq.l srem
10844 beq.l dst_qnan
10845 bra.l dst_snan
10847 global srem_szero
10848 srem_szero:
10850 beq.l t_operr
10852 beq.l t_operr
10854 beq.l t_operr
10856 beq.l t_operr
10858 beq.l dst_qnan
10859 bra.l dst_snan
10861 global srem_sinf
10862 srem_sinf:
10864 beq.w srem_fpn
10866 beq.w srem_zro
10868 beq.l t_operr
10870 beq.l srem_fpn
10872 beq.l dst_qnan
10873 bra.l dst_snan
10875 #########################################################################
10876 global sscale_snorm
10877 global sscale_sdnrm
10878 sscale_snorm:
10879 sscale_sdnrm:
10881 beq.l sscale
10883 beq.l dst_zero
10885 beq.l dst_inf
10887 beq.l sscale
10889 beq.l dst_qnan
10890 bra.l dst_snan
10892 global sscale_szero
10893 sscale_szero:
10895 beq.l sscale
10897 beq.l dst_zero
10899 beq.l dst_inf
10901 beq.l sscale
10903 beq.l dst_qnan
10904 bra.l dst_snan
10906 global sscale_sinf
10907 sscale_sinf:
10909 beq.l t_operr
10911 beq.l dst_qnan
10913 beq.l dst_snan
10914 bra.l t_operr
10916 ########################################################################
10918 #
10919 # sop_sqnan(): The src op for frem/fmod/fscale was a QNAN.
10920 #
10921 global sop_sqnan
10922 sop_sqnan:
10925 beq.b dst_qnan
10927 beq.b dst_snan
10928 bra.b src_qnan
10930 #
10931 # sop_ssnan(): The src op for frem/fmod/fscale was an SNAN.
10932 #
10933 global sop_ssnan
10934 sop_ssnan:
10937 beq.b dst_qnan_src_snan
10939 beq.b dst_snan
10940 bra.b src_snan
10942 dst_qnan_src_snan:
10944 bra.b dst_qnan
10946 #
10947 # dst_qnan(): Return the dst SNAN w/ the SNAN bit set.
10948 #
10949 global dst_snan
10950 dst_snan:
10954 rts
10956 #
10957 # dst_qnan(): Return the dst QNAN.
10958 #
10959 global dst_qnan
10960 dst_qnan:
10963 bmi.b dst_qnan_m
10964 dst_qnan_p:
10966 rts
10967 dst_qnan_m:
10969 rts
10971 #
10972 # src_snan(): Return the src SNAN w/ the SNAN bit set.
10973 #
10974 global src_snan
10975 src_snan:
10979 rts
10981 #
10982 # src_qnan(): Return the src QNAN.
10983 #
10984 global src_qnan
10985 src_qnan:
10988 bmi.b dst_qnan_m
10989 src_qnan_p:
10991 rts
10992 src_qnan_m:
10994 rts
10996 #
10997 # fkern2.s:
10998 # These entry points are used by the exception handler
10999 # routines where an instruction is selected by an index into
11000 # a large jump table corresponding to a given instruction which
11001 # has been decoded. Flow continues here where we now decode
11002 # further accoding to the source operand type.
11003 #
11005 global fsinh
11006 fsinh:
11008 beq.l ssinh
11010 beq.l src_zero
11012 beq.l src_inf
11014 beq.l ssinhd
11016 beq.l src_qnan
11017 bra.l src_snan
11019 global flognp1
11020 flognp1:
11022 beq.l slognp1
11024 beq.l src_zero
11026 beq.l sopr_inf
11028 beq.l slognp1d
11030 beq.l src_qnan
11031 bra.l src_snan
11033 global fetoxm1
11034 fetoxm1:
11036 beq.l setoxm1
11038 beq.l src_zero
11040 beq.l setoxm1i
11042 beq.l setoxm1d
11044 beq.l src_qnan
11045 bra.l src_snan
11047 global ftanh
11048 ftanh:
11050 beq.l stanh
11052 beq.l src_zero
11054 beq.l src_one
11056 beq.l stanhd
11058 beq.l src_qnan
11059 bra.l src_snan
11061 global fatan
11062 fatan:
11064 beq.l satan
11066 beq.l src_zero
11068 beq.l spi_2
11070 beq.l satand
11072 beq.l src_qnan
11073 bra.l src_snan
11075 global fasin
11076 fasin:
11078 beq.l sasin
11080 beq.l src_zero
11082 beq.l t_operr
11084 beq.l sasind
11086 beq.l src_qnan
11087 bra.l src_snan
11089 global fatanh
11090 fatanh:
11092 beq.l satanh
11094 beq.l src_zero
11096 beq.l t_operr
11098 beq.l satanhd
11100 beq.l src_qnan
11101 bra.l src_snan
11103 global fsine
11104 fsine:
11106 beq.l ssin
11108 beq.l src_zero
11110 beq.l t_operr
11112 beq.l ssind
11114 beq.l src_qnan
11115 bra.l src_snan
11117 global ftan
11118 ftan:
11120 beq.l stan
11122 beq.l src_zero
11124 beq.l t_operr
11126 beq.l stand
11128 beq.l src_qnan
11129 bra.l src_snan
11131 global fetox
11132 fetox:
11134 beq.l setox
11136 beq.l ld_pone
11138 beq.l szr_inf
11140 beq.l setoxd
11142 beq.l src_qnan
11143 bra.l src_snan
11145 global ftwotox
11146 ftwotox:
11148 beq.l stwotox
11150 beq.l ld_pone
11152 beq.l szr_inf
11154 beq.l stwotoxd
11156 beq.l src_qnan
11157 bra.l src_snan
11159 global ftentox
11160 ftentox:
11162 beq.l stentox
11164 beq.l ld_pone
11166 beq.l szr_inf
11168 beq.l stentoxd
11170 beq.l src_qnan
11171 bra.l src_snan
11173 global flogn
11174 flogn:
11176 beq.l slogn
11178 beq.l t_dz2
11180 beq.l sopr_inf
11182 beq.l slognd
11184 beq.l src_qnan
11185 bra.l src_snan
11187 global flog10
11188 flog10:
11190 beq.l slog10
11192 beq.l t_dz2
11194 beq.l sopr_inf
11196 beq.l slog10d
11198 beq.l src_qnan
11199 bra.l src_snan
11201 global flog2
11202 flog2:
11204 beq.l slog2
11206 beq.l t_dz2
11208 beq.l sopr_inf
11210 beq.l slog2d
11212 beq.l src_qnan
11213 bra.l src_snan
11215 global fcosh
11216 fcosh:
11218 beq.l scosh
11220 beq.l ld_pone
11222 beq.l ld_pinf
11224 beq.l scoshd
11226 beq.l src_qnan
11227 bra.l src_snan
11229 global facos
11230 facos:
11232 beq.l sacos
11234 beq.l ld_ppi2
11236 beq.l t_operr
11238 beq.l sacosd
11240 beq.l src_qnan
11241 bra.l src_snan
11243 global fcos
11244 fcos:
11246 beq.l scos
11248 beq.l ld_pone
11250 beq.l t_operr
11252 beq.l scosd
11254 beq.l src_qnan
11255 bra.l src_snan
11257 global fgetexp
11258 fgetexp:
11260 beq.l sgetexp
11262 beq.l src_zero
11264 beq.l t_operr
11266 beq.l sgetexpd
11268 beq.l src_qnan
11269 bra.l src_snan
11271 global fgetman
11272 fgetman:
11274 beq.l sgetman
11276 beq.l src_zero
11278 beq.l t_operr
11280 beq.l sgetmand
11282 beq.l src_qnan
11283 bra.l src_snan
11285 global fsincos
11286 fsincos:
11288 beq.l ssincos
11290 beq.l ssincosz
11292 beq.l ssincosi
11294 beq.l ssincosd
11296 beq.l ssincosqnan
11297 bra.l ssincossnan
11299 global fmod
11300 fmod:
11302 beq.l smod_snorm
11304 beq.l smod_szero
11306 beq.l smod_sinf
11308 beq.l smod_sdnrm
11310 beq.l sop_sqnan
11311 bra.l sop_ssnan
11313 global frem
11314 frem:
11316 beq.l srem_snorm
11318 beq.l srem_szero
11320 beq.l srem_sinf
11322 beq.l srem_sdnrm
11324 beq.l sop_sqnan
11325 bra.l sop_ssnan
11327 global fscale
11328 fscale:
11330 beq.l sscale_snorm
11332 beq.l sscale_szero
11334 beq.l sscale_sinf
11336 beq.l sscale_sdnrm
11338 beq.l sop_sqnan
11339 bra.l sop_ssnan
11341 #########################################################################
11342 # XDEF **************************************************************** #
11343 # fgen_except(): catch an exception during transcendental #
11344 # emulation #
11345 # #
11346 # XREF **************************************************************** #
11347 # fmul() - emulate a multiply instruction #
11348 # fadd() - emulate an add instruction #
11349 # fin() - emulate an fmove instruction #
11350 # #
11351 # INPUT *************************************************************** #
11352 # fp0 = destination operand #
11353 # d0 = type of instruction that took exception #
11354 # fsave frame = source operand #
11355 # #
11356 # OUTPUT ************************************************************** #
11357 # fp0 = result #
11358 # fp1 = EXOP #
11359 # #
11360 # ALGORITHM *********************************************************** #
11361 # An exception occurred on the last instruction of the #
11362 # transcendental emulation. hopefully, this won't be happening much #
11363 # because it will be VERY slow. #
11364 # The only exceptions capable of passing through here are #
11365 # Overflow, Underflow, and Unsupported Data Type. #
11366 # #
11367 #########################################################################
11369 global fgen_except
11370 fgen_except:
11376 fge_cont:
11379 # ok, I have a problem with putting the dst op at FP_DST. the emulation
11380 # routines aren't supposed to alter the operands but we've just squashed
11381 # FP_DST here...
11383 # 8/17/93 - this turns out to be more of a "cleanliness" standpoint
11384 # then a potential bug. to begin with, only the dyadic functions
11385 # frem,fmod, and fscale would get the dst trashed here. But, for
11386 # the 060SP, the FP_DST is never used again anyways.
11396 fge_fmul:
11397 bsr.l fmul
11398 rts
11399 fge_fadd:
11400 bsr.l fadd
11401 rts
11402 fge_fin:
11403 bsr.l fin
11404 rts
11406 fge_unsupp:
11408 bra.b fge_cont
11410 #
11411 # This table holds the offsets of the emulation routines for each individual
11412 # math operation relative to the address of this table. Included are
11413 # routines like fadd/fmul/fabs as well as the transcendentals.
11414 # The location within the table is determined by the extension bits of the
11415 # operation longword.
11416 #
11419 tbl_unsupp:
11425 long tbl_unsupp - tbl_unsupp
11427 long tbl_unsupp - tbl_unsupp
11431 long tbl_unsupp - tbl_unsupp
11439 long tbl_unsupp - tbl_unsupp
11443 long tbl_unsupp - tbl_unsupp
11447 long tbl_unsupp - tbl_unsupp
11461 long tbl_unsupp - tbl_unsupp
11462 long tbl_unsupp - tbl_unsupp
11463 long tbl_unsupp - tbl_unsupp
11464 long tbl_unsupp - tbl_unsupp
11465 long tbl_unsupp - tbl_unsupp
11466 long tbl_unsupp - tbl_unsupp
11467 long tbl_unsupp - tbl_unsupp
11477 long tbl_unsupp - tbl_unsupp
11479 long tbl_unsupp - tbl_unsupp
11480 long tbl_unsupp - tbl_unsupp
11481 long tbl_unsupp - tbl_unsupp
11482 long tbl_unsupp - tbl_unsupp
11483 long tbl_unsupp - tbl_unsupp
11486 long tbl_unsupp - tbl_unsupp
11487 long tbl_unsupp - tbl_unsupp
11490 long tbl_unsupp - tbl_unsupp
11491 long tbl_unsupp - tbl_unsupp
11492 long tbl_unsupp - tbl_unsupp
11493 long tbl_unsupp - tbl_unsupp
11494 long tbl_unsupp - tbl_unsupp
11495 long tbl_unsupp - tbl_unsupp
11496 long tbl_unsupp - tbl_unsupp
11497 long tbl_unsupp - tbl_unsupp
11498 long tbl_unsupp - tbl_unsupp
11499 long tbl_unsupp - tbl_unsupp
11500 long tbl_unsupp - tbl_unsupp
11501 long tbl_unsupp - tbl_unsupp
11502 long tbl_unsupp - tbl_unsupp
11503 long tbl_unsupp - tbl_unsupp
11504 long tbl_unsupp - tbl_unsupp
11505 long tbl_unsupp - tbl_unsupp
11506 long tbl_unsupp - tbl_unsupp
11507 long tbl_unsupp - tbl_unsupp
11509 long tbl_unsupp - tbl_unsupp
11511 long tbl_unsupp - tbl_unsupp
11513 long tbl_unsupp - tbl_unsupp
11515 long tbl_unsupp - tbl_unsupp
11517 long tbl_unsupp - tbl_unsupp
11521 long tbl_unsupp - tbl_unsupp
11525 long tbl_unsupp - tbl_unsupp
11526 long tbl_unsupp - tbl_unsupp
11527 long tbl_unsupp - tbl_unsupp
11530 #########################################################################
11531 # XDEF **************************************************************** #
11532 # fmul(): emulates the fmul instruction #
11533 # fsmul(): emulates the fsmul instruction #
11534 # fdmul(): emulates the fdmul instruction #
11535 # #
11536 # XREF **************************************************************** #
11537 # scale_to_zero_src() - scale src exponent to zero #
11538 # scale_to_zero_dst() - scale dst exponent to zero #
11539 # unf_res() - return default underflow result #
11540 # ovf_res() - return default overflow result #
11541 # res_qnan() - return QNAN result #
11542 # res_snan() - return SNAN result #
11543 # #
11544 # INPUT *************************************************************** #
11545 # a0 = pointer to extended precision source operand #
11546 # a1 = pointer to extended precision destination operand #
11547 # d0 rnd prec,mode #
11548 # #
11549 # OUTPUT ************************************************************** #
11550 # fp0 = result #
11551 # fp1 = EXOP (if exception occurred) #
11552 # #
11553 # ALGORITHM *********************************************************** #
11554 # Handle NANs, infinities, and zeroes as special cases. Divide #
11555 # norms/denorms into ext/sgl/dbl precision. #
11556 # For norms/denorms, scale the exponents such that a multiply #
11557 # instruction won't cause an exception. Use the regular fmul to #
11558 # compute a result. Check if the regular operands would have taken #
11559 # an exception. If so, return the default overflow/underflow result #
11560 # and return the EXOP if exceptions are enabled. Else, scale the #
11561 # result operand to the proper exponent. #
11562 # #
11563 #########################################################################
11565 align 0x10
11566 tbl_fmul_ovfl:
11570 tbl_fmul_unfl:
11575 global fsmul
11576 fsmul:
11579 bra.b fmul
11581 global fdmul
11582 fdmul:
11586 global fmul
11590 clr.w %d1
11594 bne.w fmul_not_norm # optimize on non-norm input
11596 fmul_norm:
11616 beq.w fmul_may_ovfl # result may rnd to overflow
11617 blt.w fmul_ovfl # result will overflow
11620 beq.w fmul_may_unfl # result may rnd to no unfl
11621 bgt.w fmul_unfl # result will underflow
11623 #
11624 # NORMAL:
11625 # - the result of the multiply operation will neither overflow nor underflow.
11626 # - do the multiply to the proper precision and rounding mode.
11627 # - scale the result exponent using the scale factor. if both operands were
11628 # normalized then we really don't need to go through this scaling. but for now,
11629 # this will do.
11630 #
11631 fmul_normal:
11644 fmul_normal_exit:
11656 rts
11658 #
11659 # OVERFLOW:
11660 # - the result of the multiply operation is an overflow.
11661 # - do the multiply to the proper precision and rounding mode in order to
11662 # set the inexact bits.
11663 # - calculate the default result and return it in fp0.
11664 # - if overflow or inexact is enabled, we need a multiply result rounded to
11665 # extended precision. if the original operation was extended, then we have this
11666 # result. if the original operation was single or double, we have to do another
11667 # multiply using extended precision and the correct rounding mode. the result
11668 # of this operation then has its exponent scaled by -0x6000 to create the
11669 # exceptional operand.
11670 #
11671 fmul_ovfl:
11684 # save setting this until now because this is where fmul_may_ovfl may jump in
11685 fmul_ovfl_tst:
11692 # calculate the default result
11693 fmul_ovfl_dis:
11700 rts
11702 #
11703 # OVFL is enabled; Create EXOP:
11704 # - if precision is extended, then we have the EXOP. simply bias the exponent
11705 # with an extra -0x6000. if the precision is single or double, we need to
11706 # calculate a result rounded to extended precision.
11707 #
11708 fmul_ovfl_ena:
11713 fmul_ovfl_ena_cont:
11728 bra.b fmul_ovfl_dis
11730 fmul_ovfl_ena_sd:
11740 bra.b fmul_ovfl_ena_cont
11742 #
11743 # may OVERFLOW:
11744 # - the result of the multiply operation MAY overflow.
11745 # - do the multiply to the proper precision and rounding mode in order to
11746 # set the inexact bits.
11747 # - calculate the default result and return it in fp0.
11748 #
11749 fmul_may_ovfl:
11764 fbge.w fmul_ovfl_tst # yes; overflow has occurred
11766 # no, it didn't overflow; we have correct result
11767 bra.w fmul_normal_exit
11769 #
11770 # UNDERFLOW:
11771 # - the result of the multiply operation is an underflow.
11772 # - do the multiply to the proper precision and rounding mode in order to
11773 # set the inexact bits.
11774 # - calculate the default result and return it in fp0.
11775 # - if overflow or inexact is enabled, we need a multiply result rounded to
11776 # extended precision. if the original operation was extended, then we have this
11777 # result. if the original operation was single or double, we have to do another
11778 # multiply using extended precision and the correct rounding mode. the result
11779 # of this operation then has its exponent scaled by -0x6000 to create the
11780 # exceptional operand.
11781 #
11782 fmul_unfl:
11785 # for fun, let's use only extended precision, round to zero. then, let
11786 # the unf_res() routine figure out all the rest.
11787 # will we get the correct answer.
11804 fmul_unfl_dis:
11812 rts
11814 #
11815 # UNFL is enabled.
11816 #
11817 fmul_unfl_ena:
11824 # if the rnd mode is anything but RZ, then we have to re-do the above
11825 # multiplication because we used RZ for all.
11828 fmul_unfl_ena_cont:
11848 bra.w fmul_unfl_dis
11850 fmul_unfl_ena_sd:
11855 bra.b fmul_unfl_ena_cont
11857 # MAY UNDERFLOW:
11858 # -use the correct rounding mode and precision. this code favors operations
11859 # that do not underflow.
11860 fmul_may_unfl:
11875 fbgt.w fmul_normal_exit # no; no underflow occurred
11876 fblt.w fmul_unfl # yes; underflow occurred
11878 #
11879 # we still don't know if underflow occurred. result is ~ equal to 2. but,
11880 # we don't know if the result was an underflow that rounded up to a 2 or
11881 # a normalized number that rounded down to a 2. so, redo the entire operation
11882 # using RZ as the rounding mode to see what the pre-rounded result is.
11883 # this case should be relatively rare.
11884 #
11899 fbge.w fmul_normal_exit # no; no underflow occurred
11900 bra.w fmul_unfl # yes, underflow occurred
11902 ################################################################################
11904 #
11905 # Multiply: inputs are not both normalized; what are they?
11906 #
11907 fmul_not_norm:
11912 tbl_fmul_op:
11967 fmul_res_operr:
11968 bra.l res_operr
11969 fmul_res_snan:
11970 bra.l res_snan
11971 fmul_res_qnan:
11972 bra.l res_qnan
11974 #
11975 # Multiply: (Zero x Zero) || (Zero x norm) || (Zero x denorm)
11976 #
11977 global fmul_zero # global for fsglmul
11978 fmul_zero:
11983 fmul_zero_n:
11986 rts
11987 fmul_zero_p:
11990 rts
11992 #
11993 # Multiply: (inf x inf) || (inf x norm) || (inf x denorm)
11994 #
11995 # Note: The j-bit for an infinity is a don't-care. However, to be
11996 # strictly compatible w/ the 68881/882, we make sure to return an
11997 # INF w/ the j-bit set if the input INF j-bit was set. Destination
11998 # INFs take priority.
11999 #
12000 global fmul_inf_dst # global for fsglmul
12001 fmul_inf_dst:
12007 fmul_inf_dst_n:
12011 rts
12012 fmul_inf_dst_p:
12015 rts
12017 global fmul_inf_src # global for fsglmul
12018 fmul_inf_src:
12024 bra.b fmul_inf_dst_n
12026 #########################################################################
12027 # XDEF **************************************************************** #
12028 # fin(): emulates the fmove instruction #
12029 # fsin(): emulates the fsmove instruction #
12030 # fdin(): emulates the fdmove instruction #
12031 # #
12032 # XREF **************************************************************** #
12033 # norm() - normalize mantissa for EXOP on denorm #
12034 # scale_to_zero_src() - scale src exponent to zero #
12035 # ovf_res() - return default overflow result #
12036 # unf_res() - return default underflow result #
12037 # res_qnan_1op() - return QNAN result #
12038 # res_snan_1op() - return SNAN result #
12039 # #
12040 # INPUT *************************************************************** #
12041 # a0 = pointer to extended precision source operand #
12042 # d0 = round prec/mode #
12043 # #
12044 # OUTPUT ************************************************************** #
12045 # fp0 = result #
12046 # fp1 = EXOP (if exception occurred) #
12047 # #
12048 # ALGORITHM *********************************************************** #
12049 # Handle NANs, infinities, and zeroes as special cases. Divide #
12050 # norms into extended, single, and double precision. #
12051 # Norms can be emulated w/ a regular fmove instruction. For #
12052 # sgl/dbl, must scale exponent and perform an "fmove". Check to see #
12053 # if the result would have overflowed/underflowed. If so, use unf_res() #
12054 # or ovf_res() to return the default result. Also return EXOP if #
12055 # exception is enabled. If no exception, return the default result. #
12056 # Unnorms don't pass through here. #
12057 # #
12058 #########################################################################
12060 global fsin
12061 fsin:
12064 bra.b fin
12066 global fdin
12067 fdin:
12071 global fin
12072 fin:
12076 bne.w fin_not_norm # optimize on non-norm input
12078 #
12079 # FP MOVE IN: NORMs and DENORMs ONLY!
12080 #
12081 fin_norm:
12083 bne.w fin_not_ext # no, so go handle dbl or sgl
12085 #
12086 # precision selected is extended. so...we cannot get an underflow
12087 # or overflow because of rounding to the correct precision. so...
12088 # skip the scaling and unscaling...
12089 #
12093 fin_norm_done:
12095 rts
12097 #
12098 # for an extended precision DENORM, the UNFL exception bit is set
12099 # the accrued bit is NOT set in this instance(no inexactness!)
12100 #
12101 fin_denorm:
12103 bne.w fin_not_ext # no, so go handle dbl or sgl
12109 fin_denorm_done:
12113 rts
12115 #
12116 # the input is an extended DENORM and underflow is enabled in the FPCR.
12117 # normalize the mantissa and add the bias of 0x6000 to the resulting negative
12118 # exponent and insert back into the operand.
12119 #
12120 fin_denorm_unfl_ena:
12134 rts
12136 #
12137 # operand is to be rounded to single or double precision
12138 #
12139 fin_not_ext:
12141 bne.b fin_dbl
12143 #
12144 # operand is to be rounded to single precision
12145 #
12146 fin_sgl:
12153 bge.w fin_sd_unfl # yes; go handle underflow
12155 beq.w fin_sd_may_ovfl # maybe; go check
12156 blt.w fin_sd_ovfl # yes; go handle overflow
12158 #
12159 # operand will NOT overflow or underflow when moved into the fp reg file
12160 #
12161 fin_sd_normal:
12172 fin_sd_normal_exit:
12184 rts
12186 #
12187 # operand is to be rounded to double precision
12188 #
12189 fin_dbl:
12196 bge.w fin_sd_unfl # yes; go handle underflow
12198 beq.w fin_sd_may_ovfl # maybe; go check
12199 blt.w fin_sd_ovfl # yes; go handle overflow
12200 bra.w fin_sd_normal # no; ho handle normalized op
12202 #
12203 # operand WILL underflow when moved in to the fp register file
12204 #
12205 fin_sd_unfl:
12209 bpl.b fin_sd_unfl_tst
12212 # if underflow or inexact is enabled, then go calculate the EXOP first.
12213 fin_sd_unfl_tst:
12218 fin_sd_unfl_dis:
12224 rts
12226 #
12227 # operand will underflow AND underflow or inexact is enabled.
12228 # therefore, we must return the result rounded to extended precision.
12229 #
12230 fin_sd_unfl_ena:
12246 bra.b fin_sd_unfl_dis
12248 #
12249 # operand WILL overflow.
12250 #
12251 fin_sd_ovfl:
12262 fin_sd_ovfl_tst:
12269 #
12270 # OVFL is not enabled; therefore, we must create the default result by
12271 # calling ovf_res().
12272 #
12273 fin_sd_ovfl_dis:
12280 rts
12282 #
12283 # OVFL is enabled.
12284 # the INEX2 bit has already been updated by the round to the correct precision.
12285 # now, round to extended(and don't alter the FPSR).
12286 #
12287 fin_sd_ovfl_ena:
12300 bra.b fin_sd_ovfl_dis
12302 #
12303 # the move in MAY overflow. so...
12304 #
12305 fin_sd_may_ovfl:
12318 fbge.w fin_sd_ovfl_tst # yes; overflow has occurred
12320 # no, it didn't overflow; we have correct result
12321 bra.w fin_sd_normal_exit
12323 ##########################################################################
12325 #
12326 # operand is not a NORM: check its optype and branch accordingly
12327 #
12328 fin_not_norm:
12330 beq.w fin_denorm
12332 beq.l res_snan_1op
12334 beq.l res_qnan_1op
12336 #
12337 # do the fmove in; at this point, only possible ops are ZERO and INF.
12338 # use fmov to determine ccodes.
12339 # prec:mode should be zero at this point but it won't affect answer anyways.
12340 #
12345 rts
12347 #########################################################################
12348 # XDEF **************************************************************** #
12349 # fdiv(): emulates the fdiv instruction #
12350 # fsdiv(): emulates the fsdiv instruction #
12351 # fddiv(): emulates the fddiv instruction #
12352 # #
12353 # XREF **************************************************************** #
12354 # scale_to_zero_src() - scale src exponent to zero #
12355 # scale_to_zero_dst() - scale dst exponent to zero #
12356 # unf_res() - return default underflow result #
12357 # ovf_res() - return default overflow result #
12358 # res_qnan() - return QNAN result #
12359 # res_snan() - return SNAN result #
12360 # #
12361 # INPUT *************************************************************** #
12362 # a0 = pointer to extended precision source operand #
12363 # a1 = pointer to extended precision destination operand #
12364 # d0 rnd prec,mode #
12365 # #
12366 # OUTPUT ************************************************************** #
12367 # fp0 = result #
12368 # fp1 = EXOP (if exception occurred) #
12369 # #
12370 # ALGORITHM *********************************************************** #
12371 # Handle NANs, infinities, and zeroes as special cases. Divide #
12372 # norms/denorms into ext/sgl/dbl precision. #
12373 # For norms/denorms, scale the exponents such that a divide #
12374 # instruction won't cause an exception. Use the regular fdiv to #
12375 # compute a result. Check if the regular operands would have taken #
12376 # an exception. If so, return the default overflow/underflow result #
12377 # and return the EXOP if exceptions are enabled. Else, scale the #
12378 # result operand to the proper exponent. #
12379 # #
12380 #########################################################################
12382 align 0x10
12383 tbl_fdiv_unfl:
12388 tbl_fdiv_ovfl:
12393 global fsdiv
12394 fsdiv:
12397 bra.b fdiv
12399 global fddiv
12400 fddiv:
12404 global fdiv
12408 clr.w %d1
12413 bne.w fdiv_not_norm # optimize on non-norm input
12415 #
12416 # DIVIDE: NORMs and DENORMs ONLY!
12417 #
12418 fdiv_norm:
12439 ble.w fdiv_may_ovfl # result will overflow
12442 beq.w fdiv_may_unfl # maybe
12443 bgt.w fdiv_unfl # yes; go handle underflow
12445 fdiv_normal:
12458 fdiv_normal_exit:
12470 rts
12472 tbl_fdiv_ovfl2:
12473 long 0x7fff
12474 long 0x407f
12475 long 0x43ff
12477 fdiv_no_ovfl:
12479 bra.b fdiv_normal_exit
12481 fdiv_may_ovfl:
12502 blt.b fdiv_no_ovfl
12505 fdiv_ovfl_tst:
12512 fdiv_ovfl_dis:
12519 rts
12521 fdiv_ovfl_ena:
12526 fdiv_ovfl_ena_cont:
12541 bra.b fdiv_ovfl_dis
12543 fdiv_ovfl_ena_sd:
12553 bra.b fdiv_ovfl_ena_cont
12555 fdiv_unfl:
12574 fdiv_unfl_dis:
12582 rts
12584 #
12585 # UNFL is enabled.
12586 #
12587 fdiv_unfl_ena:
12596 fdiv_unfl_ena_cont:
12616 bra.w fdiv_unfl_dis
12618 fdiv_unfl_ena_sd:
12623 bra.b fdiv_unfl_ena_cont
12625 #
12626 # the divide operation MAY underflow:
12627 #
12628 fdiv_may_unfl:
12643 fbgt.w fdiv_normal_exit # no; no underflow occurred
12644 fblt.w fdiv_unfl # yes; underflow occurred
12646 #
12647 # we still don't know if underflow occurred. result is ~ equal to 1. but,
12648 # we don't know if the result was an underflow that rounded up to a 1
12649 # or a normalized number that rounded down to a 1. so, redo the entire
12650 # operation using RZ as the rounding mode to see what the pre-rounded
12651 # result is. this case should be relatively rare.
12652 #
12667 fbge.w fdiv_normal_exit # no; no underflow occurred
12668 bra.w fdiv_unfl # yes; underflow occurred
12670 ############################################################################
12672 #
12673 # Divide: inputs are not both normalized; what are they?
12674 #
12675 fdiv_not_norm:
12680 tbl_fdiv_op:
12735 fdiv_res_qnan:
12736 bra.l res_qnan
12737 fdiv_res_snan:
12738 bra.l res_snan
12739 fdiv_res_operr:
12740 bra.l res_operr
12742 global fdiv_zero_load # global for fsgldiv
12743 fdiv_zero_load:
12750 rts
12751 fdiv_zero_load_p:
12754 rts
12756 #
12757 # The destination was In Range and the source was a ZERO. The result,
12758 # therefore, is an INF w/ the proper sign.
12759 # So, determine the sign and return a new INF (w/ the j-bit cleared).
12760 #
12761 global fdiv_inf_load # global for fsgldiv
12762 fdiv_inf_load:
12770 rts
12771 fdiv_inf_load_p:
12774 rts
12776 #
12777 # The destination was an INF w/ an In Range or ZERO source, the result is
12778 # an INF w/ the proper sign.
12779 # The 68881/882 returns the destination INF w/ the new sign(if the j-bit of the
12780 # dst INF is set, then then j-bit of the result INF is also set).
12781 #
12782 global fdiv_inf_dst # global for fsgldiv
12783 fdiv_inf_dst:
12793 rts
12795 fdiv_inf_dst_p:
12799 rts
12801 #########################################################################
12802 # XDEF **************************************************************** #
12803 # fneg(): emulates the fneg instruction #
12804 # fsneg(): emulates the fsneg instruction #
12805 # fdneg(): emulates the fdneg instruction #
12806 # #
12807 # XREF **************************************************************** #
12808 # norm() - normalize a denorm to provide EXOP #
12809 # scale_to_zero_src() - scale sgl/dbl source exponent #
12810 # ovf_res() - return default overflow result #
12811 # unf_res() - return default underflow result #
12812 # res_qnan_1op() - return QNAN result #
12813 # res_snan_1op() - return SNAN result #
12814 # #
12815 # INPUT *************************************************************** #
12816 # a0 = pointer to extended precision source operand #
12817 # d0 = rnd prec,mode #
12818 # #
12819 # OUTPUT ************************************************************** #
12820 # fp0 = result #
12821 # fp1 = EXOP (if exception occurred) #
12822 # #
12823 # ALGORITHM *********************************************************** #
12824 # Handle NANs, zeroes, and infinities as special cases. Separate #
12825 # norms/denorms into ext/sgl/dbl precisions. Extended precision can be #
12826 # emulated by simply setting sign bit. Sgl/dbl operands must be scaled #
12827 # and an actual fneg performed to see if overflow/underflow would have #
12828 # occurred. If so, return default underflow/overflow result. Else, #
12829 # scale the result exponent and return result. FPSR gets set based on #
12830 # the result value. #
12831 # #
12832 #########################################################################
12834 global fsneg
12835 fsneg:
12838 bra.b fneg
12840 global fdneg
12841 fdneg:
12845 global fneg
12849 bne.w fneg_not_norm # optimize on non-norm input
12851 #
12852 # NEGATE SIGN : norms and denorms ONLY!
12853 #
12854 fneg_norm:
12856 bne.w fneg_not_ext # no; go handle sgl or dbl
12858 #
12859 # precision selected is extended. so...we can not get an underflow
12860 # or overflow because of rounding to the correct precision. so...
12861 # skip the scaling and unscaling...
12862 #
12869 fneg_norm_load:
12872 rts
12874 #
12875 # for an extended precision DENORM, the UNFL exception bit is set
12876 # the accrued bit is NOT set in this instance(no inexactness!)
12877 #
12878 fneg_denorm:
12890 fneg_denorm_done:
12896 rts
12898 #
12899 # the input is an extended DENORM and underflow is enabled in the FPCR.
12900 # normalize the mantissa and add the bias of 0x6000 to the resulting negative
12901 # exponent and insert back into the operand.
12902 #
12903 fneg_ext_unfl_ena:
12914 rts
12916 #
12917 # operand is either single or double
12918 #
12919 fneg_not_ext:
12921 bne.b fneg_dbl
12923 #
12924 # operand is to be rounded to single precision
12925 #
12926 fneg_sgl:
12933 bge.w fneg_sd_unfl # yes; go handle underflow
12935 beq.w fneg_sd_may_ovfl # maybe; go check
12936 blt.w fneg_sd_ovfl # yes; go handle overflow
12938 #
12939 # operand will NOT overflow or underflow when moved in to the fp reg file
12940 #
12941 fneg_sd_normal:
12952 fneg_sd_normal_exit:
12964 rts
12966 #
12967 # operand is to be rounded to double precision
12968 #
12969 fneg_dbl:
12978 beq.w fneg_sd_may_ovfl # maybe; go check
12979 blt.w fneg_sd_ovfl # yes; go handle overflow
12980 bra.w fneg_sd_normal # no; ho handle normalized op
12982 #
12983 # operand WILL underflow when moved in to the fp register file
12984 #
12985 fneg_sd_unfl:
12989 bpl.b fneg_sd_unfl_tst
12992 # if underflow or inexact is enabled, go calculate EXOP first.
12993 fneg_sd_unfl_tst:
12998 fneg_sd_unfl_dis:
13004 rts
13006 #
13007 # operand will underflow AND underflow is enabled.
13008 # therefore, we must return the result rounded to extended precision.
13009 #
13010 fneg_sd_unfl_ena:
13026 bra.b fneg_sd_unfl_dis
13028 #
13029 # operand WILL overflow.
13030 #
13031 fneg_sd_ovfl:
13042 fneg_sd_ovfl_tst:
13049 #
13050 # OVFL is not enabled; therefore, we must create the default result by
13051 # calling ovf_res().
13052 #
13053 fneg_sd_ovfl_dis:
13060 rts
13062 #
13063 # OVFL is enabled.
13064 # the INEX2 bit has already been updated by the round to the correct precision.
13065 # now, round to extended(and don't alter the FPSR).
13066 #
13067 fneg_sd_ovfl_ena:
13080 bra.b fneg_sd_ovfl_dis
13082 #
13083 # the move in MAY underflow. so...
13084 #
13085 fneg_sd_may_ovfl:
13098 fbge.w fneg_sd_ovfl_tst # yes; overflow has occurred
13100 # no, it didn't overflow; we have correct result
13101 bra.w fneg_sd_normal_exit
13103 ##########################################################################
13105 #
13106 # input is not normalized; what is it?
13107 #
13108 fneg_not_norm:
13110 beq.w fneg_denorm
13112 beq.l res_snan_1op
13114 beq.l res_qnan_1op
13116 #
13117 # do the fneg; at this point, only possible ops are ZERO and INF.
13118 # use fneg to determine ccodes.
13119 # prec:mode should be zero at this point but it won't affect answer anyways.
13120 #
13125 rts
13127 #########################################################################
13128 # XDEF **************************************************************** #
13129 # ftst(): emulates the ftest instruction #
13130 # #
13131 # XREF **************************************************************** #
13132 # res{s,q}nan_1op() - set NAN result for monadic instruction #
13133 # #
13134 # INPUT *************************************************************** #
13135 # a0 = pointer to extended precision source operand #
13136 # #
13137 # OUTPUT ************************************************************** #
13138 # none #
13139 # #
13140 # ALGORITHM *********************************************************** #
13141 # Check the source operand tag (STAG) and set the FPCR according #
13142 # to the operand type and sign. #
13143 # #
13144 #########################################################################
13146 global ftst
13147 ftst:
13151 #
13152 # Norm:
13153 #
13154 ftst_norm:
13157 rts
13158 ftst_norm_m:
13160 rts
13162 #
13163 # input is not normalized; what is it?
13164 #
13165 ftst_not_norm:
13167 beq.b ftst_zero
13169 beq.b ftst_inf
13171 beq.l res_snan_1op
13173 beq.l res_qnan_1op
13175 #
13176 # Denorm:
13177 #
13178 ftst_denorm:
13181 rts
13182 ftst_denorm_m:
13184 rts
13186 #
13187 # Infinity:
13188 #
13189 ftst_inf:
13192 ftst_inf_p:
13194 rts
13195 ftst_inf_m:
13197 rts
13199 #
13200 # Zero:
13201 #
13202 ftst_zero:
13205 ftst_zero_p:
13207 rts
13208 ftst_zero_m:
13210 rts
13212 #########################################################################
13213 # XDEF **************************************************************** #
13214 # fint(): emulates the fint instruction #
13215 # #
13216 # XREF **************************************************************** #
13217 # res_{s,q}nan_1op() - set NAN result for monadic operation #
13218 # #
13219 # INPUT *************************************************************** #
13220 # a0 = pointer to extended precision source operand #
13221 # d0 = round precision/mode #
13222 # #
13223 # OUTPUT ************************************************************** #
13224 # fp0 = result #
13225 # #
13226 # ALGORITHM *********************************************************** #
13227 # Separate according to operand type. Unnorms don't pass through #
13228 # here. For norms, load the rounding mode/prec, execute a "fint", then #
13229 # store the resulting FPSR bits. #
13230 # For denorms, force the j-bit to a one and do the same as for #
13231 # norms. Denorms are so low that the answer will either be a zero or a #
13232 # one. #
13233 # For zeroes/infs/NANs, return the same while setting the FPSR #
13234 # as appropriate. #
13235 # #
13236 #########################################################################
13238 global fint
13239 fint:
13243 #
13244 # Norm:
13245 #
13246 fint_norm:
13258 rts
13260 #
13261 # input is not normalized; what is it?
13262 #
13263 fint_not_norm:
13265 beq.b fint_zero
13267 beq.b fint_inf
13269 beq.b fint_denorm
13271 beq.l res_snan_1op
13274 #
13275 # Denorm:
13276 #
13277 # for DENORMs, the result will be either (+/-)ZERO or (+/-)1.
13278 # also, the INEX2 and AINEX exception bits will be set.
13279 # so, we could either set these manually or force the DENORM
13280 # to a very small NORM and ship it to the NORM routine.
13281 # I do the latter.
13282 #
13283 fint_denorm:
13287 bra.b fint_norm
13289 #
13290 # Zero:
13291 #
13292 fint_zero:
13295 fint_zero_p:
13298 rts
13299 fint_zero_m:
13302 rts
13304 #
13305 # Infinity:
13306 #
13307 fint_inf:
13311 fint_inf_p:
13313 rts
13314 fint_inf_m:
13316 rts
13318 #########################################################################
13319 # XDEF **************************************************************** #
13320 # fintrz(): emulates the fintrz instruction #
13321 # #
13322 # XREF **************************************************************** #
13323 # res_{s,q}nan_1op() - set NAN result for monadic operation #
13324 # #
13325 # INPUT *************************************************************** #
13326 # a0 = pointer to extended precision source operand #
13327 # d0 = round precision/mode #
13328 # #
13329 # OUTPUT ************************************************************** #
13330 # fp0 = result #
13331 # #
13332 # ALGORITHM *********************************************************** #
13333 # Separate according to operand type. Unnorms don't pass through #
13334 # here. For norms, load the rounding mode/prec, execute a "fintrz", #
13335 # then store the resulting FPSR bits. #
13336 # For denorms, force the j-bit to a one and do the same as for #
13337 # norms. Denorms are so low that the answer will either be a zero or a #
13338 # one. #
13339 # For zeroes/infs/NANs, return the same while setting the FPSR #
13340 # as appropriate. #
13341 # #
13342 #########################################################################
13344 global fintrz
13345 fintrz:
13349 #
13350 # Norm:
13351 #
13352 fintrz_norm:
13360 rts
13362 #
13363 # input is not normalized; what is it?
13364 #
13365 fintrz_not_norm:
13367 beq.b fintrz_zero
13369 beq.b fintrz_inf
13371 beq.b fintrz_denorm
13373 beq.l res_snan_1op
13376 #
13377 # Denorm:
13378 #
13379 # for DENORMs, the result will be (+/-)ZERO.
13380 # also, the INEX2 and AINEX exception bits will be set.
13381 # so, we could either set these manually or force the DENORM
13382 # to a very small NORM and ship it to the NORM routine.
13383 # I do the latter.
13384 #
13385 fintrz_denorm:
13389 bra.b fintrz_norm
13391 #
13392 # Zero:
13393 #
13394 fintrz_zero:
13397 fintrz_zero_p:
13400 rts
13401 fintrz_zero_m:
13404 rts
13406 #
13407 # Infinity:
13408 #
13409 fintrz_inf:
13413 fintrz_inf_p:
13415 rts
13416 fintrz_inf_m:
13418 rts
13420 #########################################################################
13421 # XDEF **************************************************************** #
13422 # fabs(): emulates the fabs instruction #
13423 # fsabs(): emulates the fsabs instruction #
13424 # fdabs(): emulates the fdabs instruction #
13425 # #
13426 # XREF **************************************************************** #
13427 # norm() - normalize denorm mantissa to provide EXOP #
13428 # scale_to_zero_src() - make exponent. = 0; get scale factor #
13429 # unf_res() - calculate underflow result #
13430 # ovf_res() - calculate overflow result #
13431 # res_{s,q}nan_1op() - set NAN result for monadic operation #
13432 # #
13433 # INPUT *************************************************************** #
13434 # a0 = pointer to extended precision source operand #
13435 # d0 = rnd precision/mode #
13436 # #
13437 # OUTPUT ************************************************************** #
13438 # fp0 = result #
13439 # fp1 = EXOP (if exception occurred) #
13440 # #
13441 # ALGORITHM *********************************************************** #
13442 # Handle NANs, infinities, and zeroes as special cases. Divide #
13443 # norms into extended, single, and double precision. #
13444 # Simply clear sign for extended precision norm. Ext prec denorm #
13445 # gets an EXOP created for it since it's an underflow. #
13446 # Double and single precision can overflow and underflow. First, #
13447 # scale the operand such that the exponent is zero. Perform an "fabs" #
13448 # using the correct rnd mode/prec. Check to see if the original #
13449 # exponent would take an exception. If so, use unf_res() or ovf_res() #
13450 # to calculate the default result. Also, create the EXOP for the #
13451 # exceptional case. If no exception should occur, insert the correct #
13452 # result exponent and return. #
13453 # Unnorms don't pass through here. #
13454 # #
13455 #########################################################################
13457 global fsabs
13458 fsabs:
13461 bra.b fabs
13463 global fdabs
13464 fdabs:
13468 global fabs
13472 bne.w fabs_not_norm # optimize on non-norm input
13474 #
13475 # ABSOLUTE VALUE: norms and denorms ONLY!
13476 #
13477 fabs_norm:
13481 #
13482 # precision selected is extended. so...we can not get an underflow
13483 # or overflow because of rounding to the correct precision. so...
13484 # skip the scaling and unscaling...
13485 #
13492 rts
13494 #
13495 # for an extended precision DENORM, the UNFL exception bit is set
13496 # the accrued bit is NOT set in this instance(no inexactness!)
13497 #
13498 fabs_denorm:
13513 bne.b fabs_ext_unfl_ena
13514 rts
13516 #
13517 # the input is an extended DENORM and underflow is enabled in the FPCR.
13518 # normalize the mantissa and add the bias of 0x6000 to the resulting negative
13519 # exponent and insert back into the operand.
13520 #
13521 fabs_ext_unfl_ena:
13532 rts
13534 #
13535 # operand is either single or double
13536 #
13537 fabs_not_ext:
13539 bne.b fabs_dbl
13541 #
13542 # operand is to be rounded to single precision
13543 #
13544 fabs_sgl:
13551 bge.w fabs_sd_unfl # yes; go handle underflow
13553 beq.w fabs_sd_may_ovfl # maybe; go check
13554 blt.w fabs_sd_ovfl # yes; go handle overflow
13556 #
13557 # operand will NOT overflow or underflow when moved in to the fp reg file
13558 #
13559 fabs_sd_normal:
13570 fabs_sd_normal_exit:
13582 rts
13584 #
13585 # operand is to be rounded to double precision
13586 #
13587 fabs_dbl:
13596 beq.w fabs_sd_may_ovfl # maybe; go check
13597 blt.w fabs_sd_ovfl # yes; go handle overflow
13598 bra.w fabs_sd_normal # no; ho handle normalized op
13600 #
13601 # operand WILL underflow when moved in to the fp register file
13602 #
13603 fabs_sd_unfl:
13608 # if underflow or inexact is enabled, go calculate EXOP first.
13613 fabs_sd_unfl_dis:
13619 rts
13621 #
13622 # operand will underflow AND underflow is enabled.
13623 # therefore, we must return the result rounded to extended precision.
13624 #
13625 fabs_sd_unfl_ena:
13641 bra.b fabs_sd_unfl_dis
13643 #
13644 # operand WILL overflow.
13645 #
13646 fabs_sd_ovfl:
13657 fabs_sd_ovfl_tst:
13664 #
13665 # OVFL is not enabled; therefore, we must create the default result by
13666 # calling ovf_res().
13667 #
13668 fabs_sd_ovfl_dis:
13675 rts
13677 #
13678 # OVFL is enabled.
13679 # the INEX2 bit has already been updated by the round to the correct precision.
13680 # now, round to extended(and don't alter the FPSR).
13681 #
13682 fabs_sd_ovfl_ena:
13695 bra.b fabs_sd_ovfl_dis
13697 #
13698 # the move in MAY underflow. so...
13699 #
13700 fabs_sd_may_ovfl:
13713 fbge.w fabs_sd_ovfl_tst # yes; overflow has occurred
13715 # no, it didn't overflow; we have correct result
13716 bra.w fabs_sd_normal_exit
13718 ##########################################################################
13720 #
13721 # input is not normalized; what is it?
13722 #
13723 fabs_not_norm:
13725 beq.w fabs_denorm
13727 beq.l res_snan_1op
13729 beq.l res_qnan_1op
13734 beq.b fabs_inf
13735 fabs_zero:
13737 rts
13738 fabs_inf:
13740 rts
13742 #########################################################################
13743 # XDEF **************************************************************** #
13744 # fcmp(): fp compare op routine #
13745 # #
13746 # XREF **************************************************************** #
13747 # res_qnan() - return QNAN result #
13748 # res_snan() - return SNAN result #
13749 # #
13750 # INPUT *************************************************************** #
13751 # a0 = pointer to extended precision source operand #
13752 # a1 = pointer to extended precision destination operand #
13753 # d0 = round prec/mode #
13754 # #
13755 # OUTPUT ************************************************************** #
13756 # None #
13757 # #
13758 # ALGORITHM *********************************************************** #
13759 # Handle NANs and denorms as special cases. For everything else, #
13760 # just use the actual fcmp instruction to produce the correct condition #
13761 # codes. #
13762 # #
13763 #########################################################################
13765 global fcmp
13766 fcmp:
13767 clr.w %d1
13773 #
13774 # COMPARE FP OPs : NORMs, ZEROs, INFs, and "corrected" DENORMs
13775 #
13776 fcmp_norm:
13785 rts
13787 #
13788 # fcmp: inputs are not both normalized; what are they?
13789 #
13790 fcmp_not_norm:
13795 tbl_fcmp_op:
13850 # unlike all other functions for QNAN and SNAN, fcmp does NOT set the
13851 # 'N' bit for a negative QNAN or SNAN input so we must squelch it here.
13852 fcmp_res_qnan:
13853 bsr.l res_qnan
13855 rts
13856 fcmp_res_snan:
13857 bsr.l res_snan
13859 rts
13861 #
13862 # DENORMs are a little more difficult.
13863 # If you have a 2 DENORMs, then you can just force the j-bit to a one
13864 # and use the fcmp_norm routine.
13865 # If you have a DENORM and an INF or ZERO, just force the DENORM's j-bit to a one
13866 # and use the fcmp_norm routine.
13867 # If you have a DENORM and a NORM with opposite signs, then use fcmp_norm, also.
13868 # But with a DENORM and a NORM of the same sign, the neg bit is set if the
13869 # (1) signs are (+) and the DENORM is the dst or
13870 # (2) signs are (-) and the DENORM is the src
13871 #
13873 fcmp_dnrm_s:
13880 bra.w fcmp_norm
13882 fcmp_dnrm_d:
13889 bra.w fcmp_norm
13891 fcmp_dnrm_sd:
13904 bra.w fcmp_norm
13906 fcmp_nrm_dnrm:
13910 bmi.w fcmp_dnrm_s
13912 # signs are the same, so must determine the answer ourselves.
13915 rts
13916 fcmp_nrm_dnrm_m:
13918 rts
13920 fcmp_dnrm_nrm:
13924 bmi.w fcmp_dnrm_d
13926 # signs are the same, so must determine the answer ourselves.
13929 rts
13930 fcmp_dnrm_nrm_m:
13932 rts
13934 #########################################################################
13935 # XDEF **************************************************************** #
13936 # fsglmul(): emulates the fsglmul instruction #
13937 # #
13938 # XREF **************************************************************** #
13939 # scale_to_zero_src() - scale src exponent to zero #
13940 # scale_to_zero_dst() - scale dst exponent to zero #
13941 # unf_res4() - return default underflow result for sglop #
13942 # ovf_res() - return default overflow result #
13943 # res_qnan() - return QNAN result #
13944 # res_snan() - return SNAN result #
13945 # #
13946 # INPUT *************************************************************** #
13947 # a0 = pointer to extended precision source operand #
13948 # a1 = pointer to extended precision destination operand #
13949 # d0 rnd prec,mode #
13950 # #
13951 # OUTPUT ************************************************************** #
13952 # fp0 = result #
13953 # fp1 = EXOP (if exception occurred) #
13954 # #
13955 # ALGORITHM *********************************************************** #
13956 # Handle NANs, infinities, and zeroes as special cases. Divide #
13957 # norms/denorms into ext/sgl/dbl precision. #
13958 # For norms/denorms, scale the exponents such that a multiply #
13959 # instruction won't cause an exception. Use the regular fsglmul to #
13960 # compute a result. Check if the regular operands would have taken #
13961 # an exception. If so, return the default overflow/underflow result #
13962 # and return the EXOP if exceptions are enabled. Else, scale the #
13963 # result operand to the proper exponent. #
13964 # #
13965 #########################################################################
13967 global fsglmul
13968 fsglmul:
13971 clr.w %d1
13976 bne.w fsglmul_not_norm # optimize on non-norm input
13978 fsglmul_norm:
13995 beq.w fsglmul_may_ovfl # result may rnd to overflow
13996 blt.w fsglmul_ovfl # result will overflow
13999 beq.w fsglmul_may_unfl # result may rnd to no unfl
14000 bgt.w fsglmul_unfl # result will underflow
14002 fsglmul_normal:
14015 fsglmul_normal_exit:
14027 rts
14029 fsglmul_ovfl:
14042 fsglmul_ovfl_tst:
14044 # save setting this until now because this is where fsglmul_may_ovfl may jump in
14051 fsglmul_ovfl_dis:
14059 rts
14061 fsglmul_ovfl_ena:
14076 bra.b fsglmul_ovfl_dis
14078 fsglmul_may_ovfl:
14093 fbge.w fsglmul_ovfl_tst # yes; overflow has occurred
14095 # no, it didn't overflow; we have correct result
14096 bra.w fsglmul_normal_exit
14098 fsglmul_unfl:
14117 fsglmul_unfl_dis:
14125 rts
14127 #
14128 # UNFL is enabled.
14129 #
14130 fsglmul_unfl_ena:
14153 bra.w fsglmul_unfl_dis
14155 fsglmul_may_unfl:
14170 fbgt.w fsglmul_normal_exit # no; no underflow occurred
14171 fblt.w fsglmul_unfl # yes; underflow occurred
14173 #
14174 # we still don't know if underflow occurred. result is ~ equal to 2. but,
14175 # we don't know if the result was an underflow that rounded up to a 2 or
14176 # a normalized number that rounded down to a 2. so, redo the entire operation
14177 # using RZ as the rounding mode to see what the pre-rounded result is.
14178 # this case should be relatively rare.
14179 #
14194 fbge.w fsglmul_normal_exit # no; no underflow occurred
14195 bra.w fsglmul_unfl # yes, underflow occurred
14197 ##############################################################################
14199 #
14200 # Single Precision Multiply: inputs are not both normalized; what are they?
14201 #
14202 fsglmul_not_norm:
14207 tbl_fsglmul_op:
14262 fsglmul_res_operr:
14263 bra.l res_operr
14264 fsglmul_res_snan:
14265 bra.l res_snan
14266 fsglmul_res_qnan:
14267 bra.l res_qnan
14268 fsglmul_zero:
14269 bra.l fmul_zero
14270 fsglmul_inf_src:
14271 bra.l fmul_inf_src
14272 fsglmul_inf_dst:
14273 bra.l fmul_inf_dst
14275 #########################################################################
14276 # XDEF **************************************************************** #
14277 # fsgldiv(): emulates the fsgldiv instruction #
14278 # #
14279 # XREF **************************************************************** #
14280 # scale_to_zero_src() - scale src exponent to zero #
14281 # scale_to_zero_dst() - scale dst exponent to zero #
14282 # unf_res4() - return default underflow result for sglop #
14283 # ovf_res() - return default overflow result #
14284 # res_qnan() - return QNAN result #
14285 # res_snan() - return SNAN result #
14286 # #
14287 # INPUT *************************************************************** #
14288 # a0 = pointer to extended precision source operand #
14289 # a1 = pointer to extended precision destination operand #
14290 # d0 rnd prec,mode #
14291 # #
14292 # OUTPUT ************************************************************** #
14293 # fp0 = result #
14294 # fp1 = EXOP (if exception occurred) #
14295 # #
14296 # ALGORITHM *********************************************************** #
14297 # Handle NANs, infinities, and zeroes as special cases. Divide #
14298 # norms/denorms into ext/sgl/dbl precision. #
14299 # For norms/denorms, scale the exponents such that a divide #
14300 # instruction won't cause an exception. Use the regular fsgldiv to #
14301 # compute a result. Check if the regular operands would have taken #
14302 # an exception. If so, return the default overflow/underflow result #
14303 # and return the EXOP if exceptions are enabled. Else, scale the #
14304 # result operand to the proper exponent. #
14305 # #
14306 #########################################################################
14308 global fsgldiv
14309 fsgldiv:
14312 clr.w %d1
14317 bne.w fsgldiv_not_norm # optimize on non-norm input
14319 #
14320 # DIVIDE: NORMs and DENORMs ONLY!
14321 #
14322 fsgldiv_norm:
14343 ble.w fsgldiv_may_ovfl
14346 beq.w fsgldiv_may_unfl # maybe
14347 bgt.w fsgldiv_unfl # yes; go handle underflow
14349 fsgldiv_normal:
14362 fsgldiv_normal_exit:
14374 rts
14376 fsgldiv_may_ovfl:
14395 blt.b fsgldiv_normal_exit
14397 fsgldiv_ovfl_tst:
14404 fsgldiv_ovfl_dis:
14412 rts
14414 fsgldiv_ovfl_ena:
14429 bra.b fsgldiv_ovfl_dis
14431 fsgldiv_unfl:
14450 fsgldiv_unfl_dis:
14458 rts
14460 #
14461 # UNFL is enabled.
14462 #
14463 fsgldiv_unfl_ena:
14486 bra.b fsgldiv_unfl_dis
14488 #
14489 # the divide operation MAY underflow:
14490 #
14491 fsgldiv_may_unfl:
14506 fbgt.w fsgldiv_normal_exit # no; no underflow occurred
14507 fblt.w fsgldiv_unfl # yes; underflow occurred
14509 #
14510 # we still don't know if underflow occurred. result is ~ equal to 1. but,
14511 # we don't know if the result was an underflow that rounded up to a 1
14512 # or a normalized number that rounded down to a 1. so, redo the entire
14513 # operation using RZ as the rounding mode to see what the pre-rounded
14514 # result is. this case should be relatively rare.
14515 #
14529 fbge.w fsgldiv_normal_exit # no; no underflow occurred
14530 bra.w fsgldiv_unfl # yes; underflow occurred
14532 ############################################################################
14534 #
14535 # Divide: inputs are not both normalized; what are they?
14536 #
14537 fsgldiv_not_norm:
14542 tbl_fsgldiv_op:
14597 fsgldiv_res_qnan:
14598 bra.l res_qnan
14599 fsgldiv_res_snan:
14600 bra.l res_snan
14601 fsgldiv_res_operr:
14602 bra.l res_operr
14603 fsgldiv_inf_load:
14604 bra.l fdiv_inf_load
14605 fsgldiv_zero_load:
14606 bra.l fdiv_zero_load
14607 fsgldiv_inf_dst:
14608 bra.l fdiv_inf_dst
14610 #########################################################################
14611 # XDEF **************************************************************** #
14612 # fadd(): emulates the fadd instruction #
14613 # fsadd(): emulates the fadd instruction #
14614 # fdadd(): emulates the fdadd instruction #
14615 # #
14616 # XREF **************************************************************** #
14617 # addsub_scaler2() - scale the operands so they won't take exc #
14618 # ovf_res() - return default overflow result #
14619 # unf_res() - return default underflow result #
14620 # res_qnan() - set QNAN result #
14621 # res_snan() - set SNAN result #
14622 # res_operr() - set OPERR result #
14623 # scale_to_zero_src() - set src operand exponent equal to zero #
14624 # scale_to_zero_dst() - set dst operand exponent equal to zero #
14625 # #
14626 # INPUT *************************************************************** #
14627 # a0 = pointer to extended precision source operand #
14628 # a1 = pointer to extended precision destination operand #
14629 # #
14630 # OUTPUT ************************************************************** #
14631 # fp0 = result #
14632 # fp1 = EXOP (if exception occurred) #
14633 # #
14634 # ALGORITHM *********************************************************** #
14635 # Handle NANs, infinities, and zeroes as special cases. Divide #
14636 # norms into extended, single, and double precision. #
14637 # Do addition after scaling exponents such that exception won't #
14638 # occur. Then, check result exponent to see if exception would have #
14639 # occurred. If so, return default result and maybe EXOP. Else, insert #
14640 # the correct result exponent and return. Set FPSR bits as appropriate. #
14641 # #
14642 #########################################################################
14644 global fsadd
14645 fsadd:
14648 bra.b fadd
14650 global fdadd
14651 fdadd:
14655 global fadd
14659 clr.w %d1
14664 bne.w fadd_not_norm # optimize on non-norm input
14666 #
14667 # ADD: norms and denorms
14668 #
14669 fadd_norm:
14672 fadd_zero_entry:
14685 fbeq.w fadd_zero_exit # if result is zero, end now
14702 blt.w fadd_unfl # yes
14703 beq.w fadd_may_unfl # maybe; go find out
14705 fadd_normal:
14714 rts
14716 fadd_zero_exit:
14717 # fmov.s &0x00000000,%fp0 # return zero in fp0
14718 rts
14720 tbl_fadd_ovfl:
14725 tbl_fadd_unfl:
14730 fadd_ovfl:
14738 fadd_ovfl_dis:
14746 rts
14748 fadd_ovfl_ena:
14753 fadd_ovfl_ena_cont:
14762 bra.b fadd_ovfl_dis
14764 fadd_ovfl_ena_sd:
14777 bra.b fadd_ovfl_ena_cont
14779 fadd_unfl:
14800 fadd_unfl_dis:
14809 rts
14811 fadd_unfl_ena:
14820 fadd_unfl_ena_cont:
14838 bra.w fadd_unfl_dis
14840 fadd_unfl_ena_sd:
14845 bra.b fadd_unfl_ena_cont
14847 #
14848 # result is equal to the smallest normalized number in the selected precision
14849 # if the precision is extended, this result could not have come from an
14850 # underflow that rounded up.
14851 #
14852 fadd_may_unfl:
14855 beq.w fadd_normal # yes; no underflow occurred
14859 bne.w fadd_normal # no; no underflow occurred
14862 bne.w fadd_normal # no; no underflow occurred
14865 beq.w fadd_normal # no; no underflow occurred
14867 #
14868 # ok, so now the result has a exponent equal to the smallest normalized
14869 # exponent for the selected precision. also, the mantissa is equal to
14870 # 0x8000000000000000 and this mantissa is the result of rounding non-zero
14871 # g,r,s.
14872 # now, we must determine whether the pre-rounded result was an underflow
14873 # rounded "up" or a normalized number rounded "down".
14874 # so, we do this be re-executing the add using RZ as the rounding mode and
14875 # seeing if the new result is smaller or equal to the current result.
14876 #
14893 fbgt.w fadd_unfl # yes; it's an underflow
14894 bra.w fadd_normal # no; it's not an underflow
14896 ##########################################################################
14898 #
14899 # Add: inputs are not both normalized; what are they?
14900 #
14901 fadd_not_norm:
14906 tbl_fadd_op:
14961 fadd_res_qnan:
14962 bra.l res_qnan
14963 fadd_res_snan:
14964 bra.l res_snan
14966 #
14967 # both operands are ZEROes
14968 #
14969 fadd_zero_2:
14973 bmi.w fadd_zero_2_chk_rm # weed out (-ZERO)+(+ZERO)
14975 # the signs are the same. so determine whether they are positive or negative
14976 # and return the appropriately signed zero.
14981 rts
14983 #
14984 # the ZEROes have opposite signs:
14985 # - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
14986 # - -ZERO is returned in the case of RM.
14987 #
14988 fadd_zero_2_chk_rm:
14995 rts
14997 fadd_zero_rm:
15000 rts
15002 #
15003 # one operand is a ZERO and the other is a DENORM or NORM. scale
15004 # the DENORM or NORM and jump to the regular fadd routine.
15005 #
15006 fadd_zero_dst:
15014 bra.w fadd_zero_entry # go execute fadd
15016 fadd_zero_src:
15024 bra.w fadd_zero_entry # go execute fadd
15026 #
15027 # both operands are INFs. an OPERR will result if the INFs have
15028 # different signs. else, an INF of the same sign is returned
15029 #
15030 fadd_inf_2:
15036 # ok, so it's not an OPERR. but, we do have to remember to return the
15037 # src INF since that's where the 881/882 gets the j-bit from...
15039 #
15040 # operands are INF and one of {ZERO, INF, DENORM, NORM}
15041 #
15042 fadd_inf_src:
15047 rts
15049 #
15050 # operands are INF and one of {ZERO, INF, DENORM, NORM}
15051 #
15052 fadd_inf_dst:
15057 rts
15059 fadd_inf_done:
15061 rts
15063 #########################################################################
15064 # XDEF **************************************************************** #
15065 # fsub(): emulates the fsub instruction #
15066 # fssub(): emulates the fssub instruction #
15067 # fdsub(): emulates the fdsub instruction #
15068 # #
15069 # XREF **************************************************************** #
15070 # addsub_scaler2() - scale the operands so they won't take exc #
15071 # ovf_res() - return default overflow result #
15072 # unf_res() - return default underflow result #
15073 # res_qnan() - set QNAN result #
15074 # res_snan() - set SNAN result #
15075 # res_operr() - set OPERR result #
15076 # scale_to_zero_src() - set src operand exponent equal to zero #
15077 # scale_to_zero_dst() - set dst operand exponent equal to zero #
15078 # #
15079 # INPUT *************************************************************** #
15080 # a0 = pointer to extended precision source operand #
15081 # a1 = pointer to extended precision destination operand #
15082 # #
15083 # OUTPUT ************************************************************** #
15084 # fp0 = result #
15085 # fp1 = EXOP (if exception occurred) #
15086 # #
15087 # ALGORITHM *********************************************************** #
15088 # Handle NANs, infinities, and zeroes as special cases. Divide #
15089 # norms into extended, single, and double precision. #
15090 # Do subtraction after scaling exponents such that exception won't#
15091 # occur. Then, check result exponent to see if exception would have #
15092 # occurred. If so, return default result and maybe EXOP. Else, insert #
15093 # the correct result exponent and return. Set FPSR bits as appropriate. #
15094 # #
15095 #########################################################################
15097 global fssub
15098 fssub:
15101 bra.b fsub
15103 global fdsub
15104 fdsub:
15108 global fsub
15112 clr.w %d1
15117 bne.w fsub_not_norm # optimize on non-norm input
15119 #
15120 # SUB: norms and denorms
15121 #
15122 fsub_norm:
15125 fsub_zero_entry:
15138 fbeq.w fsub_zero_exit # if result zero, end now
15155 blt.w fsub_unfl # yes
15156 beq.w fsub_may_unfl # maybe; go find out
15158 fsub_normal:
15167 rts
15169 fsub_zero_exit:
15170 # fmov.s &0x00000000,%fp0 # return zero in fp0
15171 rts
15173 tbl_fsub_ovfl:
15178 tbl_fsub_unfl:
15183 fsub_ovfl:
15191 fsub_ovfl_dis:
15199 rts
15201 fsub_ovfl_ena:
15206 fsub_ovfl_ena_cont:
15215 bra.b fsub_ovfl_dis
15217 fsub_ovfl_ena_sd:
15230 bra.b fsub_ovfl_ena_cont
15232 fsub_unfl:
15253 fsub_unfl_dis:
15262 rts
15264 fsub_unfl_ena:
15273 fsub_unfl_ena_cont:
15291 bra.w fsub_unfl_dis
15293 fsub_unfl_ena_sd:
15298 bra.b fsub_unfl_ena_cont
15300 #
15301 # result is equal to the smallest normalized number in the selected precision
15302 # if the precision is extended, this result could not have come from an
15303 # underflow that rounded up.
15304 #
15305 fsub_may_unfl:
15308 beq.w fsub_normal # yes; no underflow occurred
15312 bne.w fsub_normal # no; no underflow occurred
15315 bne.w fsub_normal # no; no underflow occurred
15318 beq.w fsub_normal # no; no underflow occurred
15320 #
15321 # ok, so now the result has a exponent equal to the smallest normalized
15322 # exponent for the selected precision. also, the mantissa is equal to
15323 # 0x8000000000000000 and this mantissa is the result of rounding non-zero
15324 # g,r,s.
15325 # now, we must determine whether the pre-rounded result was an underflow
15326 # rounded "up" or a normalized number rounded "down".
15327 # so, we do this be re-executing the add using RZ as the rounding mode and
15328 # seeing if the new result is smaller or equal to the current result.
15329 #
15346 fbgt.w fsub_unfl # yes; it's an underflow
15347 bra.w fsub_normal # no; it's not an underflow
15349 ##########################################################################
15351 #
15352 # Sub: inputs are not both normalized; what are they?
15353 #
15354 fsub_not_norm:
15359 tbl_fsub_op:
15414 fsub_res_qnan:
15415 bra.l res_qnan
15416 fsub_res_snan:
15417 bra.l res_snan
15419 #
15420 # both operands are ZEROes
15421 #
15422 fsub_zero_2:
15426 bpl.b fsub_zero_2_chk_rm
15428 # the signs are opposite, so, return a ZERO w/ the sign of the dst ZERO
15433 rts
15435 #
15436 # the ZEROes have the same signs:
15437 # - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
15438 # - -ZERO is returned in the case of RM.
15439 #
15440 fsub_zero_2_chk_rm:
15447 rts
15449 fsub_zero_2_rm:
15452 rts
15454 #
15455 # one operand is a ZERO and the other is a DENORM or a NORM.
15456 # scale the DENORM or NORM and jump to the regular fsub routine.
15457 #
15458 fsub_zero_dst:
15466 bra.w fsub_zero_entry # go execute fsub
15468 fsub_zero_src:
15476 bra.w fsub_zero_entry # go execute fsub
15478 #
15479 # both operands are INFs. an OPERR will result if the INFs have the
15480 # same signs. else,
15481 #
15482 fsub_inf_2:
15488 # ok, so it's not an OPERR. but we do have to remember to return
15489 # the src INF since that's where the 881/882 gets the j-bit.
15491 fsub_inf_src:
15494 fbge.w fsub_inf_done # sign is now positive
15496 rts
15498 fsub_inf_dst:
15503 rts
15505 fsub_inf_done:
15507 rts
15509 #########################################################################
15510 # XDEF **************************************************************** #
15511 # fsqrt(): emulates the fsqrt instruction #
15512 # fssqrt(): emulates the fssqrt instruction #
15513 # fdsqrt(): emulates the fdsqrt instruction #
15514 # #
15515 # XREF **************************************************************** #
15516 # scale_sqrt() - scale the source operand #
15517 # unf_res() - return default underflow result #
15518 # ovf_res() - return default overflow result #
15519 # res_qnan_1op() - return QNAN result #
15520 # res_snan_1op() - return SNAN result #
15521 # #
15522 # INPUT *************************************************************** #
15523 # a0 = pointer to extended precision source operand #
15524 # d0 rnd prec,mode #
15525 # #
15526 # OUTPUT ************************************************************** #
15527 # fp0 = result #
15528 # fp1 = EXOP (if exception occurred) #
15529 # #
15530 # ALGORITHM *********************************************************** #
15531 # Handle NANs, infinities, and zeroes as special cases. Divide #
15532 # norms/denorms into ext/sgl/dbl precision. #
15533 # For norms/denorms, scale the exponents such that a sqrt #
15534 # instruction won't cause an exception. Use the regular fsqrt to #
15535 # compute a result. Check if the regular operands would have taken #
15536 # an exception. If so, return the default overflow/underflow result #
15537 # and return the EXOP if exceptions are enabled. Else, scale the #
15538 # result operand to the proper exponent. #
15539 # #
15540 #########################################################################
15542 global fssqrt
15543 fssqrt:
15546 bra.b fsqrt
15548 global fdsqrt
15549 fdsqrt:
15553 global fsqrt
15556 clr.w %d1
15558 bne.w fsqrt_not_norm # optimize on non-norm input
15560 #
15561 # SQUARE ROOT: norms and denorms ONLY!
15562 #
15563 fsqrt_norm:
15578 rts
15580 fsqrt_denorm:
15593 bra.w fsqrt_sd_normal
15595 #
15596 # operand is either single or double
15597 #
15598 fsqrt_not_ext:
15600 bne.w fsqrt_dbl
15602 #
15603 # operand is to be rounded to single precision
15604 #
15605 fsqrt_sgl:
15613 beq.w fsqrt_sd_may_unfl
15614 bgt.w fsqrt_sd_unfl # yes; go handle underflow
15616 beq.w fsqrt_sd_may_ovfl # maybe; go check
15617 blt.w fsqrt_sd_ovfl # yes; go handle overflow
15619 #
15620 # operand will NOT overflow or underflow when moved in to the fp reg file
15621 #
15622 fsqrt_sd_normal:
15633 fsqrt_sd_normal_exit:
15645 rts
15647 #
15648 # operand is to be rounded to double precision
15649 #
15650 fsqrt_dbl:
15658 beq.w fsqrt_sd_may_unfl
15661 beq.w fsqrt_sd_may_ovfl # maybe; go check
15662 blt.w fsqrt_sd_ovfl # yes; go handle overflow
15663 bra.w fsqrt_sd_normal # no; ho handle normalized op
15665 # we're on the line here and the distinguising characteristic is whether
15666 # the exponent is 3fff or 3ffe. if it's 3ffe, then it's a safe number
15667 # elsewise fall through to underflow.
15668 fsqrt_sd_may_unfl:
15670 bne.w fsqrt_sd_normal # yes, so no underflow
15672 #
15673 # operand WILL underflow when moved in to the fp register file
15674 #
15675 fsqrt_sd_unfl:
15688 # if underflow or inexact is enabled, go calculate EXOP first.
15693 fsqrt_sd_unfl_dis:
15701 rts
15703 #
15704 # operand will underflow AND underflow is enabled.
15705 # therefore, we must return the result rounded to extended precision.
15706 #
15707 fsqrt_sd_unfl_ena:
15723 bra.b fsqrt_sd_unfl_dis
15725 #
15726 # operand WILL overflow.
15727 #
15728 fsqrt_sd_ovfl:
15739 fsqrt_sd_ovfl_tst:
15746 #
15747 # OVFL is not enabled; therefore, we must create the default result by
15748 # calling ovf_res().
15749 #
15750 fsqrt_sd_ovfl_dis:
15757 rts
15759 #
15760 # OVFL is enabled.
15761 # the INEX2 bit has already been updated by the round to the correct precision.
15762 # now, round to extended(and don't alter the FPSR).
15763 #
15764 fsqrt_sd_ovfl_ena:
15777 bra.b fsqrt_sd_ovfl_dis
15779 #
15780 # the move in MAY underflow. so...
15781 #
15782 fsqrt_sd_may_ovfl:
15784 bne.w fsqrt_sd_ovfl # yes, so overflow
15798 fbge.w fsqrt_sd_ovfl_tst # yes; overflow has occurred
15800 # no, it didn't overflow; we have correct result
15801 bra.w fsqrt_sd_normal_exit
15803 ##########################################################################
15805 #
15806 # input is not normalized; what is it?
15807 #
15808 fsqrt_not_norm:
15810 beq.w fsqrt_denorm
15812 beq.b fsqrt_zero
15814 beq.b fsqrt_inf
15816 beq.l res_snan_1op
15817 bra.l res_qnan_1op
15819 #
15820 # fsqrt(+0) = +0
15821 # fsqrt(-0) = -0
15822 # fsqrt(+INF) = +INF
15823 # fsqrt(-INF) = OPERR
15824 #
15825 fsqrt_zero:
15828 fsqrt_zero_p:
15831 rts
15832 fsqrt_zero_m:
15835 rts
15837 fsqrt_inf:
15840 fsqrt_inf_p:
15843 rts
15845 ##########################################################################
15847 #########################################################################
15848 # XDEF **************************************************************** #
15849 # addsub_scaler2(): scale inputs to fadd/fsub such that no #
15850 # OVFL/UNFL exceptions will result #
15851 # #
15852 # XREF **************************************************************** #
15853 # norm() - normalize mantissa after adjusting exponent #
15854 # #
15855 # INPUT *************************************************************** #
15856 # FP_SRC(a6) = fp op1(src) #
15857 # FP_DST(a6) = fp op2(dst) #
15858 # #
15859 # OUTPUT ************************************************************** #
15860 # FP_SRC(a6) = fp op1 scaled(src) #
15861 # FP_DST(a6) = fp op2 scaled(dst) #
15862 # d0 = scale amount #
15863 # #
15864 # ALGORITHM *********************************************************** #
15865 # If the DST exponent is > the SRC exponent, set the DST exponent #
15866 # equal to 0x3fff and scale the SRC exponent by the value that the #
15867 # DST exponent was scaled by. If the SRC exponent is greater or equal, #
15868 # do the opposite. Return this scale factor in d0. #
15869 # If the two exponents differ by > the number of mantissa bits #
15870 # plus two, then set the smallest exponent to a very small value as a #
15871 # quick shortcut. #
15872 # #
15873 #########################################################################
15875 global addsub_scaler2
15876 addsub_scaler2:
15892 bge.l src_exp_ge2
15894 # dst exp is > src exp; scale dst to exp = 0x3fff
15895 dst_exp_gt2:
15896 bsr.l scale_to_zero_dst
15900 bne.b cmpexp12
15907 cmpexp12:
15912 bge.b quick_scale12
15922 rts
15924 quick_scale12:
15929 rts
15931 # src exp is >= dst exp; scale src to exp = 0x3fff
15932 src_exp_ge2:
15933 bsr.l scale_to_zero_src
15937 bne.b cmpexp22
15943 cmpexp22:
15948 bge.b quick_scale22
15958 rts
15960 quick_scale22:
15965 rts
15967 ##########################################################################
15969 #########################################################################
15970 # XDEF **************************************************************** #
15971 # scale_to_zero_src(): scale the exponent of extended precision #
15972 # value at FP_SCR0(a6). #
15973 # #
15974 # XREF **************************************************************** #
15975 # norm() - normalize the mantissa if the operand was a DENORM #
15976 # #
15977 # INPUT *************************************************************** #
15978 # FP_SCR0(a6) = extended precision operand to be scaled #
15979 # #
15980 # OUTPUT ************************************************************** #
15981 # FP_SCR0(a6) = scaled extended precision operand #
15982 # d0 = scale value #
15983 # #
15984 # ALGORITHM *********************************************************** #
15985 # Set the exponent of the input operand to 0x3fff. Save the value #
15986 # of the difference between the original and new exponent. Then, #
15987 # normalize the operand if it was a DENORM. Add this normalization #
15988 # value to the previous value. Return the result. #
15989 # #
15990 #########################################################################
15992 global scale_to_zero_src
15993 scale_to_zero_src:
16007 stzs_norm:
16011 rts
16013 stzs_denorm:
16020 ###
16022 #########################################################################
16023 # XDEF **************************************************************** #
16024 # scale_sqrt(): scale the input operand exponent so a subsequent #
16025 # fsqrt operation won't take an exception. #
16026 # #
16027 # XREF **************************************************************** #
16028 # norm() - normalize the mantissa if the operand was a DENORM #
16029 # #
16030 # INPUT *************************************************************** #
16031 # FP_SCR0(a6) = extended precision operand to be scaled #
16032 # #
16033 # OUTPUT ************************************************************** #
16034 # FP_SCR0(a6) = scaled extended precision operand #
16035 # d0 = scale value #
16036 # #
16037 # ALGORITHM *********************************************************** #
16038 # If the input operand is a DENORM, normalize it. #
16039 # If the exponent of the input operand is even, set the exponent #
16040 # to 0x3ffe and return a scale factor of "(exp-0x3ffe)/2". If the #
16041 # exponent of the input operand is off, set the exponent to ox3fff and #
16042 # return a scale factor of "(exp-0x3fff)/2". #
16043 # #
16044 #########################################################################
16046 global scale_sqrt
16047 scale_sqrt:
16057 beq.b ss_norm_even
16064 rts
16066 ss_norm_even:
16072 rts
16074 ss_denorm:
16079 beq.b ss_denorm_even
16085 rts
16087 ss_denorm_even:
16092 rts
16094 ###
16096 #########################################################################
16097 # XDEF **************************************************************** #
16098 # scale_to_zero_dst(): scale the exponent of extended precision #
16099 # value at FP_SCR1(a6). #
16100 # #
16101 # XREF **************************************************************** #
16102 # norm() - normalize the mantissa if the operand was a DENORM #
16103 # #
16104 # INPUT *************************************************************** #
16105 # FP_SCR1(a6) = extended precision operand to be scaled #
16106 # #
16107 # OUTPUT ************************************************************** #
16108 # FP_SCR1(a6) = scaled extended precision operand #
16109 # d0 = scale value #
16110 # #
16111 # ALGORITHM *********************************************************** #
16112 # Set the exponent of the input operand to 0x3fff. Save the value #
16113 # of the difference between the original and new exponent. Then, #
16114 # normalize the operand if it was a DENORM. Add this normalization #
16115 # value to the previous value. Return the result. #
16116 # #
16117 #########################################################################
16119 global scale_to_zero_dst
16120 scale_to_zero_dst:
16134 stzd_norm:
16137 rts
16139 stzd_denorm:
16146 ##########################################################################
16148 #########################################################################
16149 # XDEF **************************************************************** #
16150 # res_qnan(): return default result w/ QNAN operand for dyadic #
16151 # res_snan(): return default result w/ SNAN operand for dyadic #
16152 # res_qnan_1op(): return dflt result w/ QNAN operand for monadic #
16153 # res_snan_1op(): return dflt result w/ SNAN operand for monadic #
16154 # #
16155 # XREF **************************************************************** #
16156 # None #
16157 # #
16158 # INPUT *************************************************************** #
16159 # FP_SRC(a6) = pointer to extended precision src operand #
16160 # FP_DST(a6) = pointer to extended precision dst operand #
16161 # #
16162 # OUTPUT ************************************************************** #
16163 # fp0 = default result #
16164 # #
16165 # ALGORITHM *********************************************************** #
16166 # If either operand (but not both operands) of an operation is a #
16167 # nonsignalling NAN, then that NAN is returned as the result. If both #
16168 # operands are nonsignalling NANs, then the destination operand #
16169 # nonsignalling NAN is returned as the result. #
16170 # If either operand to an operation is a signalling NAN (SNAN), #
16171 # then, the SNAN bit is set in the FPSR EXC byte. If the SNAN trap #
16172 # enable bit is set in the FPCR, then the trap is taken and the #
16173 # destination is not modified. If the SNAN trap enable bit is not set, #
16174 # then the SNAN is converted to a nonsignalling NAN (by setting the #
16175 # SNAN bit in the operand to one), and the operation continues as #
16176 # described in the preceding paragraph, for nonsignalling NANs. #
16177 # Make sure the appropriate FPSR bits are set before exiting. #
16178 # #
16179 #########################################################################
16181 global res_qnan
16182 global res_snan
16183 res_qnan:
16184 res_snan:
16186 beq.b dst_snan2
16188 beq.b dst_qnan2
16189 src_nan:
16191 beq.b src_qnan2
16192 global res_snan_1op
16193 res_snan_1op:
16194 src_snan2:
16198 bra.b nan_comp
16199 global res_qnan_1op
16200 res_qnan_1op:
16201 src_qnan2:
16204 bra.b nan_comp
16205 dst_snan2:
16209 bra.b nan_comp
16210 dst_qnan2:
16213 bne nan_done
16215 nan_done:
16217 nan_comp:
16219 beq.b nan_not_neg
16221 nan_not_neg:
16223 rts
16225 #########################################################################
16226 # XDEF **************************************************************** #
16227 # res_operr(): return default result during operand error #
16228 # #
16229 # XREF **************************************************************** #
16230 # None #
16231 # #
16232 # INPUT *************************************************************** #
16233 # None #
16234 # #
16235 # OUTPUT ************************************************************** #
16236 # fp0 = default operand error result #
16237 # #
16238 # ALGORITHM *********************************************************** #
16239 # An nonsignalling NAN is returned as the default result when #
16240 # an operand error occurs for the following cases: #
16241 # #
16242 # Multiply: (Infinity x Zero) #
16243 # Divide : (Zero / Zero) || (Infinity / Infinity) #
16244 # #
16245 #########################################################################
16247 global res_operr
16248 res_operr:
16251 rts
16253 nan_return:
16256 #########################################################################
16257 # fdbcc(): routine to emulate the fdbcc instruction #
16258 # #
16259 # XDEF **************************************************************** #
16260 # _fdbcc() #
16261 # #
16262 # XREF **************************************************************** #
16263 # fetch_dreg() - fetch Dn value #
16264 # store_dreg_l() - store updated Dn value #
16265 # #
16266 # INPUT *************************************************************** #
16267 # d0 = displacement #
16268 # #
16269 # OUTPUT ************************************************************** #
16270 # none #
16271 # #
16272 # ALGORITHM *********************************************************** #
16273 # This routine checks which conditional predicate is specified by #
16274 # the stacked fdbcc instruction opcode and then branches to a routine #
16275 # for that predicate. The corresponding fbcc instruction is then used #
16276 # to see whether the condition (specified by the stacked FPSR) is true #
16277 # or false. #
16278 # If a BSUN exception should be indicated, the BSUN and ABSUN #
16279 # bits are set in the stacked FPSR. If the BSUN exception is enabled, #
16280 # the fbsun_flg is set in the SPCOND_FLG location on the stack. If an #
16281 # enabled BSUN should not be flagged and the predicate is true, then #
16282 # Dn is fetched and decremented by one. If Dn is not equal to -1, add #
16283 # the displacement value to the stacked PC so that when an "rte" is #
16284 # finally executed, the branch occurs. #
16285 # #
16286 #########################################################################
16287 global _fdbcc
16288 _fdbcc:
16301 tbl_fdbcc:
16335 #########################################################################
16336 # #
16337 # IEEE Nonaware tests #
16338 # #
16339 # For the IEEE nonaware tests, only the false branch changes the #
16340 # counter. However, the true branch may set bsun so we check to see #
16341 # if the NAN bit is set, in which case BSUN and AIOP will be set. #
16342 # #
16343 # The cases EQ and NE are shared by the Aware and Nonaware groups #
16344 # and are incapable of setting the BSUN exception bit. #
16345 # #
16346 # Typically, only one of the two possible branch directions could #
16347 # have the NAN bit set. #
16348 # (This is assuming the mutual exclusiveness of FPSR cc bit groupings #
16349 # is preserved.) #
16350 # #
16351 #########################################################################
16353 #
16354 # equal:
16355 #
16356 # Z
16357 #
16358 fdbcc_eq:
16359 fbeq.w fdbcc_eq_yes # equal?
16360 fdbcc_eq_no:
16361 bra.w fdbcc_false # no; go handle counter
16362 fdbcc_eq_yes:
16363 rts
16365 #
16366 # not equal:
16367 # _
16368 # Z
16369 #
16370 fdbcc_neq:
16371 fbneq.w fdbcc_neq_yes # not equal?
16372 fdbcc_neq_no:
16373 bra.w fdbcc_false # no; go handle counter
16374 fdbcc_neq_yes:
16375 rts
16377 #
16378 # greater than:
16379 # _______
16380 # NANvZvN
16381 #
16382 fdbcc_gt:
16383 fbgt.w fdbcc_gt_yes # greater than?
16385 beq.w fdbcc_false # no;go handle counter
16388 bne.w fdbcc_bsun # yes; we have an exception
16389 bra.w fdbcc_false # no; go handle counter
16390 fdbcc_gt_yes:
16391 rts # do nothing
16393 #
16394 # not greater than:
16395 #
16396 # NANvZvN
16397 #
16398 fdbcc_ngt:
16399 fbngt.w fdbcc_ngt_yes # not greater than?
16400 fdbcc_ngt_no:
16401 bra.w fdbcc_false # no; go handle counter
16402 fdbcc_ngt_yes:
16407 bne.w fdbcc_bsun # yes; we have an exception
16408 fdbcc_ngt_done:
16409 rts # no; do nothing
16411 #
16412 # greater than or equal:
16413 # _____
16414 # Zv(NANvN)
16415 #
16416 fdbcc_ge:
16417 fbge.w fdbcc_ge_yes # greater than or equal?
16418 fdbcc_ge_no:
16420 beq.w fdbcc_false # no;go handle counter
16423 bne.w fdbcc_bsun # yes; we have an exception
16424 bra.w fdbcc_false # no; go handle counter
16425 fdbcc_ge_yes:
16430 bne.w fdbcc_bsun # yes; we have an exception
16431 fdbcc_ge_yes_done:
16432 rts # do nothing
16434 #
16435 # not (greater than or equal):
16436 # _
16437 # NANv(N^Z)
16438 #
16439 fdbcc_nge:
16440 fbnge.w fdbcc_nge_yes # not (greater than or equal)?
16441 fdbcc_nge_no:
16442 bra.w fdbcc_false # no; go handle counter
16443 fdbcc_nge_yes:
16448 bne.w fdbcc_bsun # yes; we have an exception
16449 fdbcc_nge_done:
16450 rts # no; do nothing
16452 #
16453 # less than:
16454 # _____
16455 # N^(NANvZ)
16456 #
16457 fdbcc_lt:
16458 fblt.w fdbcc_lt_yes # less than?
16459 fdbcc_lt_no:
16461 beq.w fdbcc_false # no; go handle counter
16464 bne.w fdbcc_bsun # yes; we have an exception
16465 bra.w fdbcc_false # no; go handle counter
16466 fdbcc_lt_yes:
16467 rts # do nothing
16469 #
16470 # not less than:
16471 # _
16472 # NANv(ZvN)
16473 #
16474 fdbcc_nlt:
16475 fbnlt.w fdbcc_nlt_yes # not less than?
16476 fdbcc_nlt_no:
16477 bra.w fdbcc_false # no; go handle counter
16478 fdbcc_nlt_yes:
16483 bne.w fdbcc_bsun # yes; we have an exception
16484 fdbcc_nlt_done:
16485 rts # no; do nothing
16487 #
16488 # less than or equal:
16489 # ___
16490 # Zv(N^NAN)
16491 #
16492 fdbcc_le:
16493 fble.w fdbcc_le_yes # less than or equal?
16494 fdbcc_le_no:
16496 beq.w fdbcc_false # no; go handle counter
16499 bne.w fdbcc_bsun # yes; we have an exception
16500 bra.w fdbcc_false # no; go handle counter
16501 fdbcc_le_yes:
16506 bne.w fdbcc_bsun # yes; we have an exception
16507 fdbcc_le_yes_done:
16508 rts # do nothing
16510 #
16511 # not (less than or equal):
16512 # ___
16513 # NANv(NvZ)
16514 #
16515 fdbcc_nle:
16516 fbnle.w fdbcc_nle_yes # not (less than or equal)?
16517 fdbcc_nle_no:
16518 bra.w fdbcc_false # no; go handle counter
16519 fdbcc_nle_yes:
16521 beq.w fdbcc_nle_done # no; go finish
16524 bne.w fdbcc_bsun # yes; we have an exception
16525 fdbcc_nle_done:
16526 rts # no; do nothing
16528 #
16529 # greater or less than:
16530 # _____
16531 # NANvZ
16532 #
16533 fdbcc_gl:
16534 fbgl.w fdbcc_gl_yes # greater or less than?
16535 fdbcc_gl_no:
16537 beq.w fdbcc_false # no; handle counter
16540 bne.w fdbcc_bsun # yes; we have an exception
16541 bra.w fdbcc_false # no; go handle counter
16542 fdbcc_gl_yes:
16543 rts # do nothing
16545 #
16546 # not (greater or less than):
16547 #
16548 # NANvZ
16549 #
16550 fdbcc_ngl:
16551 fbngl.w fdbcc_ngl_yes # not (greater or less than)?
16552 fdbcc_ngl_no:
16553 bra.w fdbcc_false # no; go handle counter
16554 fdbcc_ngl_yes:
16559 bne.w fdbcc_bsun # yes; we have an exception
16560 fdbcc_ngl_done:
16561 rts # no; do nothing
16563 #
16564 # greater, less, or equal:
16565 # ___
16566 # NAN
16567 #
16568 fdbcc_gle:
16569 fbgle.w fdbcc_gle_yes # greater, less, or equal?
16570 fdbcc_gle_no:
16573 bne.w fdbcc_bsun # yes; we have an exception
16574 bra.w fdbcc_false # no; go handle counter
16575 fdbcc_gle_yes:
16576 rts # do nothing
16578 #
16579 # not (greater, less, or equal):
16580 #
16581 # NAN
16582 #
16583 fdbcc_ngle:
16584 fbngle.w fdbcc_ngle_yes # not (greater, less, or equal)?
16585 fdbcc_ngle_no:
16586 bra.w fdbcc_false # no; go handle counter
16587 fdbcc_ngle_yes:
16590 bne.w fdbcc_bsun # yes; we have an exception
16591 rts # no; do nothing
16593 #########################################################################
16594 # #
16595 # Miscellaneous tests #
16596 # #
16597 # For the IEEE miscellaneous tests, all but fdbf and fdbt can set bsun. #
16598 # #
16599 #########################################################################
16601 #
16602 # false:
16603 #
16604 # False
16605 #
16607 bra.w fdbcc_false # go handle counter
16609 #
16610 # true:
16611 #
16612 # True
16613 #
16615 rts # do nothing
16617 #
16618 # signalling false:
16619 #
16620 # False
16621 #
16622 fdbcc_sf:
16624 beq.w fdbcc_false # no;go handle counter
16627 bne.w fdbcc_bsun # yes; we have an exception
16628 bra.w fdbcc_false # go handle counter
16630 #
16631 # signalling true:
16632 #
16633 # True
16634 #
16635 fdbcc_st:
16640 bne.w fdbcc_bsun # yes; we have an exception
16641 fdbcc_st_done:
16642 rts
16644 #
16645 # signalling equal:
16646 #
16647 # Z
16648 #
16649 fdbcc_seq:
16650 fbseq.w fdbcc_seq_yes # signalling equal?
16651 fdbcc_seq_no:
16653 beq.w fdbcc_false # no;go handle counter
16656 bne.w fdbcc_bsun # yes; we have an exception
16657 bra.w fdbcc_false # go handle counter
16658 fdbcc_seq_yes:
16663 bne.w fdbcc_bsun # yes; we have an exception
16664 fdbcc_seq_yes_done:
16665 rts # yes; do nothing
16667 #
16668 # signalling not equal:
16669 # _
16670 # Z
16671 #
16672 fdbcc_sneq:
16673 fbsneq.w fdbcc_sneq_yes # signalling not equal?
16674 fdbcc_sneq_no:
16676 beq.w fdbcc_false # no;go handle counter
16679 bne.w fdbcc_bsun # yes; we have an exception
16680 bra.w fdbcc_false # go handle counter
16681 fdbcc_sneq_yes:
16683 beq.w fdbcc_sneq_done # no;go finish
16686 bne.w fdbcc_bsun # yes; we have an exception
16687 fdbcc_sneq_done:
16688 rts
16690 #########################################################################
16691 # #
16692 # IEEE Aware tests #
16693 # #
16694 # For the IEEE aware tests, action is only taken if the result is false.#
16695 # Therefore, the opposite branch type is used to jump to the decrement #
16696 # routine. #
16697 # The BSUN exception will not be set for any of these tests. #
16698 # #
16699 #########################################################################
16701 #
16702 # ordered greater than:
16703 # _______
16704 # NANvZvN
16705 #
16706 fdbcc_ogt:
16707 fbogt.w fdbcc_ogt_yes # ordered greater than?
16708 fdbcc_ogt_no:
16709 bra.w fdbcc_false # no; go handle counter
16710 fdbcc_ogt_yes:
16711 rts # yes; do nothing
16713 #
16714 # unordered or less or equal:
16715 # _______
16716 # NANvZvN
16717 #
16718 fdbcc_ule:
16719 fbule.w fdbcc_ule_yes # unordered or less or equal?
16720 fdbcc_ule_no:
16721 bra.w fdbcc_false # no; go handle counter
16722 fdbcc_ule_yes:
16723 rts # yes; do nothing
16725 #
16726 # ordered greater than or equal:
16727 # _____
16728 # Zv(NANvN)
16729 #
16730 fdbcc_oge:
16731 fboge.w fdbcc_oge_yes # ordered greater than or equal?
16732 fdbcc_oge_no:
16733 bra.w fdbcc_false # no; go handle counter
16734 fdbcc_oge_yes:
16735 rts # yes; do nothing
16737 #
16738 # unordered or less than:
16739 # _
16740 # NANv(N^Z)
16741 #
16742 fdbcc_ult:
16743 fbult.w fdbcc_ult_yes # unordered or less than?
16744 fdbcc_ult_no:
16745 bra.w fdbcc_false # no; go handle counter
16746 fdbcc_ult_yes:
16747 rts # yes; do nothing
16749 #
16750 # ordered less than:
16751 # _____
16752 # N^(NANvZ)
16753 #
16754 fdbcc_olt:
16755 fbolt.w fdbcc_olt_yes # ordered less than?
16756 fdbcc_olt_no:
16757 bra.w fdbcc_false # no; go handle counter
16758 fdbcc_olt_yes:
16759 rts # yes; do nothing
16761 #
16762 # unordered or greater or equal:
16763 #
16764 # NANvZvN
16765 #
16766 fdbcc_uge:
16767 fbuge.w fdbcc_uge_yes # unordered or greater than?
16768 fdbcc_uge_no:
16769 bra.w fdbcc_false # no; go handle counter
16770 fdbcc_uge_yes:
16771 rts # yes; do nothing
16773 #
16774 # ordered less than or equal:
16775 # ___
16776 # Zv(N^NAN)
16777 #
16778 fdbcc_ole:
16779 fbole.w fdbcc_ole_yes # ordered greater or less than?
16780 fdbcc_ole_no:
16781 bra.w fdbcc_false # no; go handle counter
16782 fdbcc_ole_yes:
16783 rts # yes; do nothing
16785 #
16786 # unordered or greater than:
16787 # ___
16788 # NANv(NvZ)
16789 #
16790 fdbcc_ugt:
16791 fbugt.w fdbcc_ugt_yes # unordered or greater than?
16792 fdbcc_ugt_no:
16793 bra.w fdbcc_false # no; go handle counter
16794 fdbcc_ugt_yes:
16795 rts # yes; do nothing
16797 #
16798 # ordered greater or less than:
16799 # _____
16800 # NANvZ
16801 #
16802 fdbcc_ogl:
16803 fbogl.w fdbcc_ogl_yes # ordered greater or less than?
16804 fdbcc_ogl_no:
16805 bra.w fdbcc_false # no; go handle counter
16806 fdbcc_ogl_yes:
16807 rts # yes; do nothing
16809 #
16810 # unordered or equal:
16811 #
16812 # NANvZ
16813 #
16814 fdbcc_ueq:
16815 fbueq.w fdbcc_ueq_yes # unordered or equal?
16816 fdbcc_ueq_no:
16817 bra.w fdbcc_false # no; go handle counter
16818 fdbcc_ueq_yes:
16819 rts # yes; do nothing
16821 #
16822 # ordered:
16823 # ___
16824 # NAN
16825 #
16826 fdbcc_or:
16827 fbor.w fdbcc_or_yes # ordered?
16828 fdbcc_or_no:
16829 bra.w fdbcc_false # no; go handle counter
16830 fdbcc_or_yes:
16831 rts # yes; do nothing
16833 #
16834 # unordered:
16835 #
16836 # NAN
16837 #
16838 fdbcc_un:
16839 fbun.w fdbcc_un_yes # unordered?
16840 fdbcc_un_no:
16841 bra.w fdbcc_false # no; go handle counter
16842 fdbcc_un_yes:
16843 rts # yes; do nothing
16845 #######################################################################
16847 #
16848 # the bsun exception bit was not set.
16849 #
16850 # (1) subtract 1 from the count register
16851 # (2) if (cr == -1) then
16852 # pc = pc of next instruction
16853 # else
16854 # pc += sign_ext(16-bit displacement)
16855 #
16856 fdbcc_false:
16861 # make sure that d0 isn't corrupted between calls...
16869 rts
16871 fdbcc_false_cont:
16876 rts
16878 # the emulation routine set bsun and BSUN was enabled. have to
16879 # fix stack and jump to the bsun handler.
16880 # let the caller of this routine shift the stack frame up to
16881 # eliminate the effective address field.
16882 fdbcc_bsun:
16884 rts
16886 #########################################################################
16887 # ftrapcc(): routine to emulate the ftrapcc instruction #
16888 # #
16889 # XDEF **************************************************************** #
16890 # _ftrapcc() #
16891 # #
16892 # XREF **************************************************************** #
16893 # none #
16894 # #
16895 # INPUT *************************************************************** #
16896 # none #
16897 # #
16898 # OUTPUT ************************************************************** #
16899 # none #
16900 # #
16901 # ALGORITHM *********************************************************** #
16902 # This routine checks which conditional predicate is specified by #
16903 # the stacked ftrapcc instruction opcode and then branches to a routine #
16904 # for that predicate. The corresponding fbcc instruction is then used #
16905 # to see whether the condition (specified by the stacked FPSR) is true #
16906 # or false. #
16907 # If a BSUN exception should be indicated, the BSUN and ABSUN #
16908 # bits are set in the stacked FPSR. If the BSUN exception is enabled, #
16909 # the fbsun_flg is set in the SPCOND_FLG location on the stack. If an #
16910 # enabled BSUN should not be flagged and the predicate is true, then #
16911 # the ftrapcc_flg is set in the SPCOND_FLG location. These special #
16912 # flags indicate to the calling routine to emulate the exceptional #
16913 # condition. #
16914 # #
16915 #########################################################################
16917 global _ftrapcc
16918 _ftrapcc:
16929 tbl_ftrapcc:
16963 #########################################################################
16964 # #
16965 # IEEE Nonaware tests #
16966 # #
16967 # For the IEEE nonaware tests, we set the result based on the #
16968 # floating point condition codes. In addition, we check to see #
16969 # if the NAN bit is set, in which case BSUN and AIOP will be set. #
16970 # #
16971 # The cases EQ and NE are shared by the Aware and Nonaware groups #
16972 # and are incapable of setting the BSUN exception bit. #
16973 # #
16974 # Typically, only one of the two possible branch directions could #
16975 # have the NAN bit set. #
16976 # #
16977 #########################################################################
16979 #
16980 # equal:
16981 #
16982 # Z
16983 #
16984 ftrapcc_eq:
16985 fbeq.w ftrapcc_trap # equal?
16986 ftrapcc_eq_no:
16987 rts # do nothing
16989 #
16990 # not equal:
16991 # _
16992 # Z
16993 #
16994 ftrapcc_neq:
16995 fbneq.w ftrapcc_trap # not equal?
16996 ftrapcc_neq_no:
16997 rts # do nothing
16999 #
17000 # greater than:
17001 # _______
17002 # NANvZvN
17003 #
17004 ftrapcc_gt:
17005 fbgt.w ftrapcc_trap # greater than?
17006 ftrapcc_gt_no:
17011 bne.w ftrapcc_bsun # yes
17012 ftrapcc_gt_done:
17013 rts # no; do nothing
17015 #
17016 # not greater than:
17017 #
17018 # NANvZvN
17019 #
17020 ftrapcc_ngt:
17021 fbngt.w ftrapcc_ngt_yes # not greater than?
17022 ftrapcc_ngt_no:
17023 rts # do nothing
17024 ftrapcc_ngt_yes:
17026 beq.w ftrapcc_trap # no; go take trap
17029 bne.w ftrapcc_bsun # yes
17030 bra.w ftrapcc_trap # no; go take trap
17032 #
17033 # greater than or equal:
17034 # _____
17035 # Zv(NANvN)
17036 #
17037 ftrapcc_ge:
17038 fbge.w ftrapcc_ge_yes # greater than or equal?
17039 ftrapcc_ge_no:
17044 bne.w ftrapcc_bsun # yes
17045 ftrapcc_ge_done:
17046 rts # no; do nothing
17047 ftrapcc_ge_yes:
17049 beq.w ftrapcc_trap # no; go take trap
17052 bne.w ftrapcc_bsun # yes
17053 bra.w ftrapcc_trap # no; go take trap
17055 #
17056 # not (greater than or equal):
17057 # _
17058 # NANv(N^Z)
17059 #
17060 ftrapcc_nge:
17061 fbnge.w ftrapcc_nge_yes # not (greater than or equal)?
17062 ftrapcc_nge_no:
17063 rts # do nothing
17064 ftrapcc_nge_yes:
17066 beq.w ftrapcc_trap # no; go take trap
17069 bne.w ftrapcc_bsun # yes
17070 bra.w ftrapcc_trap # no; go take trap
17072 #
17073 # less than:
17074 # _____
17075 # N^(NANvZ)
17076 #
17077 ftrapcc_lt:
17078 fblt.w ftrapcc_trap # less than?
17079 ftrapcc_lt_no:
17084 bne.w ftrapcc_bsun # yes
17085 ftrapcc_lt_done:
17086 rts # no; do nothing
17088 #
17089 # not less than:
17090 # _
17091 # NANv(ZvN)
17092 #
17093 ftrapcc_nlt:
17094 fbnlt.w ftrapcc_nlt_yes # not less than?
17095 ftrapcc_nlt_no:
17096 rts # do nothing
17097 ftrapcc_nlt_yes:
17099 beq.w ftrapcc_trap # no; go take trap
17102 bne.w ftrapcc_bsun # yes
17103 bra.w ftrapcc_trap # no; go take trap
17105 #
17106 # less than or equal:
17107 # ___
17108 # Zv(N^NAN)
17109 #
17110 ftrapcc_le:
17111 fble.w ftrapcc_le_yes # less than or equal?
17112 ftrapcc_le_no:
17117 bne.w ftrapcc_bsun # yes
17118 ftrapcc_le_done:
17119 rts # no; do nothing
17120 ftrapcc_le_yes:
17122 beq.w ftrapcc_trap # no; go take trap
17125 bne.w ftrapcc_bsun # yes
17126 bra.w ftrapcc_trap # no; go take trap
17128 #
17129 # not (less than or equal):
17130 # ___
17131 # NANv(NvZ)
17132 #
17133 ftrapcc_nle:
17134 fbnle.w ftrapcc_nle_yes # not (less than or equal)?
17135 ftrapcc_nle_no:
17136 rts # do nothing
17137 ftrapcc_nle_yes:
17139 beq.w ftrapcc_trap # no; go take trap
17142 bne.w ftrapcc_bsun # yes
17143 bra.w ftrapcc_trap # no; go take trap
17145 #
17146 # greater or less than:
17147 # _____
17148 # NANvZ
17149 #
17150 ftrapcc_gl:
17151 fbgl.w ftrapcc_trap # greater or less than?
17152 ftrapcc_gl_no:
17157 bne.w ftrapcc_bsun # yes
17158 ftrapcc_gl_done:
17159 rts # no; do nothing
17161 #
17162 # not (greater or less than):
17163 #
17164 # NANvZ
17165 #
17166 ftrapcc_ngl:
17167 fbngl.w ftrapcc_ngl_yes # not (greater or less than)?
17168 ftrapcc_ngl_no:
17169 rts # do nothing
17170 ftrapcc_ngl_yes:
17172 beq.w ftrapcc_trap # no; go take trap
17175 bne.w ftrapcc_bsun # yes
17176 bra.w ftrapcc_trap # no; go take trap
17178 #
17179 # greater, less, or equal:
17180 # ___
17181 # NAN
17182 #
17183 ftrapcc_gle:
17184 fbgle.w ftrapcc_trap # greater, less, or equal?
17185 ftrapcc_gle_no:
17188 bne.w ftrapcc_bsun # yes
17189 rts # no; do nothing
17191 #
17192 # not (greater, less, or equal):
17193 #
17194 # NAN
17195 #
17196 ftrapcc_ngle:
17197 fbngle.w ftrapcc_ngle_yes # not (greater, less, or equal)?
17198 ftrapcc_ngle_no:
17199 rts # do nothing
17200 ftrapcc_ngle_yes:
17203 bne.w ftrapcc_bsun # yes
17204 bra.w ftrapcc_trap # no; go take trap
17206 #########################################################################
17207 # #
17208 # Miscellaneous tests #
17209 # #
17210 # For the IEEE aware tests, we only have to set the result based on the #
17211 # floating point condition codes. The BSUN exception will not be #
17212 # set for any of these tests. #
17213 # #
17214 #########################################################################
17216 #
17217 # false:
17218 #
17219 # False
17220 #
17221 ftrapcc_f:
17222 rts # do nothing
17224 #
17225 # true:
17226 #
17227 # True
17228 #
17229 ftrapcc_t:
17230 bra.w ftrapcc_trap # go take trap
17232 #
17233 # signalling false:
17234 #
17235 # False
17236 #
17237 ftrapcc_sf:
17242 bne.w ftrapcc_bsun # yes
17243 ftrapcc_sf_done:
17244 rts # no; do nothing
17246 #
17247 # signalling true:
17248 #
17249 # True
17250 #
17251 ftrapcc_st:
17253 beq.w ftrapcc_trap # no; go take trap
17256 bne.w ftrapcc_bsun # yes
17257 bra.w ftrapcc_trap # no; go take trap
17259 #
17260 # signalling equal:
17261 #
17262 # Z
17263 #
17264 ftrapcc_seq:
17265 fbseq.w ftrapcc_seq_yes # signalling equal?
17266 ftrapcc_seq_no:
17268 beq.w ftrapcc_seq_done # no; go finish
17271 bne.w ftrapcc_bsun # yes
17272 ftrapcc_seq_done:
17273 rts # no; do nothing
17274 ftrapcc_seq_yes:
17276 beq.w ftrapcc_trap # no; go take trap
17279 bne.w ftrapcc_bsun # yes
17280 bra.w ftrapcc_trap # no; go take trap
17282 #
17283 # signalling not equal:
17284 # _
17285 # Z
17286 #
17287 ftrapcc_sneq:
17288 fbsneq.w ftrapcc_sneq_yes # signalling equal?
17289 ftrapcc_sneq_no:
17291 beq.w ftrapcc_sneq_no_done # no; go finish
17294 bne.w ftrapcc_bsun # yes
17295 ftrapcc_sneq_no_done:
17296 rts # do nothing
17297 ftrapcc_sneq_yes:
17299 beq.w ftrapcc_trap # no; go take trap
17302 bne.w ftrapcc_bsun # yes
17303 bra.w ftrapcc_trap # no; go take trap
17305 #########################################################################
17306 # #
17307 # IEEE Aware tests #
17308 # #
17309 # For the IEEE aware tests, we only have to set the result based on the #
17310 # floating point condition codes. The BSUN exception will not be #
17311 # set for any of these tests. #
17312 # #
17313 #########################################################################
17315 #
17316 # ordered greater than:
17317 # _______
17318 # NANvZvN
17319 #
17320 ftrapcc_ogt:
17321 fbogt.w ftrapcc_trap # ordered greater than?
17322 ftrapcc_ogt_no:
17323 rts # do nothing
17325 #
17326 # unordered or less or equal:
17327 # _______
17328 # NANvZvN
17329 #
17330 ftrapcc_ule:
17331 fbule.w ftrapcc_trap # unordered or less or equal?
17332 ftrapcc_ule_no:
17333 rts # do nothing
17335 #
17336 # ordered greater than or equal:
17337 # _____
17338 # Zv(NANvN)
17339 #
17340 ftrapcc_oge:
17341 fboge.w ftrapcc_trap # ordered greater than or equal?
17342 ftrapcc_oge_no:
17343 rts # do nothing
17345 #
17346 # unordered or less than:
17347 # _
17348 # NANv(N^Z)
17349 #
17350 ftrapcc_ult:
17351 fbult.w ftrapcc_trap # unordered or less than?
17352 ftrapcc_ult_no:
17353 rts # do nothing
17355 #
17356 # ordered less than:
17357 # _____
17358 # N^(NANvZ)
17359 #
17360 ftrapcc_olt:
17361 fbolt.w ftrapcc_trap # ordered less than?
17362 ftrapcc_olt_no:
17363 rts # do nothing
17365 #
17366 # unordered or greater or equal:
17367 #
17368 # NANvZvN
17369 #
17370 ftrapcc_uge:
17371 fbuge.w ftrapcc_trap # unordered or greater than?
17372 ftrapcc_uge_no:
17373 rts # do nothing
17375 #
17376 # ordered less than or equal:
17377 # ___
17378 # Zv(N^NAN)
17379 #
17380 ftrapcc_ole:
17381 fbole.w ftrapcc_trap # ordered greater or less than?
17382 ftrapcc_ole_no:
17383 rts # do nothing
17385 #
17386 # unordered or greater than:
17387 # ___
17388 # NANv(NvZ)
17389 #
17390 ftrapcc_ugt:
17391 fbugt.w ftrapcc_trap # unordered or greater than?
17392 ftrapcc_ugt_no:
17393 rts # do nothing
17395 #
17396 # ordered greater or less than:
17397 # _____
17398 # NANvZ
17399 #
17400 ftrapcc_ogl:
17401 fbogl.w ftrapcc_trap # ordered greater or less than?
17402 ftrapcc_ogl_no:
17403 rts # do nothing
17405 #
17406 # unordered or equal:
17407 #
17408 # NANvZ
17409 #
17410 ftrapcc_ueq:
17411 fbueq.w ftrapcc_trap # unordered or equal?
17412 ftrapcc_ueq_no:
17413 rts # do nothing
17415 #
17416 # ordered:
17417 # ___
17418 # NAN
17419 #
17420 ftrapcc_or:
17421 fbor.w ftrapcc_trap # ordered?
17422 ftrapcc_or_no:
17423 rts # do nothing
17425 #
17426 # unordered:
17427 #
17428 # NAN
17429 #
17430 ftrapcc_un:
17431 fbun.w ftrapcc_trap # unordered?
17432 ftrapcc_un_no:
17433 rts # do nothing
17435 #######################################################################
17437 # the bsun exception bit was not set.
17438 # we will need to jump to the ftrapcc vector. the stack frame
17439 # is the same size as that of the fp unimp instruction. the
17440 # only difference is that the <ea> field should hold the PC
17441 # of the ftrapcc instruction and the vector offset field
17442 # should denote the ftrapcc trap.
17443 ftrapcc_trap:
17445 rts
17447 # the emulation routine set bsun and BSUN was enabled. have to
17448 # fix stack and jump to the bsun handler.
17449 # let the caller of this routine shift the stack frame up to
17450 # eliminate the effective address field.
17451 ftrapcc_bsun:
17453 rts
17455 #########################################################################
17456 # fscc(): routine to emulate the fscc instruction #
17457 # #
17458 # XDEF **************************************************************** #
17459 # _fscc() #
17460 # #
17461 # XREF **************************************************************** #
17462 # store_dreg_b() - store result to data register file #
17463 # dec_areg() - decrement an areg for -(an) mode #
17464 # inc_areg() - increment an areg for (an)+ mode #
17465 # _dmem_write_byte() - store result to memory #
17466 # #
17467 # INPUT *************************************************************** #
17468 # none #
17469 # #
17470 # OUTPUT ************************************************************** #
17471 # none #
17472 # #
17473 # ALGORITHM *********************************************************** #
17474 # This routine checks which conditional predicate is specified by #
17475 # the stacked fscc instruction opcode and then branches to a routine #
17476 # for that predicate. The corresponding fbcc instruction is then used #
17477 # to see whether the condition (specified by the stacked FPSR) is true #
17478 # or false. #
17479 # If a BSUN exception should be indicated, the BSUN and ABSUN #
17480 # bits are set in the stacked FPSR. If the BSUN exception is enabled, #
17481 # the fbsun_flg is set in the SPCOND_FLG location on the stack. If an #
17482 # enabled BSUN should not be flagged and the predicate is true, then #
17483 # the result is stored to the data register file or memory #
17484 # #
17485 #########################################################################
17487 global _fscc
17488 _fscc:
17499 tbl_fscc:
17533 #########################################################################
17534 # #
17535 # IEEE Nonaware tests #
17536 # #
17537 # For the IEEE nonaware tests, we set the result based on the #
17538 # floating point condition codes. In addition, we check to see #
17539 # if the NAN bit is set, in which case BSUN and AIOP will be set. #
17540 # #
17541 # The cases EQ and NE are shared by the Aware and Nonaware groups #
17542 # and are incapable of setting the BSUN exception bit. #
17543 # #
17544 # Typically, only one of the two possible branch directions could #
17545 # have the NAN bit set. #
17546 # #
17547 #########################################################################
17549 #
17550 # equal:
17551 #
17552 # Z
17553 #
17554 fscc_eq:
17555 fbeq.w fscc_eq_yes # equal?
17556 fscc_eq_no:
17558 bra.w fscc_done # go finish
17559 fscc_eq_yes:
17561 bra.w fscc_done # go finish
17563 #
17564 # not equal:
17565 # _
17566 # Z
17567 #
17568 fscc_neq:
17569 fbneq.w fscc_neq_yes # not equal?
17570 fscc_neq_no:
17572 bra.w fscc_done # go finish
17573 fscc_neq_yes:
17575 bra.w fscc_done # go finish
17577 #
17578 # greater than:
17579 # _______
17580 # NANvZvN
17581 #
17582 fscc_gt:
17583 fbgt.w fscc_gt_yes # greater than?
17584 fscc_gt_no:
17587 beq.w fscc_done # no;go finish
17589 bra.w fscc_chk_bsun # go finish
17590 fscc_gt_yes:
17592 bra.w fscc_done # go finish
17594 #
17595 # not greater than:
17596 #
17597 # NANvZvN
17598 #
17599 fscc_ngt:
17600 fbngt.w fscc_ngt_yes # not greater than?
17601 fscc_ngt_no:
17603 bra.w fscc_done # go finish
17604 fscc_ngt_yes:
17607 beq.w fscc_done # no;go finish
17609 bra.w fscc_chk_bsun # go finish
17611 #
17612 # greater than or equal:
17613 # _____
17614 # Zv(NANvN)
17615 #
17616 fscc_ge:
17617 fbge.w fscc_ge_yes # greater than or equal?
17618 fscc_ge_no:
17621 beq.w fscc_done # no;go finish
17623 bra.w fscc_chk_bsun # go finish
17624 fscc_ge_yes:
17627 beq.w fscc_done # no;go finish
17629 bra.w fscc_chk_bsun # go finish
17631 #
17632 # not (greater than or equal):
17633 # _
17634 # NANv(N^Z)
17635 #
17636 fscc_nge:
17637 fbnge.w fscc_nge_yes # not (greater than or equal)?
17638 fscc_nge_no:
17640 bra.w fscc_done # go finish
17641 fscc_nge_yes:
17644 beq.w fscc_done # no;go finish
17646 bra.w fscc_chk_bsun # go finish
17648 #
17649 # less than:
17650 # _____
17651 # N^(NANvZ)
17652 #
17653 fscc_lt:
17654 fblt.w fscc_lt_yes # less than?
17655 fscc_lt_no:
17658 beq.w fscc_done # no;go finish
17660 bra.w fscc_chk_bsun # go finish
17661 fscc_lt_yes:
17663 bra.w fscc_done # go finish
17665 #
17666 # not less than:
17667 # _
17668 # NANv(ZvN)
17669 #
17670 fscc_nlt:
17671 fbnlt.w fscc_nlt_yes # not less than?
17672 fscc_nlt_no:
17674 bra.w fscc_done # go finish
17675 fscc_nlt_yes:
17678 beq.w fscc_done # no;go finish
17680 bra.w fscc_chk_bsun # go finish
17682 #
17683 # less than or equal:
17684 # ___
17685 # Zv(N^NAN)
17686 #
17687 fscc_le:
17688 fble.w fscc_le_yes # less than or equal?
17689 fscc_le_no:
17692 beq.w fscc_done # no;go finish
17694 bra.w fscc_chk_bsun # go finish
17695 fscc_le_yes:
17698 beq.w fscc_done # no;go finish
17700 bra.w fscc_chk_bsun # go finish
17702 #
17703 # not (less than or equal):
17704 # ___
17705 # NANv(NvZ)
17706 #
17707 fscc_nle:
17708 fbnle.w fscc_nle_yes # not (less than or equal)?
17709 fscc_nle_no:
17711 bra.w fscc_done # go finish
17712 fscc_nle_yes:
17715 beq.w fscc_done # no;go finish
17717 bra.w fscc_chk_bsun # go finish
17719 #
17720 # greater or less than:
17721 # _____
17722 # NANvZ
17723 #
17724 fscc_gl:
17725 fbgl.w fscc_gl_yes # greater or less than?
17726 fscc_gl_no:
17729 beq.w fscc_done # no;go finish
17731 bra.w fscc_chk_bsun # go finish
17732 fscc_gl_yes:
17734 bra.w fscc_done # go finish
17736 #
17737 # not (greater or less than):
17738 #
17739 # NANvZ
17740 #
17741 fscc_ngl:
17742 fbngl.w fscc_ngl_yes # not (greater or less than)?
17743 fscc_ngl_no:
17745 bra.w fscc_done # go finish
17746 fscc_ngl_yes:
17749 beq.w fscc_done # no;go finish
17751 bra.w fscc_chk_bsun # go finish
17753 #
17754 # greater, less, or equal:
17755 # ___
17756 # NAN
17757 #
17758 fscc_gle:
17759 fbgle.w fscc_gle_yes # greater, less, or equal?
17760 fscc_gle_no:
17763 bra.w fscc_chk_bsun # go finish
17764 fscc_gle_yes:
17766 bra.w fscc_done # go finish
17768 #
17769 # not (greater, less, or equal):
17770 #
17771 # NAN
17772 #
17773 fscc_ngle:
17774 fbngle.w fscc_ngle_yes # not (greater, less, or equal)?
17775 fscc_ngle_no:
17777 bra.w fscc_done # go finish
17778 fscc_ngle_yes:
17781 bra.w fscc_chk_bsun # go finish
17783 #########################################################################
17784 # #
17785 # Miscellaneous tests #
17786 # #
17787 # For the IEEE aware tests, we only have to set the result based on the #
17788 # floating point condition codes. The BSUN exception will not be #
17789 # set for any of these tests. #
17790 # #
17791 #########################################################################
17793 #
17794 # false:
17795 #
17796 # False
17797 #
17798 fscc_f:
17800 bra.w fscc_done # go finish
17802 #
17803 # true:
17804 #
17805 # True
17806 #
17807 fscc_t:
17809 bra.w fscc_done # go finish
17811 #
17812 # signalling false:
17813 #
17814 # False
17815 #
17816 fscc_sf:
17819 beq.w fscc_done # no;go finish
17821 bra.w fscc_chk_bsun # go finish
17823 #
17824 # signalling true:
17825 #
17826 # True
17827 #
17828 fscc_st:
17831 beq.w fscc_done # no;go finish
17833 bra.w fscc_chk_bsun # go finish
17835 #
17836 # signalling equal:
17837 #
17838 # Z
17839 #
17840 fscc_seq:
17841 fbseq.w fscc_seq_yes # signalling equal?
17842 fscc_seq_no:
17845 beq.w fscc_done # no;go finish
17847 bra.w fscc_chk_bsun # go finish
17848 fscc_seq_yes:
17851 beq.w fscc_done # no;go finish
17853 bra.w fscc_chk_bsun # go finish
17855 #
17856 # signalling not equal:
17857 # _
17858 # Z
17859 #
17860 fscc_sneq:
17861 fbsneq.w fscc_sneq_yes # signalling equal?
17862 fscc_sneq_no:
17865 beq.w fscc_done # no;go finish
17867 bra.w fscc_chk_bsun # go finish
17868 fscc_sneq_yes:
17871 beq.w fscc_done # no;go finish
17873 bra.w fscc_chk_bsun # go finish
17875 #########################################################################
17876 # #
17877 # IEEE Aware tests #
17878 # #
17879 # For the IEEE aware tests, we only have to set the result based on the #
17880 # floating point condition codes. The BSUN exception will not be #
17881 # set for any of these tests. #
17882 # #
17883 #########################################################################
17885 #
17886 # ordered greater than:
17887 # _______
17888 # NANvZvN
17889 #
17890 fscc_ogt:
17891 fbogt.w fscc_ogt_yes # ordered greater than?
17892 fscc_ogt_no:
17894 bra.w fscc_done # go finish
17895 fscc_ogt_yes:
17897 bra.w fscc_done # go finish
17899 #
17900 # unordered or less or equal:
17901 # _______
17902 # NANvZvN
17903 #
17904 fscc_ule:
17905 fbule.w fscc_ule_yes # unordered or less or equal?
17906 fscc_ule_no:
17908 bra.w fscc_done # go finish
17909 fscc_ule_yes:
17911 bra.w fscc_done # go finish
17913 #
17914 # ordered greater than or equal:
17915 # _____
17916 # Zv(NANvN)
17917 #
17918 fscc_oge:
17919 fboge.w fscc_oge_yes # ordered greater than or equal?
17920 fscc_oge_no:
17922 bra.w fscc_done # go finish
17923 fscc_oge_yes:
17925 bra.w fscc_done # go finish
17927 #
17928 # unordered or less than:
17929 # _
17930 # NANv(N^Z)
17931 #
17932 fscc_ult:
17933 fbult.w fscc_ult_yes # unordered or less than?
17934 fscc_ult_no:
17936 bra.w fscc_done # go finish
17937 fscc_ult_yes:
17939 bra.w fscc_done # go finish
17941 #
17942 # ordered less than:
17943 # _____
17944 # N^(NANvZ)
17945 #
17946 fscc_olt:
17947 fbolt.w fscc_olt_yes # ordered less than?
17948 fscc_olt_no:
17950 bra.w fscc_done # go finish
17951 fscc_olt_yes:
17953 bra.w fscc_done # go finish
17955 #
17956 # unordered or greater or equal:
17957 #
17958 # NANvZvN
17959 #
17960 fscc_uge:
17961 fbuge.w fscc_uge_yes # unordered or greater than?
17962 fscc_uge_no:
17964 bra.w fscc_done # go finish
17965 fscc_uge_yes:
17967 bra.w fscc_done # go finish
17969 #
17970 # ordered less than or equal:
17971 # ___
17972 # Zv(N^NAN)
17973 #
17974 fscc_ole:
17975 fbole.w fscc_ole_yes # ordered greater or less than?
17976 fscc_ole_no:
17978 bra.w fscc_done # go finish
17979 fscc_ole_yes:
17981 bra.w fscc_done # go finish
17983 #
17984 # unordered or greater than:
17985 # ___
17986 # NANv(NvZ)
17987 #
17988 fscc_ugt:
17989 fbugt.w fscc_ugt_yes # unordered or greater than?
17990 fscc_ugt_no:
17992 bra.w fscc_done # go finish
17993 fscc_ugt_yes:
17995 bra.w fscc_done # go finish
17997 #
17998 # ordered greater or less than:
17999 # _____
18000 # NANvZ
18001 #
18002 fscc_ogl:
18003 fbogl.w fscc_ogl_yes # ordered greater or less than?
18004 fscc_ogl_no:
18006 bra.w fscc_done # go finish
18007 fscc_ogl_yes:
18009 bra.w fscc_done # go finish
18011 #
18012 # unordered or equal:
18013 #
18014 # NANvZ
18015 #
18016 fscc_ueq:
18017 fbueq.w fscc_ueq_yes # unordered or equal?
18018 fscc_ueq_no:
18020 bra.w fscc_done # go finish
18021 fscc_ueq_yes:
18023 bra.w fscc_done # go finish
18025 #
18026 # ordered:
18027 # ___
18028 # NAN
18029 #
18030 fscc_or:
18031 fbor.w fscc_or_yes # ordered?
18032 fscc_or_no:
18034 bra.w fscc_done # go finish
18035 fscc_or_yes:
18037 bra.w fscc_done # go finish
18039 #
18040 # unordered:
18041 #
18042 # NAN
18043 #
18044 fscc_un:
18045 fbun.w fscc_un_yes # unordered?
18046 fscc_un_no:
18048 bra.w fscc_done # go finish
18049 fscc_un_yes:
18051 bra.w fscc_done # go finish
18053 #######################################################################
18055 #
18056 # the bsun exception bit was set. now, check to see is BSUN
18057 # is enabled. if so, don't store result and correct stack frame
18058 # for a bsun exception.
18059 #
18060 fscc_chk_bsun:
18062 bne.w fscc_bsun
18064 #
18065 # the bsun exception bit was not set.
18066 # the result has been selected.
18067 # now, check to see if the result is to be stored in the data register
18068 # file or in memory.
18069 #
18070 fscc_done:
18083 rts
18085 #
18086 # the stacked <ea> is correct with the exception of:
18087 # -> Dn : <ea> is garbage
18088 #
18089 # if the addressing mode is post-increment or pre-decrement,
18090 # then the address registers have not been updated.
18091 #
18092 fscc_mem_op:
18103 bne.w fscc_err # yes
18105 rts
18107 # addresing mode is post-increment. write the result byte. if the write
18108 # fails then don't update the address register. if write passes then
18109 # call inc_areg() to update the address register.
18110 fscc_mem_inc:
18116 bne.w fscc_err # yes
18123 rts
18125 # addressing mode is pre-decrement. write the result byte. if the write
18126 # fails then don't update the address register. if the write passes then
18127 # call dec_areg() to update the address register.
18128 fscc_mem_dec:
18134 bne.w fscc_err # yes
18141 rts
18143 # the emulation routine set bsun and BSUN was enabled. have to
18144 # fix stack and jump to the bsun handler.
18145 # let the caller of this routine shift the stack frame up to
18146 # eliminate the effective address field.
18147 fscc_bsun:
18149 rts
18151 # the byte write to memory has failed. pass the failing effective address
18152 # and a FSLW to funimp_dacc().
18153 fscc_err:
18155 bra.l facc_finish
18157 #########################################################################
18158 # XDEF **************************************************************** #
18159 # fmovm_dynamic(): emulate "fmovm" dynamic instruction #
18160 # #
18161 # XREF **************************************************************** #
18162 # fetch_dreg() - fetch data register #
18163 # {i,d,}mem_read() - fetch data from memory #
18164 # _mem_write() - write data to memory #
18165 # iea_iacc() - instruction memory access error occurred #
18166 # iea_dacc() - data memory access error occurred #
18167 # restore() - restore An index regs if access error occurred #
18168 # #
18169 # INPUT *************************************************************** #
18170 # None #
18171 # #
18172 # OUTPUT ************************************************************** #
18173 # If instr is "fmovm Dn,-(A7)" from supervisor mode, #
18174 # d0 = size of dump #
18175 # d1 = Dn #
18176 # Else if instruction access error, #
18177 # d0 = FSLW #
18178 # Else if data access error, #
18179 # d0 = FSLW #
18180 # a0 = address of fault #
18181 # Else #
18182 # none. #
18183 # #
18184 # ALGORITHM *********************************************************** #
18185 # The effective address must be calculated since this is entered #
18186 # from an "Unimplemented Effective Address" exception handler. So, we #
18187 # have our own fcalc_ea() routine here. If an access error is flagged #
18188 # by a _{i,d,}mem_read() call, we must exit through the special #
18189 # handler. #
18190 # The data register is determined and its value loaded to get the #
18191 # string of FP registers affected. This value is used as an index into #
18192 # a lookup table such that we can determine the number of bytes #
18193 # involved. #
18194 # If the instruction is "fmovm.x <ea>,Dn", a _mem_read() is used #
18195 # to read in all FP values. Again, _mem_read() may fail and require a #
18196 # special exit. #
18197 # If the instruction is "fmovm.x DN,<ea>", a _mem_write() is used #
18198 # to write all FP values. _mem_write() may also fail. #
18199 # If the instruction is "fmovm.x DN,-(a7)" from supervisor mode, #
18200 # then we return the size of the dump and the string to the caller #
18201 # so that the move can occur outside of this routine. This special #
18202 # case is required so that moves to the system stack are handled #
18203 # correctly. #
18204 # #
18205 # DYNAMIC: #
18206 # fmovm.x dn, <ea> #
18207 # fmovm.x <ea>, dn #
18208 # #
18209 # <WORD 1> <WORD2> #
18210 # 1111 0010 00 |<ea>| 11@& 1000 0$$$ 0000 #
18211 # #
18212 # & = (0): predecrement addressing mode #
18213 # (1): postincrement or control addressing mode #
18214 # @ = (0): move listed regs from memory to the FPU #
18215 # (1): move listed regs from the FPU to memory #
18216 # $$$ : index of data register holding reg select mask #
18217 # #
18218 # NOTES: #
18219 # If the data register holds a zero, then the #
18220 # instruction is a nop. #
18221 # #
18222 #########################################################################
18224 global fmovm_dynamic
18225 fmovm_dynamic:
18227 # extract the data register in which the bit string resides...
18232 # fetch the bit string into d0...
18244 # if the bit string is a zero, then the operation is a no-op
18245 # but, make sure that we've calculated ea and advanced the opword pointer
18246 beq.w fmovm_data_done
18248 # separate move ins from move outs...
18250 beq.w fmovm_data_in # it's a move out
18252 #############
18253 # MOVE OUT: #
18254 #############
18255 fmovm_data_out:
18257 bne.w fmovm_out_ctrl # control
18259 ############################
18260 fmovm_out_predec:
18261 # for predecrement mode, the bit string is the opposite of both control
18262 # operations and postincrement mode. (bit7 = FP7 ... bit0 = FP0)
18263 # here, we convert it to be just like the others...
18269 fmovm_out_predec_s:
18271 bne.b fmovm_out_ctrl
18273 # the operation was unfortunately an: fmovm.x dn,-(sp)
18274 # called from supervisor mode.
18275 # we're also passing "size" and "strg" back to the calling routine
18276 rts
18278 ############################
18279 fmovm_out_ctrl:
18292 fmovm_out_ctrl_fp1:
18300 fmovm_out_ctrl_fp2:
18307 fmovm_out_ctrl_fp3:
18314 fmovm_out_ctrl_fp4:
18321 fmovm_out_ctrl_fp5:
18328 fmovm_out_ctrl_fp6:
18335 fmovm_out_ctrl_fp7:
18342 fmovm_out_ctrl_done:
18353 bne.w fmovm_out_err # yes
18355 rts
18357 ############
18358 # MOVE IN: #
18359 ############
18360 fmovm_data_in:
18374 bne.w fmovm_in_err # yes
18387 fmovm_data_in_fp1:
18395 fmovm_data_in_fp2:
18401 fmovm_data_in_fp3:
18407 fmovm_data_in_fp4:
18413 fmovm_data_in_fp5:
18419 fmovm_data_in_fp6:
18425 fmovm_data_in_fp7:
18431 fmovm_data_in_done:
18433 rts
18435 #####################################
18437 fmovm_data_done:
18438 rts
18440 ##############################################################################
18442 #
18443 # table indexed by the operation's bit string that gives the number
18444 # of bytes that will be moved.
18445 #
18446 # number of bytes = (# of 1's in bit string) * 12(bytes/fpreg)
18447 #
18448 tbl_fmovm_size:
18482 #
18483 # table to convert a pre-decrement bit string into a post-increment
18484 # or control bit string.
18485 # ex: 0x00 ==> 0x00
18486 # 0x01 ==> 0x80
18487 # 0x02 ==> 0x40
18488 # .
18489 # .
18490 # 0xfd ==> 0xbf
18491 # 0xfe ==> 0x7f
18492 # 0xff ==> 0xff
18493 #
18494 tbl_fmovm_convert:
18528 global fmovm_calc_ea
18529 ###############################################
18530 # _fmovm_calc_ea: calculate effective address #
18531 ###############################################
18532 fmovm_calc_ea:
18535 # currently, MODE and REG are taken from the EXC_OPWORD. this could be
18536 # easily changed if they were inputs passed in registers.
18543 # jump to the corresponding function for each {MODE,REG} pair.
18548 tbl_fea_mode:
18549 short tbl_fea_mode - tbl_fea_mode
18550 short tbl_fea_mode - tbl_fea_mode
18551 short tbl_fea_mode - tbl_fea_mode
18552 short tbl_fea_mode - tbl_fea_mode
18553 short tbl_fea_mode - tbl_fea_mode
18554 short tbl_fea_mode - tbl_fea_mode
18555 short tbl_fea_mode - tbl_fea_mode
18556 short tbl_fea_mode - tbl_fea_mode
18558 short tbl_fea_mode - tbl_fea_mode
18559 short tbl_fea_mode - tbl_fea_mode
18560 short tbl_fea_mode - tbl_fea_mode
18561 short tbl_fea_mode - tbl_fea_mode
18562 short tbl_fea_mode - tbl_fea_mode
18563 short tbl_fea_mode - tbl_fea_mode
18564 short tbl_fea_mode - tbl_fea_mode
18565 short tbl_fea_mode - tbl_fea_mode
18567 short faddr_ind_a0 - tbl_fea_mode
18568 short faddr_ind_a1 - tbl_fea_mode
18569 short faddr_ind_a2 - tbl_fea_mode
18570 short faddr_ind_a3 - tbl_fea_mode
18571 short faddr_ind_a4 - tbl_fea_mode
18572 short faddr_ind_a5 - tbl_fea_mode
18573 short faddr_ind_a6 - tbl_fea_mode
18574 short faddr_ind_a7 - tbl_fea_mode
18576 short faddr_ind_p_a0 - tbl_fea_mode
18577 short faddr_ind_p_a1 - tbl_fea_mode
18578 short faddr_ind_p_a2 - tbl_fea_mode
18579 short faddr_ind_p_a3 - tbl_fea_mode
18580 short faddr_ind_p_a4 - tbl_fea_mode
18581 short faddr_ind_p_a5 - tbl_fea_mode
18582 short faddr_ind_p_a6 - tbl_fea_mode
18583 short faddr_ind_p_a7 - tbl_fea_mode
18585 short faddr_ind_m_a0 - tbl_fea_mode
18586 short faddr_ind_m_a1 - tbl_fea_mode
18587 short faddr_ind_m_a2 - tbl_fea_mode
18588 short faddr_ind_m_a3 - tbl_fea_mode
18589 short faddr_ind_m_a4 - tbl_fea_mode
18590 short faddr_ind_m_a5 - tbl_fea_mode
18591 short faddr_ind_m_a6 - tbl_fea_mode
18592 short faddr_ind_m_a7 - tbl_fea_mode
18594 short faddr_ind_disp_a0 - tbl_fea_mode
18595 short faddr_ind_disp_a1 - tbl_fea_mode
18596 short faddr_ind_disp_a2 - tbl_fea_mode
18597 short faddr_ind_disp_a3 - tbl_fea_mode
18598 short faddr_ind_disp_a4 - tbl_fea_mode
18599 short faddr_ind_disp_a5 - tbl_fea_mode
18600 short faddr_ind_disp_a6 - tbl_fea_mode
18601 short faddr_ind_disp_a7 - tbl_fea_mode
18603 short faddr_ind_ext - tbl_fea_mode
18604 short faddr_ind_ext - tbl_fea_mode
18605 short faddr_ind_ext - tbl_fea_mode
18606 short faddr_ind_ext - tbl_fea_mode
18607 short faddr_ind_ext - tbl_fea_mode
18608 short faddr_ind_ext - tbl_fea_mode
18609 short faddr_ind_ext - tbl_fea_mode
18610 short faddr_ind_ext - tbl_fea_mode
18612 short fabs_short - tbl_fea_mode
18613 short fabs_long - tbl_fea_mode
18614 short fpc_ind - tbl_fea_mode
18615 short fpc_ind_ext - tbl_fea_mode
18616 short tbl_fea_mode - tbl_fea_mode
18617 short tbl_fea_mode - tbl_fea_mode
18618 short tbl_fea_mode - tbl_fea_mode
18619 short tbl_fea_mode - tbl_fea_mode
18621 ###################################
18622 # Address register indirect: (An) #
18623 ###################################
18624 faddr_ind_a0:
18626 rts
18628 faddr_ind_a1:
18630 rts
18632 faddr_ind_a2:
18634 rts
18636 faddr_ind_a3:
18638 rts
18640 faddr_ind_a4:
18642 rts
18644 faddr_ind_a5:
18646 rts
18648 faddr_ind_a6:
18650 rts
18652 faddr_ind_a7:
18654 rts
18656 #####################################################
18657 # Address register indirect w/ postincrement: (An)+ #
18658 #####################################################
18659 faddr_ind_p_a0:
18665 rts
18667 faddr_ind_p_a1:
18673 rts
18675 faddr_ind_p_a2:
18681 rts
18683 faddr_ind_p_a3:
18689 rts
18691 faddr_ind_p_a4:
18697 rts
18699 faddr_ind_p_a5:
18705 rts
18707 faddr_ind_p_a6:
18713 rts
18715 faddr_ind_p_a7:
18723 rts
18725 ####################################################
18726 # Address register indirect w/ predecrement: -(An) #
18727 ####################################################
18728 faddr_ind_m_a0:
18733 rts
18735 faddr_ind_m_a1:
18740 rts
18742 faddr_ind_m_a2:
18747 rts
18749 faddr_ind_m_a3:
18754 rts
18756 faddr_ind_m_a4:
18761 rts
18763 faddr_ind_m_a5:
18768 rts
18770 faddr_ind_m_a6:
18775 rts
18777 faddr_ind_m_a7:
18784 rts
18786 ########################################################
18787 # Address register indirect w/ displacement: (d16, An) #
18788 ########################################################
18789 faddr_ind_disp_a0:
18792 bsr.l _imem_read_word
18800 rts
18802 faddr_ind_disp_a1:
18805 bsr.l _imem_read_word
18813 rts
18815 faddr_ind_disp_a2:
18818 bsr.l _imem_read_word
18826 rts
18828 faddr_ind_disp_a3:
18831 bsr.l _imem_read_word
18839 rts
18841 faddr_ind_disp_a4:
18844 bsr.l _imem_read_word
18852 rts
18854 faddr_ind_disp_a5:
18857 bsr.l _imem_read_word
18865 rts
18867 faddr_ind_disp_a6:
18870 bsr.l _imem_read_word
18878 rts
18880 faddr_ind_disp_a7:
18883 bsr.l _imem_read_word
18891 rts
18893 ########################################################################
18894 # Address register indirect w/ index(8-bit displacement): (d8, An, Xn) #
18895 # " " " w/ " (base displacement): (bd, An, Xn) #
18896 # Memory indirect postindexed: ([bd, An], Xn, od) #
18897 # Memory indirect preindexed: ([bd, An, Xn], od) #
18898 ########################################################################
18899 faddr_ind_ext:
18914 bne.w fcalc_mem_ind
18922 # count on fetch_dreg() not to alter a0...
18929 bne.b faii8_long
18931 faii8_long:
18943 rts
18945 ###########################
18946 # Absolute short: (XXX).W #
18947 ###########################
18948 fabs_short:
18957 rts
18959 ##########################
18960 # Absolute long: (XXX).L #
18961 ##########################
18962 fabs_long:
18971 rts
18973 #######################################################
18974 # Program counter indirect w/ displacement: (d16, PC) #
18975 #######################################################
18976 fpc_ind:
18988 # _imem_read_word() increased the extwptr by 2. need to adjust here.
18990 rts
18992 ##########################################################
18993 # PC indirect w/ index(8-bit displacement): (d8, PC, An) #
18994 # " " w/ " (base displacement): (bd, PC, An) #
18995 # PC memory indirect postindexed: ([bd, PC], Xn, od) #
18996 # PC memory indirect preindexed: ([bd, PC, Xn], od) #
18997 ##########################################################
18998 fpc_ind_ext:
19010 bne.w fcalc_mem_ind # calc memory indirect
19018 # count on fetch_dreg() not to alter a0...
19027 fpii8_long:
19039 rts
19041 # d2 = index
19042 # d3 = base
19043 # d4 = od
19044 # d5 = extword
19045 fcalc_mem_ind:
19047 beq.b fcalc_index
19055 bra.b fbase_supp_ck
19057 # index:
19058 fcalc_index:
19061 bsr.l fetch_dreg
19069 bne.b fno_ext
19072 fno_ext:
19076 # base address (passed as parameter in d3):
19077 # we clear the value here if it should actually be suppressed.
19078 fbase_supp_ck:
19080 beq.b fno_base_sup
19083 # base displacement:
19084 fno_base_sup:
19086 # beq.l fmovm_error # if (size == 0) it's reserved
19089 blt.b fno_bd
19090 beq.b fget_word_bd
19094 bsr.l _imem_read_long
19099 bra.b fchk_ind
19101 fget_word_bd:
19104 bsr.l _imem_read_word
19111 fchk_ind:
19114 # outer displacement:
19115 fno_bd:
19117 beq.w faii_bd
19120 blt.b fnull_od
19121 beq.b fword_od
19125 bsr.l _imem_read_long
19130 bra.b fadd_them
19132 fword_od:
19135 bsr.l _imem_read_word
19141 bra.b fadd_them
19143 fnull_od:
19146 fadd_them:
19150 beq.b fpre_indexed
19153 bsr.l _dmem_read_long
19156 bne.w fcea_err # yes
19160 bra.b fdone_ea
19162 fpre_indexed:
19165 bsr.l _dmem_read_long
19168 bne.w fcea_err # yes
19171 bra.b fdone_ea
19173 faii_bd:
19176 fdone_ea:
19180 rts
19182 #########################################################
19183 fcea_err:
19188 bra.l iea_dacc
19190 fcea_iacc:
19192 bra.l iea_iacc
19194 fmovm_out_err:
19195 bsr.l restore
19197 bra.b fmovm_err
19199 fmovm_in_err:
19200 bsr.l restore
19203 fmovm_err:
19205 bra.l iea_dacc
19207 #########################################################################
19208 # XDEF **************************************************************** #
19209 # fmovm_ctrl(): emulate fmovm.l of control registers instr #
19210 # #
19211 # XREF **************************************************************** #
19212 # _imem_read_long() - read longword from memory #
19213 # iea_iacc() - _imem_read_long() failed; error recovery #
19214 # #
19215 # INPUT *************************************************************** #
19216 # None #
19217 # #
19218 # OUTPUT ************************************************************** #
19219 # If _imem_read_long() doesn't fail: #
19220 # USER_FPCR(a6) = new FPCR value #
19221 # USER_FPSR(a6) = new FPSR value #
19222 # USER_FPIAR(a6) = new FPIAR value #
19223 # #
19224 # ALGORITHM *********************************************************** #
19225 # Decode the instruction type by looking at the extension word #
19226 # in order to see how many control registers to fetch from memory. #
19227 # Fetch them using _imem_read_long(). If this fetch fails, exit through #
19228 # the special access error exit handler iea_iacc(). #
19229 # #
19230 # Instruction word decoding: #
19231 # #
19232 # fmovem.l #<data>, {FPIAR&|FPCR&|FPSR} #
19233 # #
19234 # WORD1 WORD2 #
19235 # 1111 0010 00 111100 100$ $$00 0000 0000 #
19236 # #
19237 # $$$ (100): FPCR #
19238 # (010): FPSR #
19239 # (001): FPIAR #
19240 # (000): FPIAR #
19241 # #
19242 #########################################################################
19244 global fmovm_ctrl
19245 fmovm_ctrl:
19248 beq.w fctrl_in_7 # yes
19250 beq.w fctrl_in_6 # yes
19254 # fmovem.l #<data>, fpsr/fpiar
19255 fctrl_in_3:
19272 rts
19274 # fmovem.l #<data>, fpcr/fpiar
19275 fctrl_in_5:
19292 rts
19294 # fmovem.l #<data>, fpcr/fpsr
19295 fctrl_in_6:
19312 rts
19314 # fmovem.l #<data>, fpcr/fpsr/fpiar
19315 fctrl_in_7:
19340 rts
19342 #########################################################################
19343 # XDEF **************************************************************** #
19344 # _dcalc_ea(): calc correct <ea> from <ea> stacked on exception #
19345 # #
19346 # XREF **************************************************************** #
19347 # inc_areg() - increment an address register #
19348 # dec_areg() - decrement an address register #
19349 # #
19350 # INPUT *************************************************************** #
19351 # d0 = number of bytes to adjust <ea> by #
19352 # #
19353 # OUTPUT ************************************************************** #
19354 # None #
19355 # #
19356 # ALGORITHM *********************************************************** #
19357 # "Dummy" CALCulate Effective Address: #
19358 # The stacked <ea> for FP unimplemented instructions and opclass #
19359 # two packed instructions is correct with the exception of... #
19360 # #
19361 # 1) -(An) : The register is not updated regardless of size. #
19362 # Also, for extended precision and packed, the #
19363 # stacked <ea> value is 8 bytes too big #
19364 # 2) (An)+ : The register is not updated. #
19365 # 3) #<data> : The upper longword of the immediate operand is #
19366 # stacked b,w,l and s sizes are completely stacked. #
19367 # d,x, and p are not. #
19368 # #
19369 #########################################################################
19371 global _dcalc_ea
19372 _dcalc_ea:
19393 rts
19395 # need to set immediate data flag here since we'll need to do
19396 # an imem_read to fetch this later.
19397 dcea_imm:
19400 rts
19402 # here, the <ea> is stacked correctly. however, we must update the
19403 # address register...
19404 dcea_pi:
19409 rts
19411 # the <ea> is stacked correctly for all but extended and packed which
19412 # the <ea>s are 8 bytes too large.
19413 # it would make no sense to have a pre-decrement to a7 in supervisor
19414 # mode so we don't even worry about this tricky case here : )
19415 dcea_pd:
19423 rts
19424 dcea_pd2:
19427 rts
19429 #########################################################################
19430 # XDEF **************************************************************** #
19431 # _calc_ea_fout(): calculate correct stacked <ea> for extended #
19432 # and packed data opclass 3 operations. #
19433 # #
19434 # XREF **************************************************************** #
19435 # None #
19436 # #
19437 # INPUT *************************************************************** #
19438 # None #
19439 # #
19440 # OUTPUT ************************************************************** #
19441 # a0 = return correct effective address #
19442 # #
19443 # ALGORITHM *********************************************************** #
19444 # For opclass 3 extended and packed data operations, the <ea> #
19445 # stacked for the exception is incorrect for -(an) and (an)+ addressing #
19446 # modes. Also, while we're at it, the index register itself must get #
19447 # updated. #
19448 # So, for -(an), we must subtract 8 off of the stacked <ea> value #
19449 # and return that value as the correct <ea> and store that value in An. #
19450 # For (an)+, the stacked <ea> is correct but we must adjust An by +12. #
19451 # #
19452 #########################################################################
19454 # This calc_ea is currently used to retrieve the correct <ea>
19455 # for fmove outs of type extended and packed.
19456 global _calc_ea_fout
19457 _calc_ea_fout:
19468 beq.w ceaf_pd # yes
19471 rts
19473 # (An)+ : extended and packed fmove out
19474 # : stacked <ea> is correct
19475 # : "An" not updated
19476 ceaf_pi:
19482 tbl_ceaf_pi:
19483 short ceaf_pi0 - tbl_ceaf_pi
19484 short ceaf_pi1 - tbl_ceaf_pi
19485 short ceaf_pi2 - tbl_ceaf_pi
19486 short ceaf_pi3 - tbl_ceaf_pi
19487 short ceaf_pi4 - tbl_ceaf_pi
19488 short ceaf_pi5 - tbl_ceaf_pi
19489 short ceaf_pi6 - tbl_ceaf_pi
19490 short ceaf_pi7 - tbl_ceaf_pi
19492 ceaf_pi0:
19494 rts
19495 ceaf_pi1:
19497 rts
19498 ceaf_pi2:
19500 rts
19501 ceaf_pi3:
19503 rts
19504 ceaf_pi4:
19506 rts
19507 ceaf_pi5:
19509 rts
19510 ceaf_pi6:
19512 rts
19513 ceaf_pi7:
19516 rts
19518 # -(An) : extended and packed fmove out
19519 # : stacked <ea> = actual <ea> + 8
19520 # : "An" not updated
19521 ceaf_pd:
19529 tbl_ceaf_pd:
19530 short ceaf_pd0 - tbl_ceaf_pd
19531 short ceaf_pd1 - tbl_ceaf_pd
19532 short ceaf_pd2 - tbl_ceaf_pd
19533 short ceaf_pd3 - tbl_ceaf_pd
19534 short ceaf_pd4 - tbl_ceaf_pd
19535 short ceaf_pd5 - tbl_ceaf_pd
19536 short ceaf_pd6 - tbl_ceaf_pd
19537 short ceaf_pd7 - tbl_ceaf_pd
19539 ceaf_pd0:
19541 rts
19542 ceaf_pd1:
19544 rts
19545 ceaf_pd2:
19547 rts
19548 ceaf_pd3:
19550 rts
19551 ceaf_pd4:
19553 rts
19554 ceaf_pd5:
19556 rts
19557 ceaf_pd6:
19559 rts
19560 ceaf_pd7:
19563 rts
19565 #########################################################################
19566 # XDEF **************************************************************** #
19567 # _load_fop(): load operand for unimplemented FP exception #
19568 # #
19569 # XREF **************************************************************** #
19570 # set_tag_x() - determine ext prec optype tag #
19571 # set_tag_s() - determine sgl prec optype tag #
19572 # set_tag_d() - determine dbl prec optype tag #
19573 # unnorm_fix() - convert normalized number to denorm or zero #
19574 # norm() - normalize a denormalized number #
19575 # get_packed() - fetch a packed operand from memory #
19576 # _dcalc_ea() - calculate <ea>, fixing An in process #
19577 # #
19578 # _imem_read_{word,long}() - read from instruction memory #
19579 # _dmem_read() - read from data memory #
19580 # _dmem_read_{byte,word,long}() - read from data memory #
19581 # #
19582 # facc_in_{b,w,l,d,x}() - mem read failed; special exit point #
19583 # #
19584 # INPUT *************************************************************** #
19585 # None #
19586 # #
19587 # OUTPUT ************************************************************** #
19588 # If memory access doesn't fail: #
19589 # FP_SRC(a6) = source operand in extended precision #
19590 # FP_DST(a6) = destination operand in extended precision #
19591 # #
19592 # ALGORITHM *********************************************************** #
19593 # This is called from the Unimplemented FP exception handler in #
19594 # order to load the source and maybe destination operand into #
19595 # FP_SRC(a6) and FP_DST(a6). If the instruction was opclass zero, load #
19596 # the source and destination from the FP register file. Set the optype #
19597 # tags for both if dyadic, one for monadic. If a number is an UNNORM, #
19598 # convert it to a DENORM or a ZERO. #
19599 # If the instruction is opclass two (memory->reg), then fetch #
19600 # the destination from the register file and the source operand from #
19601 # memory. Tag and fix both as above w/ opclass zero instructions. #
19602 # If the source operand is byte,word,long, or single, it may be #
19603 # in the data register file. If it's actually out in memory, use one of #
19604 # the mem_read() routines to fetch it. If the mem_read() access returns #
19605 # a failing value, exit through the special facc_in() routine which #
19606 # will create an acess error exception frame from the current exception #
19607 # frame. #
19608 # Immediate data and regular data accesses are separated because #
19609 # if an immediate data access fails, the resulting fault status #
19610 # longword stacked for the access error exception must have the #
19611 # instruction bit set. #
19612 # #
19613 #########################################################################
19615 global _load_fop
19616 _load_fop:
19618 # 15 13 12 10 9 7 6 0
19619 # / \ / \ / \ / \
19620 # ---------------------------------
19621 # | opclass | RX | RY | EXTENSION | (2nd word of general FP instruction)
19622 # ---------------------------------
19623 #
19625 # bfextu EXC_CMDREG(%a6){&0:&3}, %d0 # extract opclass
19626 # cmpi.b %d0, &0x2 # which class is it? ('000,'010,'011)
19627 # beq.w op010 # handle <ea> -> fpn
19628 # bgt.w op011 # handle fpn -> <ea>
19630 # we're not using op011 for now...
19632 bne.b op010
19634 ############################
19635 # OPCLASS '000: reg -> reg #
19636 ############################
19637 op000:
19647 op000_dst:
19655 op000_dst_cont:
19658 op000_src:
19666 op000_src_cont:
19668 rts
19670 op000_dst_unnorm:
19672 bra.b op000_dst_cont
19673 op000_src_unnorm:
19675 bra.b op000_src_cont
19677 #############################
19678 # OPCLASS '010: <ea> -> reg #
19679 #############################
19680 op010:
19690 op010_dst:
19698 op010_dst_cont:
19701 op010_src:
19705 bne.w fetch_from_mem # src op is in memory
19707 op010_dreg:
19714 op010_dst_unnorm:
19716 bra.b op010_dst_cont
19719 tbl_op010_dreg:
19720 short opd_long - tbl_op010_dreg
19721 short opd_sgl - tbl_op010_dreg
19722 short tbl_op010_dreg - tbl_op010_dreg
19723 short tbl_op010_dreg - tbl_op010_dreg
19724 short opd_word - tbl_op010_dreg
19725 short tbl_op010_dreg - tbl_op010_dreg
19726 short opd_byte - tbl_op010_dreg
19727 short tbl_op010_dreg - tbl_op010_dreg
19729 #
19730 # LONG: can be either NORM or ZERO...
19731 #
19732 opd_long:
19736 fbeq.w opd_long_zero # long is a ZERO
19737 rts
19738 opd_long_zero:
19740 rts
19742 #
19743 # WORD: can be either NORM or ZERO...
19744 #
19745 opd_word:
19749 fbeq.w opd_word_zero # WORD is a ZERO
19750 rts
19751 opd_word_zero:
19753 rts
19755 #
19756 # BYTE: can be either NORM or ZERO...
19757 #
19758 opd_byte:
19762 fbeq.w opd_byte_zero # byte is a ZERO
19763 rts
19764 opd_byte_zero:
19766 rts
19768 #
19769 # SGL: can be either NORM, DENORM, ZERO, INF, QNAN or SNAN but not UNNORM
19770 #
19771 # separate SNANs and DENORMs so they can be loaded w/ special care.
19772 # all others can simply be moved "in" using fmove.
19773 #
19774 opd_sgl:
19783 beq.w get_sgl_snan # yes
19786 beq.w get_sgl_denorm # yes
19790 rts
19792 ##############################################################################
19794 #########################################################################
19795 # fetch_from_mem(): #
19796 # - src is out in memory. must: #
19797 # (1) calc ea - must read AFTER you know the src type since #
19798 # if the ea is -() or ()+, need to know # of bytes. #
19799 # (2) read it in from either user or supervisor space #
19800 # (3) if (b || w || l) then simply read in #
19801 # if (s || d || x) then check for SNAN,UNNORM,DENORM #
19802 # if (packed) then punt for now #
19803 # INPUT: #
19804 # %d0 : src type field #
19805 #########################################################################
19806 fetch_from_mem:
19813 tbl_fp_type:
19814 short load_long - tbl_fp_type
19815 short load_sgl - tbl_fp_type
19816 short load_ext - tbl_fp_type
19817 short load_packed - tbl_fp_type
19818 short load_word - tbl_fp_type
19819 short load_dbl - tbl_fp_type
19820 short load_byte - tbl_fp_type
19821 short tbl_fp_type - tbl_fp_type
19823 #########################################
19824 # load a LONG into %fp0: #
19825 # -number can't fault #
19826 # (1) calc ea #
19827 # (2) read 4 bytes into L_SCR1 #
19828 # (3) fmov.l into %fp0 #
19829 #########################################
19830 load_long:
19835 beq.b load_long_immed
19842 load_long_cont:
19846 fbeq.w load_long_zero # src op is a ZERO
19847 rts
19848 load_long_zero:
19850 rts
19852 load_long_immed:
19857 bra.b load_long_cont
19859 #########################################
19860 # load a WORD into %fp0: #
19861 # -number can't fault #
19862 # (1) calc ea #
19863 # (2) read 2 bytes into L_SCR1 #
19864 # (3) fmov.w into %fp0 #
19865 #########################################
19866 load_word:
19871 beq.b load_word_immed
19878 load_word_cont:
19882 fbeq.w load_word_zero # src op is a ZERO
19883 rts
19884 load_word_zero:
19886 rts
19888 load_word_immed:
19893 bra.b load_word_cont
19895 #########################################
19896 # load a BYTE into %fp0: #
19897 # -number can't fault #
19898 # (1) calc ea #
19899 # (2) read 1 byte into L_SCR1 #
19900 # (3) fmov.b into %fp0 #
19901 #########################################
19902 load_byte:
19907 beq.b load_byte_immed
19914 load_byte_cont:
19918 fbeq.w load_byte_zero # src op is a ZERO
19919 rts
19920 load_byte_zero:
19922 rts
19924 load_byte_immed:
19929 bra.b load_byte_cont
19931 #########################################
19932 # load a SGL into %fp0: #
19933 # -number can't fault #
19934 # (1) calc ea #
19935 # (2) read 4 bytes into L_SCR1 #
19936 # (3) fmov.s into %fp0 #
19937 #########################################
19938 load_sgl:
19943 beq.b load_sgl_immed
19951 load_sgl_cont:
19957 beq.w get_sgl_denorm # yes
19960 beq.w get_sgl_snan # yes
19964 rts
19966 load_sgl_immed:
19971 bra.b load_sgl_cont
19973 # must convert sgl denorm format to an Xprec denorm fmt suitable for
19974 # normalization...
19975 # %a0 : points to sgl denorm
19976 get_sgl_denorm:
19985 beq.b sgl_dnrm_norm
19988 sgl_dnrm_norm:
19996 rts
19998 # convert sgl to ext SNAN
19999 # %a0 : points to sgl SNAN
20000 get_sgl_snan:
20008 beq.b no_sgl_snan_sgn
20010 no_sgl_snan_sgn:
20011 rts
20013 #########################################
20014 # load a DBL into %fp0: #
20015 # -number can't fault #
20016 # (1) calc ea #
20017 # (2) read 8 bytes into L_SCR(1,2)#
20018 # (3) fmov.d into %fp0 #
20019 #########################################
20020 load_dbl:
20025 beq.b load_dbl_immed
20034 load_dbl_cont:
20040 beq.w get_dbl_denorm # yes
20043 beq.w get_dbl_snan # yes
20047 rts
20049 load_dbl_immed:
20056 bra.b load_dbl_cont
20058 # must convert dbl denorm format to an Xprec denorm fmt suitable for
20059 # normalization...
20060 # %a0 : loc. of dbl denorm
20061 get_dbl_denorm:
20071 beq.b dbl_dnrm_norm
20074 dbl_dnrm_norm:
20082 rts
20084 # convert dbl to ext SNAN
20085 # %a0 : points to dbl SNAN
20086 get_dbl_snan:
20097 beq.b no_dbl_snan_sgn
20099 no_dbl_snan_sgn:
20100 rts
20102 #################################################
20103 # load a Xprec into %fp0: #
20104 # -number can't fault #
20105 # (1) calc ea #
20106 # (2) read 12 bytes into L_SCR(1,2) #
20107 # (3) fmov.x into %fp0 #
20108 #################################################
20109 load_ext:
20127 rts
20129 load_ext_unnorm:
20132 rts
20134 #################################################
20135 # load a packed into %fp0: #
20136 # -number can't fault #
20137 # (1) calc ea #
20138 # (2) read 12 bytes into L_SCR(1,2,3) #
20139 # (3) fmov.x into %fp0 #
20140 #################################################
20141 load_packed:
20142 bsr.l get_packed
20150 rts
20152 load_packed_unnorm:
20155 rts
20157 #########################################################################
20158 # XDEF **************************************************************** #
20159 # fout(): move from fp register to memory or data register #
20160 # #
20161 # XREF **************************************************************** #
20162 # _round() - needed to create EXOP for sgl/dbl precision #
20163 # norm() - needed to create EXOP for extended precision #
20164 # ovf_res() - create default overflow result for sgl/dbl precision#
20165 # unf_res() - create default underflow result for sgl/dbl prec. #
20166 # dst_dbl() - create rounded dbl precision result. #
20167 # dst_sgl() - create rounded sgl precision result. #
20168 # fetch_dreg() - fetch dynamic k-factor reg for packed. #
20169 # bindec() - convert FP binary number to packed number. #
20170 # _mem_write() - write data to memory. #
20171 # _mem_write2() - write data to memory unless supv mode -(a7) exc.#
20172 # _dmem_write_{byte,word,long}() - write data to memory. #
20173 # store_dreg_{b,w,l}() - store data to data register file. #
20174 # facc_out_{b,w,l,d,x}() - data access error occurred. #
20175 # #
20176 # INPUT *************************************************************** #
20177 # a0 = pointer to extended precision source operand #
20178 # d0 = round prec,mode #
20179 # #
20180 # OUTPUT ************************************************************** #
20181 # fp0 : intermediate underflow or overflow result if #
20182 # OVFL/UNFL occurred for a sgl or dbl operand #
20183 # #
20184 # ALGORITHM *********************************************************** #
20185 # This routine is accessed by many handlers that need to do an #
20186 # opclass three move of an operand out to memory. #
20187 # Decode an fmove out (opclass 3) instruction to determine if #
20188 # it's b,w,l,s,d,x, or p in size. b,w,l can be stored to either a data #
20189 # register or memory. The algorithm uses a standard "fmove" to create #
20190 # the rounded result. Also, since exceptions are disabled, this also #
20191 # create the correct OPERR default result if appropriate. #
20192 # For sgl or dbl precision, overflow or underflow can occur. If #
20193 # either occurs and is enabled, the EXOP. #
20194 # For extended precision, the stacked <ea> must be fixed along #
20195 # w/ the address index register as appropriate w/ _calc_ea_fout(). If #
20196 # the source is a denorm and if underflow is enabled, an EXOP must be #
20197 # created. #
20198 # For packed, the k-factor must be fetched from the instruction #
20199 # word or a data register. The <ea> must be fixed as w/ extended #
20200 # precision. Then, bindec() is called to create the appropriate #
20201 # packed result. #
20202 # If at any time an access error is flagged by one of the move- #
20203 # to-memory routines, then a special exit must be made so that the #
20204 # access error can be handled properly. #
20205 # #
20206 #########################################################################
20208 global fout
20209 fout:
20215 tbl_fout:
20216 short fout_long - tbl_fout
20217 short fout_sgl - tbl_fout
20218 short fout_ext - tbl_fout
20219 short fout_pack - tbl_fout
20220 short fout_word - tbl_fout
20221 short fout_dbl - tbl_fout
20222 short fout_byte - tbl_fout
20223 short fout_pack - tbl_fout
20225 #################################################################
20226 # fmove.b out ###################################################
20227 #################################################################
20229 # Only "Unimplemented Data Type" exceptions enter here. The operand
20230 # is either a DENORM or a NORM.
20231 fout_byte:
20237 fout_byte_norm:
20256 rts
20258 fout_byte_dn:
20261 bsr.l store_dreg_b
20262 rts
20264 fout_byte_denorm:
20269 bra.b fout_byte_norm
20271 #################################################################
20272 # fmove.w out ###################################################
20273 #################################################################
20275 # Only "Unimplemented Data Type" exceptions enter here. The operand
20276 # is either a DENORM or a NORM.
20277 fout_word:
20283 fout_word_norm:
20302 rts
20304 fout_word_dn:
20307 bsr.l store_dreg_w
20308 rts
20310 fout_word_denorm:
20315 bra.b fout_word_norm
20317 #################################################################
20318 # fmove.l out ###################################################
20319 #################################################################
20321 # Only "Unimplemented Data Type" exceptions enter here. The operand
20322 # is either a DENORM or a NORM.
20323 fout_long:
20329 fout_long_norm:
20338 fout_long_write:
20349 rts
20351 fout_long_dn:
20354 bsr.l store_dreg_l
20355 rts
20357 fout_long_denorm:
20362 bra.b fout_long_norm
20364 #################################################################
20365 # fmove.x out ###################################################
20366 #################################################################
20368 # Only "Unimplemented Data Type" exceptions enter here. The operand
20369 # is either a DENORM or a NORM.
20370 # The DENORM causes an Underflow exception.
20371 fout_ext:
20373 # we copy the extended precision result to FP_SCR0 so that the reserved
20374 # 16-bit field gets zeroed. we do this since we promise not to disturb
20375 # what's at SRC(a0).
20389 # we must not yet write the extended precision data to the stack
20390 # in the pre-decrement case from supervisor mode or else we'll corrupt
20391 # the stack frame. so, leave it in FP_SRC for now and deal with it later...
20393 beq.b fout_ext_a7
20398 bne.w fout_ext_err # yes
20402 rts
20404 # the number is a DENORM. must set the underflow exception bit
20405 fout_ext_denorm:
20411 rts
20413 # we don't want to do the write if the exception occurred in supervisor mode
20414 # so _mem_write2() handles this for us.
20415 fout_ext_a7:
20419 bne.w fout_ext_err # yes
20423 rts
20425 fout_ext_exc:
20433 rts
20435 fout_ext_err:
20437 bra.l facc_out_x
20439 #########################################################################
20440 # fmove.s out ###########################################################
20441 #########################################################################
20442 fout_sgl:
20447 #
20448 # operand is a normalized number. first, we check to see if the move out
20449 # would cause either an underflow or overflow. these cases are handled
20450 # separately. otherwise, set the FPCR to the proper rounding mode and
20451 # execute the move.
20452 #
20457 bgt.w fout_sgl_ovfl # yes; go handle OVFL
20458 beq.w fout_sgl_may_ovfl # maybe; go handle possible OVFL
20460 blt.w fout_sgl_unfl # yes; go handle underflow
20462 #
20463 # NORMs(in range) can be stored out by a simple "fmov.s"
20464 # Unnormalized inputs can come through this point.
20465 #
20466 fout_sgl_exg:
20479 fout_sgl_exg_write:
20490 rts
20492 fout_sgl_exg_write_dn:
20495 bsr.l store_dreg_l
20496 rts
20498 #
20499 # here, we know that the operand would UNFL if moved out to single prec,
20500 # so, denorm and round and then use generic store single routine to
20501 # write the value to memory.
20502 #
20503 fout_sgl_unfl:
20519 fout_sgl_unfl_cont:
20537 bra.b fout_sgl_unfl_chkexc
20539 fout_sgl_unfl_dn:
20542 bsr.l store_dreg_l
20544 fout_sgl_unfl_chkexc:
20547 bne.w fout_sd_exc_unfl # yes
20549 rts
20551 #
20552 # it's definitely an overflow so call ovf_res to get the correct answer
20553 #
20554 fout_sgl_ovfl:
20556 bne.b fout_sgl_ovfl_inex2
20558 bne.b fout_sgl_ovfl_inex2
20560 bra.b fout_sgl_ovfl_cont
20561 fout_sgl_ovfl_inex2:
20564 fout_sgl_ovfl_cont:
20567 # call ovf_res() w/ sgl prec and the correct rnd mode to create the default
20568 # overflow result. DON'T save the returned ccodes from ovf_res() since
20569 # fmove out doesn't alter them.
20587 bra.b fout_sgl_ovfl_chkexc
20589 fout_sgl_ovfl_dn:
20592 bsr.l store_dreg_l
20594 fout_sgl_ovfl_chkexc:
20597 bne.w fout_sd_exc_ovfl # yes
20599 rts
20601 #
20602 # move out MAY overflow:
20603 # (1) force the exp to 0x3fff
20604 # (2) do a move w/ appropriate rnd mode
20605 # (3) if exp still equals zero, then insert original exponent
20606 # for the correct result.
20607 # if exp now equals one, then it overflowed so call ovf_res.
20608 #
20609 fout_sgl_may_ovfl:
20624 fblt.w fout_sgl_exg # no; go finish NORM
20625 bra.w fout_sgl_ovfl # yes; go handle overflow
20627 ################
20629 fout_sd_exc_unfl:
20640 bsr.l norm
20644 bra.b fout_sd_exc_cont
20646 fout_sd_exc:
20647 fout_sd_exc_ovfl:
20654 fout_sd_exc_cont:
20662 swap %d1
20673 fout_sd_exc_done:
20675 rts
20677 #################################################################
20678 # fmove.d out ###################################################
20679 #################################################################
20680 fout_dbl:
20685 #
20686 # operand is a normalized number. first, we check to see if the move out
20687 # would cause either an underflow or overflow. these cases are handled
20688 # separately. otherwise, set the FPCR to the proper rounding mode and
20689 # execute the move.
20690 #
20695 bgt.w fout_dbl_ovfl # yes; go handle OVFL
20696 beq.w fout_dbl_may_ovfl # maybe; go handle possible OVFL
20698 blt.w fout_dbl_unfl # yes; go handle underflow
20700 #
20701 # NORMs(in range) can be stored out by a simple "fmov.d"
20702 # Unnormalized inputs can come through this point.
20703 #
20704 fout_dbl_exg:
20725 rts # no; so we're finished
20727 #
20728 # here, we know that the operand would UNFL if moved out to double prec,
20729 # so, denorm and round and then use generic store double routine to
20730 # write the value to memory.
20731 #
20732 fout_dbl_unfl:
20748 fout_dbl_unfl_cont:
20768 bne.w fout_sd_exc_unfl # yes
20770 rts
20772 #
20773 # it's definitely an overflow so call ovf_res to get the correct answer
20774 #
20775 fout_dbl_ovfl:
20778 bne.b fout_dbl_ovfl_inex2
20781 bra.b fout_dbl_ovfl_cont
20782 fout_dbl_ovfl_inex2:
20785 fout_dbl_ovfl_cont:
20788 # call ovf_res() w/ dbl prec and the correct rnd mode to create the default
20789 # overflow result. DON'T save the returned ccodes from ovf_res() since
20790 # fmove out doesn't alter them.
20808 bne.w fout_sd_exc_ovfl # yes
20810 rts
20812 #
20813 # move out MAY overflow:
20814 # (1) force the exp to 0x3fff
20815 # (2) do a move w/ appropriate rnd mode
20816 # (3) if exp still equals zero, then insert original exponent
20817 # for the correct result.
20818 # if exp now equals one, then it overflowed so call ovf_res.
20819 #
20820 fout_dbl_may_ovfl:
20835 fblt.w fout_dbl_exg # no; go finish NORM
20836 bra.w fout_dbl_ovfl # yes; go handle overflow
20838 #########################################################################
20839 # XDEF **************************************************************** #
20840 # dst_dbl(): create double precision value from extended prec. #
20841 # #
20842 # XREF **************************************************************** #
20843 # None #
20844 # #
20845 # INPUT *************************************************************** #
20846 # a0 = pointer to source operand in extended precision #
20847 # #
20848 # OUTPUT ************************************************************** #
20849 # d0 = hi(double precision result) #
20850 # d1 = lo(double precision result) #
20851 # #
20852 # ALGORITHM *********************************************************** #
20853 # #
20854 # Changes extended precision to double precision. #
20855 # Note: no attempt is made to round the extended value to double. #
20856 # dbl_sign = ext_sign #
20857 # dbl_exp = ext_exp - $3fff(ext bias) + $7ff(dbl bias) #
20858 # get rid of ext integer bit #
20859 # dbl_mant = ext_mant{62:12} #
20860 # #
20861 # --------------- --------------- --------------- #
20862 # extended -> |s| exp | |1| ms mant | | ls mant | #
20863 # --------------- --------------- --------------- #
20864 # 95 64 63 62 32 31 11 0 #
20865 # | | #
20866 # | | #
20867 # | | #
20868 # v v #
20869 # --------------- --------------- #
20870 # double -> |s|exp| mant | | mant | #
20871 # --------------- --------------- #
20872 # 63 51 32 31 0 #
20873 # #
20874 #########################################################################
20876 dst_dbl:
20884 dst_get_dupper:
20890 dst_get_dman:
20904 rts
20906 #########################################################################
20907 # XDEF **************************************************************** #
20908 # dst_sgl(): create single precision value from extended prec #
20909 # #
20910 # XREF **************************************************************** #
20911 # #
20912 # INPUT *************************************************************** #
20913 # a0 = pointer to source operand in extended precision #
20914 # #
20915 # OUTPUT ************************************************************** #
20916 # d0 = single precision result #
20917 # #
20918 # ALGORITHM *********************************************************** #
20919 # #
20920 # Changes extended precision to single precision. #
20921 # sgl_sign = ext_sign #
20922 # sgl_exp = ext_exp - $3fff(ext bias) + $7f(sgl bias) #
20923 # get rid of ext integer bit #
20924 # sgl_mant = ext_mant{62:12} #
20925 # #
20926 # --------------- --------------- --------------- #
20927 # extended -> |s| exp | |1| ms mant | | ls mant | #
20928 # --------------- --------------- --------------- #
20929 # 95 64 63 62 40 32 31 12 0 #
20930 # | | #
20931 # | | #
20932 # | | #
20933 # v v #
20934 # --------------- #
20935 # single -> |s|exp| mant | #
20936 # --------------- #
20937 # 31 22 0 #
20938 # #
20939 #########################################################################
20941 dst_sgl:
20949 dst_get_supper:
20955 dst_get_sman:
20960 rts
20962 ##############################################################################
20963 fout_pack:
20968 bne.w fout_pack_not_norm # input is not NORM
20970 fout_pack_norm:
20974 fout_pack_d:
20981 bra.b fout_pack_type
20982 fout_pack_s:
20985 fout_pack_type:
20991 # bindec is currently scrambling FP_SRC for denorm inputs.
20992 # we'll have to change this, but for now, tough luck!!!
20995 # andi.l &0xcfff000f,FP_SCR0(%a6) # clear unused fields
21001 bne.b fout_pack_set
21003 bne.b fout_pack_set
21005 bne.b fout_pack_set
21007 # add the extra condition that only if the k-factor was zero, too, should
21008 # we zero the exponent
21010 bne.b fout_pack_set
21011 # "mantissa" is all zero which means that the answer is zero. but, the '040
21012 # algorithm allows the exponent to be non-zero. the 881/2 do not. therefore,
21013 # if the mantissa is zero, I will zero the exponent, too.
21014 # the question now is whether the exponents sign bit is allowed to be non-zero
21015 # for a zero, also...
21018 fout_pack_set:
21022 fout_pack_write:
21027 beq.b fout_pack_a7
21032 bne.w fout_ext_err # yes
21034 rts
21036 # we don't want to do the write if the exception occurred in supervisor mode
21037 # so _mem_write2() handles this for us.
21038 fout_pack_a7:
21042 bne.w fout_ext_err # yes
21044 rts
21046 fout_pack_not_norm:
21048 beq.w fout_pack_norm # yes
21055 fout_pack_snan:
21058 bra.b fout_pack_write
21060 #########################################################################
21061 # XDEF **************************************************************** #
21062 # fetch_dreg(): fetch register according to index in d1 #
21063 # #
21064 # XREF **************************************************************** #
21065 # None #
21066 # #
21067 # INPUT *************************************************************** #
21068 # d1 = index of register to fetch from #
21069 # #
21070 # OUTPUT ************************************************************** #
21071 # d0 = value of register fetched #
21072 # #
21073 # ALGORITHM *********************************************************** #
21074 # According to the index value in d1 which can range from zero #
21075 # to fifteen, load the corresponding register file value (where #
21076 # address register indexes start at 8). D0/D1/A0/A1/A6/A7 are on the #
21077 # stack. The rest should still be in their original places. #
21078 # #
21079 #########################################################################
21081 # this routine leaves d1 intact for subsequent store_dreg calls.
21082 global fetch_dreg
21083 fetch_dreg:
21087 tbl_fdreg:
21088 short fdreg0 - tbl_fdreg
21089 short fdreg1 - tbl_fdreg
21090 short fdreg2 - tbl_fdreg
21091 short fdreg3 - tbl_fdreg
21092 short fdreg4 - tbl_fdreg
21093 short fdreg5 - tbl_fdreg
21094 short fdreg6 - tbl_fdreg
21095 short fdreg7 - tbl_fdreg
21096 short fdreg8 - tbl_fdreg
21097 short fdreg9 - tbl_fdreg
21098 short fdrega - tbl_fdreg
21099 short fdregb - tbl_fdreg
21100 short fdregc - tbl_fdreg
21101 short fdregd - tbl_fdreg
21102 short fdrege - tbl_fdreg
21103 short fdregf - tbl_fdreg
21105 fdreg0:
21107 rts
21108 fdreg1:
21110 rts
21111 fdreg2:
21113 rts
21114 fdreg3:
21116 rts
21117 fdreg4:
21119 rts
21120 fdreg5:
21122 rts
21123 fdreg6:
21125 rts
21126 fdreg7:
21128 rts
21129 fdreg8:
21131 rts
21132 fdreg9:
21134 rts
21135 fdrega:
21137 rts
21138 fdregb:
21140 rts
21141 fdregc:
21143 rts
21144 fdregd:
21146 rts
21147 fdrege:
21149 rts
21150 fdregf:
21152 rts
21154 #########################################################################
21155 # XDEF **************************************************************** #
21156 # store_dreg_l(): store longword to data register specified by d1 #
21157 # #
21158 # XREF **************************************************************** #
21159 # None #
21160 # #
21161 # INPUT *************************************************************** #
21162 # d0 = longowrd value to store #
21163 # d1 = index of register to fetch from #
21164 # #
21165 # OUTPUT ************************************************************** #
21166 # (data register is updated) #
21167 # #
21168 # ALGORITHM *********************************************************** #
21169 # According to the index value in d1, store the longword value #
21170 # in d0 to the corresponding data register. D0/D1 are on the stack #
21171 # while the rest are in their initial places. #
21172 # #
21173 #########################################################################
21175 global store_dreg_l
21176 store_dreg_l:
21180 tbl_sdregl:
21181 short sdregl0 - tbl_sdregl
21182 short sdregl1 - tbl_sdregl
21183 short sdregl2 - tbl_sdregl
21184 short sdregl3 - tbl_sdregl
21185 short sdregl4 - tbl_sdregl
21186 short sdregl5 - tbl_sdregl
21187 short sdregl6 - tbl_sdregl
21188 short sdregl7 - tbl_sdregl
21190 sdregl0:
21192 rts
21193 sdregl1:
21195 rts
21196 sdregl2:
21198 rts
21199 sdregl3:
21201 rts
21202 sdregl4:
21204 rts
21205 sdregl5:
21207 rts
21208 sdregl6:
21210 rts
21211 sdregl7:
21213 rts
21215 #########################################################################
21216 # XDEF **************************************************************** #
21217 # store_dreg_w(): store word to data register specified by d1 #
21218 # #
21219 # XREF **************************************************************** #
21220 # None #
21221 # #
21222 # INPUT *************************************************************** #
21223 # d0 = word value to store #
21224 # d1 = index of register to fetch from #
21225 # #
21226 # OUTPUT ************************************************************** #
21227 # (data register is updated) #
21228 # #
21229 # ALGORITHM *********************************************************** #
21230 # According to the index value in d1, store the word value #
21231 # in d0 to the corresponding data register. D0/D1 are on the stack #
21232 # while the rest are in their initial places. #
21233 # #
21234 #########################################################################
21236 global store_dreg_w
21237 store_dreg_w:
21241 tbl_sdregw:
21242 short sdregw0 - tbl_sdregw
21243 short sdregw1 - tbl_sdregw
21244 short sdregw2 - tbl_sdregw
21245 short sdregw3 - tbl_sdregw
21246 short sdregw4 - tbl_sdregw
21247 short sdregw5 - tbl_sdregw
21248 short sdregw6 - tbl_sdregw
21249 short sdregw7 - tbl_sdregw
21251 sdregw0:
21253 rts
21254 sdregw1:
21256 rts
21257 sdregw2:
21259 rts
21260 sdregw3:
21262 rts
21263 sdregw4:
21265 rts
21266 sdregw5:
21268 rts
21269 sdregw6:
21271 rts
21272 sdregw7:
21274 rts
21276 #########################################################################
21277 # XDEF **************************************************************** #
21278 # store_dreg_b(): store byte to data register specified by d1 #
21279 # #
21280 # XREF **************************************************************** #
21281 # None #
21282 # #
21283 # INPUT *************************************************************** #
21284 # d0 = byte value to store #
21285 # d1 = index of register to fetch from #
21286 # #
21287 # OUTPUT ************************************************************** #
21288 # (data register is updated) #
21289 # #
21290 # ALGORITHM *********************************************************** #
21291 # According to the index value in d1, store the byte value #
21292 # in d0 to the corresponding data register. D0/D1 are on the stack #
21293 # while the rest are in their initial places. #
21294 # #
21295 #########################################################################
21297 global store_dreg_b
21298 store_dreg_b:
21302 tbl_sdregb:
21303 short sdregb0 - tbl_sdregb
21304 short sdregb1 - tbl_sdregb
21305 short sdregb2 - tbl_sdregb
21306 short sdregb3 - tbl_sdregb
21307 short sdregb4 - tbl_sdregb
21308 short sdregb5 - tbl_sdregb
21309 short sdregb6 - tbl_sdregb
21310 short sdregb7 - tbl_sdregb
21312 sdregb0:
21314 rts
21315 sdregb1:
21317 rts
21318 sdregb2:
21320 rts
21321 sdregb3:
21323 rts
21324 sdregb4:
21326 rts
21327 sdregb5:
21329 rts
21330 sdregb6:
21332 rts
21333 sdregb7:
21335 rts
21337 #########################################################################
21338 # XDEF **************************************************************** #
21339 # inc_areg(): increment an address register by the value in d0 #
21340 # #
21341 # XREF **************************************************************** #
21342 # None #
21343 # #
21344 # INPUT *************************************************************** #
21345 # d0 = amount to increment by #
21346 # d1 = index of address register to increment #
21347 # #
21348 # OUTPUT ************************************************************** #
21349 # (address register is updated) #
21350 # #
21351 # ALGORITHM *********************************************************** #
21352 # Typically used for an instruction w/ a post-increment <ea>, #
21353 # this routine adds the increment value in d0 to the address register #
21354 # specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside #
21355 # in their original places. #
21356 # For a7, if the increment amount is one, then we have to #
21357 # increment by two. For any a7 update, set the mia7_flag so that if #
21358 # an access error exception occurs later in emulation, this address #
21359 # register update can be undone. #
21360 # #
21361 #########################################################################
21363 global inc_areg
21364 inc_areg:
21368 tbl_iareg:
21369 short iareg0 - tbl_iareg
21370 short iareg1 - tbl_iareg
21371 short iareg2 - tbl_iareg
21372 short iareg3 - tbl_iareg
21373 short iareg4 - tbl_iareg
21374 short iareg5 - tbl_iareg
21375 short iareg6 - tbl_iareg
21376 short iareg7 - tbl_iareg
21379 rts
21381 rts
21383 rts
21385 rts
21387 rts
21389 rts
21391 rts
21394 beq.b iareg7b
21396 rts
21397 iareg7b:
21399 rts
21401 #########################################################################
21402 # XDEF **************************************************************** #
21403 # dec_areg(): decrement an address register by the value in d0 #
21404 # #
21405 # XREF **************************************************************** #
21406 # None #
21407 # #
21408 # INPUT *************************************************************** #
21409 # d0 = amount to decrement by #
21410 # d1 = index of address register to decrement #
21411 # #
21412 # OUTPUT ************************************************************** #
21413 # (address register is updated) #
21414 # #
21415 # ALGORITHM *********************************************************** #
21416 # Typically used for an instruction w/ a pre-decrement <ea>, #
21417 # this routine adds the decrement value in d0 to the address register #
21418 # specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside #
21419 # in their original places. #
21420 # For a7, if the decrement amount is one, then we have to #
21421 # decrement by two. For any a7 update, set the mda7_flag so that if #
21422 # an access error exception occurs later in emulation, this address #
21423 # register update can be undone. #
21424 # #
21425 #########################################################################
21427 global dec_areg
21428 dec_areg:
21432 tbl_dareg:
21433 short dareg0 - tbl_dareg
21434 short dareg1 - tbl_dareg
21435 short dareg2 - tbl_dareg
21436 short dareg3 - tbl_dareg
21437 short dareg4 - tbl_dareg
21438 short dareg5 - tbl_dareg
21439 short dareg6 - tbl_dareg
21440 short dareg7 - tbl_dareg
21443 rts
21445 rts
21447 rts
21449 rts
21451 rts
21453 rts
21455 rts
21458 beq.b dareg7b
21460 rts
21461 dareg7b:
21463 rts
21465 ##############################################################################
21467 #########################################################################
21468 # XDEF **************************************************************** #
21469 # load_fpn1(): load FP register value into FP_SRC(a6). #
21470 # #
21471 # XREF **************************************************************** #
21472 # None #
21473 # #
21474 # INPUT *************************************************************** #
21475 # d0 = index of FP register to load #
21476 # #
21477 # OUTPUT ************************************************************** #
21478 # FP_SRC(a6) = value loaded from FP register file #
21479 # #
21480 # ALGORITHM *********************************************************** #
21481 # Using the index in d0, load FP_SRC(a6) with a number from the #
21482 # FP register file. #
21483 # #
21484 #########################################################################
21486 global load_fpn1
21487 load_fpn1:
21491 tbl_load_fpn1:
21492 short load_fpn1_0 - tbl_load_fpn1
21493 short load_fpn1_1 - tbl_load_fpn1
21494 short load_fpn1_2 - tbl_load_fpn1
21495 short load_fpn1_3 - tbl_load_fpn1
21496 short load_fpn1_4 - tbl_load_fpn1
21497 short load_fpn1_5 - tbl_load_fpn1
21498 short load_fpn1_6 - tbl_load_fpn1
21499 short load_fpn1_7 - tbl_load_fpn1
21501 load_fpn1_0:
21506 rts
21507 load_fpn1_1:
21512 rts
21513 load_fpn1_2:
21516 rts
21517 load_fpn1_3:
21520 rts
21521 load_fpn1_4:
21524 rts
21525 load_fpn1_5:
21528 rts
21529 load_fpn1_6:
21532 rts
21533 load_fpn1_7:
21536 rts
21538 #############################################################################
21540 #########################################################################
21541 # XDEF **************************************************************** #
21542 # load_fpn2(): load FP register value into FP_DST(a6). #
21543 # #
21544 # XREF **************************************************************** #
21545 # None #
21546 # #
21547 # INPUT *************************************************************** #
21548 # d0 = index of FP register to load #
21549 # #
21550 # OUTPUT ************************************************************** #
21551 # FP_DST(a6) = value loaded from FP register file #
21552 # #
21553 # ALGORITHM *********************************************************** #
21554 # Using the index in d0, load FP_DST(a6) with a number from the #
21555 # FP register file. #
21556 # #
21557 #########################################################################
21559 global load_fpn2
21560 load_fpn2:
21564 tbl_load_fpn2:
21565 short load_fpn2_0 - tbl_load_fpn2
21566 short load_fpn2_1 - tbl_load_fpn2
21567 short load_fpn2_2 - tbl_load_fpn2
21568 short load_fpn2_3 - tbl_load_fpn2
21569 short load_fpn2_4 - tbl_load_fpn2
21570 short load_fpn2_5 - tbl_load_fpn2
21571 short load_fpn2_6 - tbl_load_fpn2
21572 short load_fpn2_7 - tbl_load_fpn2
21574 load_fpn2_0:
21579 rts
21580 load_fpn2_1:
21585 rts
21586 load_fpn2_2:
21589 rts
21590 load_fpn2_3:
21593 rts
21594 load_fpn2_4:
21597 rts
21598 load_fpn2_5:
21601 rts
21602 load_fpn2_6:
21605 rts
21606 load_fpn2_7:
21609 rts
21611 #############################################################################
21613 #########################################################################
21614 # XDEF **************************************************************** #
21615 # store_fpreg(): store an fp value to the fpreg designated d0. #
21616 # #
21617 # XREF **************************************************************** #
21618 # None #
21619 # #
21620 # INPUT *************************************************************** #
21621 # fp0 = extended precision value to store #
21622 # d0 = index of floating-point register #
21623 # #
21624 # OUTPUT ************************************************************** #
21625 # None #
21626 # #
21627 # ALGORITHM *********************************************************** #
21628 # Store the value in fp0 to the FP register designated by the #
21629 # value in d0. The FP number can be DENORM or SNAN so we have to be #
21630 # careful that we don't take an exception here. #
21631 # #
21632 #########################################################################
21634 global store_fpreg
21635 store_fpreg:
21639 tbl_store_fpreg:
21640 short store_fpreg_0 - tbl_store_fpreg
21641 short store_fpreg_1 - tbl_store_fpreg
21642 short store_fpreg_2 - tbl_store_fpreg
21643 short store_fpreg_3 - tbl_store_fpreg
21644 short store_fpreg_4 - tbl_store_fpreg
21645 short store_fpreg_5 - tbl_store_fpreg
21646 short store_fpreg_6 - tbl_store_fpreg
21647 short store_fpreg_7 - tbl_store_fpreg
21649 store_fpreg_0:
21651 rts
21652 store_fpreg_1:
21654 rts
21655 store_fpreg_2:
21658 rts
21659 store_fpreg_3:
21662 rts
21663 store_fpreg_4:
21666 rts
21667 store_fpreg_5:
21670 rts
21671 store_fpreg_6:
21674 rts
21675 store_fpreg_7:
21678 rts
21680 #########################################################################
21681 # XDEF **************************************************************** #
21682 # _denorm(): denormalize an intermediate result #
21683 # #
21684 # XREF **************************************************************** #
21685 # None #
21686 # #
21687 # INPUT *************************************************************** #
21688 # a0 = points to the operand to be denormalized #
21689 # (in the internal extended format) #
21690 # #
21691 # d0 = rounding precision #
21692 # #
21693 # OUTPUT ************************************************************** #
21694 # a0 = pointer to the denormalized result #
21695 # (in the internal extended format) #
21696 # #
21697 # d0 = guard,round,sticky #
21698 # #
21699 # ALGORITHM *********************************************************** #
21700 # According to the exponent underflow threshold for the given #
21701 # precision, shift the mantissa bits to the right in order raise the #
21702 # exponent of the operand to the threshold value. While shifting the #
21703 # mantissa bits right, maintain the value of the guard, round, and #
21704 # sticky bits. #
21705 # other notes: #
21706 # (1) _denorm() is called by the underflow routines #
21707 # (2) _denorm() does NOT affect the status register #
21708 # #
21709 #########################################################################
21711 #
21712 # table of exponent threshold values for each precision
21713 #
21714 tbl_thresh:
21715 short 0x0
21716 short sgl_thresh
21717 short dbl_thresh
21719 global _denorm
21720 _denorm:
21721 #
21722 # Load the exponent threshold for the precision selected and check
21723 # to see if (threshold - exponent) is > 65 in which case we can
21724 # simply calculate the sticky bit and zero the mantissa. otherwise
21725 # we have to call the denormalization routine.
21726 #
21739 denorm_call:
21741 rts
21743 #
21744 # all bit would have been shifted off during the denorm so simply
21745 # calculate if the sticky should be set and clear the entire mantissa.
21746 #
21747 denorm_set_stky:
21752 rts
21754 # #
21755 # dnrm_lp(): normalize exponent/mantissa to specified threshhold #
21756 # #
21757 # INPUT: #
21758 # %a0 : points to the operand to be denormalized #
21759 # %d0{31:29} : initial guard,round,sticky #
21760 # %d1{15:0} : denormalization threshold #
21761 # OUTPUT: #
21762 # %a0 : points to the denormalized operand #
21763 # %d0{31:29} : final guard,round,sticky #
21764 # #
21766 # *** Local Equates *** #
21770 global dnrm_lp
21771 dnrm_lp:
21773 #
21774 # make a copy of FTEMP_LO and place the g,r,s bits directly after it
21775 # in memory so as to make the bitfield extraction for denormalization easier.
21776 #
21780 #
21781 # check to see how much less than the underflow threshold the operand
21782 # exponent is.
21783 #
21791 bra.w case_3 # (d1 >= 64)
21793 #
21794 # No normalization necessary
21795 #
21796 dnrm_no_lp:
21798 rts
21800 #
21801 # case (0<d1<32)
21802 #
21803 # %d0 = denorm threshold
21804 # %d1 = "n" = amt to shift
21805 #
21806 # ---------------------------------------------------------
21807 # | FTEMP_HI | FTEMP_LO |grs000.........000|
21808 # ---------------------------------------------------------
21809 # <-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
21810 # \ \ \ \
21811 # \ \ \ \
21812 # \ \ \ \
21813 # \ \ \ \
21814 # \ \ \ \
21815 # \ \ \ \
21816 # \ \ \ \
21817 # \ \ \ \
21818 # <-(n)-><-(32 - n)-><------(32)-------><------(32)------->
21819 # ---------------------------------------------------------
21820 # |0.....0| NEW_HI | NEW_FTEMP_LO |grs |
21821 # ---------------------------------------------------------
21822 #
21823 case_1:
21835 case1_extract:
21847 case1_sticky_clear:
21850 rts
21852 #
21853 # case (32<=d1<64)
21854 #
21855 # %d0 = denorm threshold
21856 # %d1 = "n" = amt to shift
21857 #
21858 # ---------------------------------------------------------
21859 # | FTEMP_HI | FTEMP_LO |grs000.........000|
21860 # ---------------------------------------------------------
21861 # <-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
21862 # \ \ \
21863 # \ \ \
21864 # \ \ -------------------
21865 # \ -------------------- \
21866 # ------------------- \ \
21867 # \ \ \
21868 # \ \ \
21869 # \ \ \
21870 # <-------(32)------><-(n)-><-(32 - n)-><------(32)------->
21871 # ---------------------------------------------------------
21872 # |0...............0|0....0| NEW_LO |grs |
21873 # ---------------------------------------------------------
21874 #
21875 case_2:
21883 # subtle step here; or in the g,r,s at the bottom of FTEMP_LO to minimize
21884 # the number of bits to check for the sticky detect.
21885 # it only plays a role in shift amounts of 61-63.
21898 bra.b case2_end
21900 case2_set_sticky:
21904 case2_end:
21910 rts
21912 #
21913 # case (d1>=64)
21914 #
21915 # %d0 = denorm threshold
21916 # %d1 = amt to shift
21917 #
21918 case_3:
21925 #
21926 # case (d1>65)
21927 #
21928 # Shift value is > 65 and out of range. All bits are shifted off.
21929 # Return a zero mantissa with the sticky bit set
21930 #
21934 rts
21936 #
21937 # case (d1 == 64)
21938 #
21939 # ---------------------------------------------------------
21940 # | FTEMP_HI | FTEMP_LO |grs000.........000|
21941 # ---------------------------------------------------------
21942 # <-------(32)------>
21943 # \ \
21944 # \ \
21945 # \ \
21946 # \ ------------------------------
21947 # ------------------------------- \
21948 # \ \
21949 # \ \
21950 # \ \
21951 # <-------(32)------>
21952 # ---------------------------------------------------------
21953 # |0...............0|0................0|grs |
21954 # ---------------------------------------------------------
21955 #
21956 case3_64:
21962 bra.b case3_complete
21964 #
21965 # case (d1 == 65)
21966 #
21967 # ---------------------------------------------------------
21968 # | FTEMP_HI | FTEMP_LO |grs000.........000|
21969 # ---------------------------------------------------------
21970 # <-------(32)------>
21971 # \ \
21972 # \ \
21973 # \ \
21974 # \ ------------------------------
21975 # -------------------------------- \
21976 # \ \
21977 # \ \
21978 # \ \
21979 # <-------(31)----->
21980 # ---------------------------------------------------------
21981 # |0...............0|0................0|0rs |
21982 # ---------------------------------------------------------
21983 #
21984 case3_65:
21990 case3_complete:
21991 # last operation done was an "and" of the bits shifted off so the condition
21992 # codes are already set so branch accordingly.
21999 #
22000 # no bits were shifted off so don't set the sticky bit.
22001 # the guard and
22002 # the entire mantissa is zero.
22003 #
22006 rts
22008 #
22009 # some bits were shifted off so set the sticky bit.
22010 # the entire mantissa is zero.
22011 #
22012 case3_set_sticky:
22016 rts
22018 #########################################################################
22019 # XDEF **************************************************************** #
22020 # _round(): round result according to precision/mode #
22021 # #
22022 # XREF **************************************************************** #
22023 # None #
22024 # #
22025 # INPUT *************************************************************** #
22026 # a0 = ptr to input operand in internal extended format #
22027 # d1(hi) = contains rounding precision: #
22028 # ext = $0000xxxx #
22029 # sgl = $0004xxxx #
22030 # dbl = $0008xxxx #
22031 # d1(lo) = contains rounding mode: #
22032 # RN = $xxxx0000 #
22033 # RZ = $xxxx0001 #
22034 # RM = $xxxx0002 #
22035 # RP = $xxxx0003 #
22036 # d0{31:29} = contains the g,r,s bits (extended) #
22037 # #
22038 # OUTPUT ************************************************************** #
22039 # a0 = pointer to rounded result #
22040 # #
22041 # ALGORITHM *********************************************************** #
22042 # On return the value pointed to by a0 is correctly rounded, #
22043 # a0 is preserved and the g-r-s bits in d0 are cleared. #
22044 # The result is not typed - the tag field is invalid. The #
22045 # result is still in the internal extended format. #
22046 # #
22047 # The INEX bit of USER_FPSR will be set if the rounded result was #
22048 # inexact (i.e. if any of the g-r-s bits were set). #
22049 # #
22050 #########################################################################
22052 global _round
22053 _round:
22054 #
22055 # ext_grs() looks at the rounding precision and sets the appropriate
22056 # G,R,S bits.
22057 # If (G,R,S == 0) then result is exact and round is done, else set
22058 # the inex flag in status reg and continue.
22059 #
22063 beq.w truncate # yes; round is complete
22067 #
22068 # Use rounding mode as an index into a jump table for these modes.
22069 # All of the following assumes grs != 0.
22070 #
22074 tbl_mode:
22075 short rnd_near - tbl_mode
22077 short rnd_mnus - tbl_mode
22078 short rnd_plus - tbl_mode
22080 #################################################################
22081 # ROUND PLUS INFINITY #
22082 # #
22083 # If sign of fp number = 0 (positive), then add 1 to l. #
22084 #################################################################
22085 rnd_plus:
22087 bmi.w truncate # if positive then truncate
22093 beq.w add_sgl # yes
22094 bgt.w add_dbl # no; it's dbl
22095 bra.w add_ext # no; it's ext
22097 #################################################################
22098 # ROUND MINUS INFINITY #
22099 # #
22100 # If sign of fp number = 1 (negative), then add 1 to l. #
22101 #################################################################
22102 rnd_mnus:
22104 bpl.w truncate # if negative then truncate
22110 beq.w add_sgl # yes
22111 bgt.w add_dbl # no; it's dbl
22112 bra.w add_ext # no; it's ext
22114 #################################################################
22115 # ROUND NEAREST #
22116 # #
22117 # If (g=1), then add 1 to l and if (r=s=0), then clear l #
22118 # Note that this will round to even in case of a tie. #
22119 #################################################################
22120 rnd_near:
22122 bcc.w truncate # if (g=1) then
22127 beq.w add_sgl # yes
22128 bgt.w add_dbl # no; it's dbl
22129 bra.w add_ext # no; it's ext
22131 # *** LOCAL EQUATES ***
22135 #########################
22136 # ADD SINGLE #
22137 #########################
22138 add_sgl:
22144 scc_clr:
22146 bne.b sgl_done
22148 sgl_done:
22151 rts
22153 #########################
22154 # ADD EXTENDED #
22155 #########################
22156 add_ext:
22160 bcc.b xcc_clr
22166 xcc_clr:
22168 bne.b add_ext_done
22170 add_ext_done:
22171 rts
22173 #########################
22174 # ADD DOUBLE #
22175 #########################
22176 add_dbl:
22187 dcc_clr:
22189 bne.b dbl_done
22192 dbl_done:
22194 rts
22196 ###########################
22197 # Truncate all other bits #
22198 ###########################
22199 truncate:
22203 beq.w sgl_done # yes
22205 rts # no; it's ext
22208 #
22209 # ext_grs(): extract guard, round and sticky bits according to
22210 # rounding precision.
22211 #
22212 # INPUT
22213 # d0 = extended precision g,r,s (in d0{31:29})
22214 # d1 = {PREC,ROUND}
22215 # OUTPUT
22216 # d0{31:29} = guard, round, sticky
22217 #
22218 # The ext_grs extract the guard/round/sticky bits according to the
22219 # selected rounding precision. It is called by the round subroutine
22220 # only. All registers except d0 are kept intact. d0 becomes an
22221 # updated guard,round,sticky in d0{31:29}
22222 #
22223 # Notes: the ext_grs uses the round PREC, and therefore has to swap d1
22224 # prior to usage, and needs to restore d1 to original. this
22225 # routine is tightly tied to the round routine and not meant to
22226 # uphold standard subroutine calling practices.
22227 #
22229 ext_grs:
22234 #
22235 # %d0 actually already hold g,r,s since _round() had it before calling
22236 # this function. so, as long as we don't disturb it, we are "returning" it.
22237 #
22238 ext_grs_ext:
22240 rts
22242 ext_grs_not_ext:
22248 #
22249 # sgl:
22250 # 96 64 40 32 0
22251 # -----------------------------------------------------
22252 # | EXP |XXXXXXX| |xx | |grs|
22253 # -----------------------------------------------------
22254 # <--(24)--->nn\ /
22255 # ee ---------------------
22256 # ww |
22257 # v
22258 # gr new sticky
22259 #
22260 ext_grs_sgl:
22273 #
22274 # dbl:
22275 # 96 64 32 11 0
22276 # -----------------------------------------------------
22277 # | EXP |XXXXXXX| | |xx |grs|
22278 # -----------------------------------------------------
22279 # nn\ /
22280 # ee -------
22281 # ww |
22282 # v
22283 # gr new sticky
22284 #
22285 ext_grs_dbl:
22296 ext_grs_st_stky:
22298 ext_grs_end_sd:
22304 rts
22306 #########################################################################
22307 # norm(): normalize the mantissa of an extended precision input. the #
22308 # input operand should not be normalized already. #
22309 # #
22310 # XDEF **************************************************************** #
22311 # norm() #
22312 # #
22313 # XREF **************************************************************** #
22314 # none #
22315 # #
22316 # INPUT *************************************************************** #
22317 # a0 = pointer fp extended precision operand to normalize #
22318 # #
22319 # OUTPUT ************************************************************** #
22320 # d0 = number of bit positions the mantissa was shifted #
22321 # a0 = the input operand's mantissa is normalized; the exponent #
22322 # is unchanged. #
22323 # #
22324 #########################################################################
22325 global norm
22326 norm:
22336 norm_hi:
22351 rts
22353 norm_lo:
22366 rts
22368 #########################################################################
22369 # unnorm_fix(): - changes an UNNORM to one of NORM, DENORM, or ZERO #
22370 # - returns corresponding optype tag #
22371 # #
22372 # XDEF **************************************************************** #
22373 # unnorm_fix() #
22374 # #
22375 # XREF **************************************************************** #
22376 # norm() - normalize the mantissa #
22377 # #
22378 # INPUT *************************************************************** #
22379 # a0 = pointer to unnormalized extended precision number #
22380 # #
22381 # OUTPUT ************************************************************** #
22382 # d0 = optype tag - is corrected to one of NORM, DENORM, or ZERO #
22383 # a0 = input operand has been converted to a norm, denorm, or #
22384 # zero; both the exponent and mantissa are changed. #
22385 # #
22386 #########################################################################
22388 global unnorm_fix
22389 unnorm_fix:
22393 #
22394 # hi(man) is all zeroes so see if any bits in lo(man) are set
22395 #
22396 unnorm_chk_lo:
22398 beq.w unnorm_zero # yes
22402 #
22403 # d0 = # shifts needed for complete normalization
22404 #
22405 unnorm_shift:
22413 #
22414 # exponent would not go < 0. therefore, number stays normalized
22415 #
22425 rts
22427 #
22428 # exponent would go < 0, so only denormalize until exp = 0
22429 #
22430 unnorm_nrm_zero:
22444 rts
22446 #
22447 # only mantissa bits set are in lo(man)
22448 #
22449 unnorm_nrm_zero_lrg:
22461 rts
22463 #
22464 # whole mantissa is zero so this UNNORM is actually a zero
22465 #
22466 unnorm_zero:
22470 rts
22472 #########################################################################
22473 # XDEF **************************************************************** #
22474 # set_tag_x(): return the optype of the input ext fp number #
22475 # #
22476 # XREF **************************************************************** #
22477 # None #
22478 # #
22479 # INPUT *************************************************************** #
22480 # a0 = pointer to extended precision operand #
22481 # #
22482 # OUTPUT ************************************************************** #
22483 # d0 = value of type tag #
22484 # one of: NORM, INF, QNAN, SNAN, DENORM, UNNORM, ZERO #
22485 # #
22486 # ALGORITHM *********************************************************** #
22487 # Simply test the exponent, j-bit, and mantissa values to #
22488 # determine the type of operand. #
22489 # If it's an unnormalized zero, alter the operand and force it #
22490 # to be a normal zero. #
22491 # #
22492 #########################################################################
22494 global set_tag_x
22495 set_tag_x:
22499 beq.b inf_or_nan_x
22500 not_inf_or_nan_x:
22502 beq.b not_norm_x
22503 is_norm_x:
22505 rts
22506 not_norm_x:
22508 bne.b is_unnorm_x
22509 not_unnorm_x:
22511 bne.b is_denorm_x
22513 bne.b is_denorm_x
22514 is_zero_x:
22516 rts
22517 is_denorm_x:
22519 rts
22520 # must distinguish now "Unnormalized zeroes" which we
22521 # must convert to zero.
22522 is_unnorm_x:
22524 bne.b is_unnorm_reg_x
22526 bne.b is_unnorm_reg_x
22527 # it's an "unnormalized zero". let's convert it to an actual zero...
22530 rts
22531 is_unnorm_reg_x:
22533 rts
22534 inf_or_nan_x:
22536 bne.b is_nan_x
22539 bne.b is_nan_x
22540 is_inf_x:
22542 rts
22543 is_nan_x:
22545 beq.b is_snan_x
22547 rts
22548 is_snan_x:
22550 rts
22552 #########################################################################
22553 # XDEF **************************************************************** #
22554 # set_tag_d(): return the optype of the input dbl fp number #
22555 # #
22556 # XREF **************************************************************** #
22557 # None #
22558 # #
22559 # INPUT *************************************************************** #
22560 # a0 = points to double precision operand #
22561 # #
22562 # OUTPUT ************************************************************** #
22563 # d0 = value of type tag #
22564 # one of: NORM, INF, QNAN, SNAN, DENORM, ZERO #
22565 # #
22566 # ALGORITHM *********************************************************** #
22567 # Simply test the exponent, j-bit, and mantissa values to #
22568 # determine the type of operand. #
22569 # #
22570 #########################################################################
22572 global set_tag_d
22573 set_tag_d:
22578 beq.b zero_or_denorm_d
22581 beq.b inf_or_nan_d
22583 is_norm_d:
22585 rts
22586 zero_or_denorm_d:
22588 bne is_denorm_d
22590 bne is_denorm_d
22591 is_zero_d:
22593 rts
22594 is_denorm_d:
22596 rts
22597 inf_or_nan_d:
22599 bne is_nan_d
22601 bne is_nan_d
22602 is_inf_d:
22604 rts
22605 is_nan_d:
22607 bne is_qnan_d
22608 is_snan_d:
22610 rts
22611 is_qnan_d:
22613 rts
22615 #########################################################################
22616 # XDEF **************************************************************** #
22617 # set_tag_s(): return the optype of the input sgl fp number #
22618 # #
22619 # XREF **************************************************************** #
22620 # None #
22621 # #
22622 # INPUT *************************************************************** #
22623 # a0 = pointer to single precision operand #
22624 # #
22625 # OUTPUT ************************************************************** #
22626 # d0 = value of type tag #
22627 # one of: NORM, INF, QNAN, SNAN, DENORM, ZERO #
22628 # #
22629 # ALGORITHM *********************************************************** #
22630 # Simply test the exponent, j-bit, and mantissa values to #
22631 # determine the type of operand. #
22632 # #
22633 #########################################################################
22635 global set_tag_s
22636 set_tag_s:
22641 beq.b zero_or_denorm_s
22644 beq.b inf_or_nan_s
22646 is_norm_s:
22648 rts
22649 zero_or_denorm_s:
22651 bne is_denorm_s
22652 is_zero_s:
22654 rts
22655 is_denorm_s:
22657 rts
22658 inf_or_nan_s:
22660 bne is_nan_s
22661 is_inf_s:
22663 rts
22664 is_nan_s:
22666 bne is_qnan_s
22667 is_snan_s:
22669 rts
22670 is_qnan_s:
22672 rts
22674 #########################################################################
22675 # XDEF **************************************************************** #
22676 # unf_res(): routine to produce default underflow result of a #
22677 # scaled extended precision number; this is used by #
22678 # fadd/fdiv/fmul/etc. emulation routines. #
22679 # unf_res4(): same as above but for fsglmul/fsgldiv which use #
22680 # single round prec and extended prec mode. #
22681 # #
22682 # XREF **************************************************************** #
22683 # _denorm() - denormalize according to scale factor #
22684 # _round() - round denormalized number according to rnd prec #
22685 # #
22686 # INPUT *************************************************************** #
22687 # a0 = pointer to extended precison operand #
22688 # d0 = scale factor #
22689 # d1 = rounding precision/mode #
22690 # #
22691 # OUTPUT ************************************************************** #
22692 # a0 = pointer to default underflow result in extended precision #
22693 # d0.b = result FPSR_cc which caller may or may not want to save #
22694 # #
22695 # ALGORITHM *********************************************************** #
22696 # Convert the input operand to "internal format" which means the #
22697 # exponent is extended to 16 bits and the sign is stored in the unused #
22698 # portion of the extended precison operand. Denormalize the number #
22699 # according to the scale factor passed in d0. Then, round the #
22700 # denormalized result. #
22701 # Set the FPSR_exc bits as appropriate but return the cc bits in #
22702 # d0 in case the caller doesn't want to save them (as is the case for #
22703 # fmove out). #
22704 # unf_res4() for fsglmul/fsgldiv forces the denorm to extended #
22705 # precision and the rounding mode to single. #
22706 # #
22707 #########################################################################
22708 global unf_res
22709 unf_res:
22731 swap %d1
22739 # result is now rounded properly. convert back to normal format
22746 # the number may have become zero after rounding. set ccodes accordingly.
22747 unf_res_chkifzero:
22753 # bset &z_bit, FPSR_CC(%a6) # yes; set zero ccode bit
22756 unf_res_cont:
22758 #
22759 # can inex1 also be set along with unfl and inex2???
22760 #
22761 # we know that underflow has occurred. aunfl should be set if INEX2 is also set.
22762 #
22767 unf_res_end:
22769 rts
22771 # unf_res() for fsglmul() and fsgldiv().
22772 global unf_res4
22773 unf_res4:
22791 swap %d1
22799 # result is now rounded properly. convert back to normal format
22806 # the number may have become zero after rounding. set ccodes accordingly.
22807 unf_res4_chkifzero:
22813 # bset &z_bit,FPSR_CC(%a6) # yes; set zero ccode bit
22816 unf_res4_cont:
22818 #
22819 # can inex1 also be set along with unfl and inex2???
22820 #
22821 # we know that underflow has occurred. aunfl should be set if INEX2 is also set.
22822 #
22827 unf_res4_end:
22829 rts
22831 #########################################################################
22832 # XDEF **************************************************************** #
22833 # ovf_res(): routine to produce the default overflow result of #
22834 # an overflowing number. #
22835 # ovf_res2(): same as above but the rnd mode/prec are passed #
22836 # differently. #
22837 # #
22838 # XREF **************************************************************** #
22839 # none #
22840 # #
22841 # INPUT *************************************************************** #
22842 # d1.b = '-1' => (-); '0' => (+) #
22843 # ovf_res(): #
22844 # d0 = rnd mode/prec #
22845 # ovf_res2(): #
22846 # hi(d0) = rnd prec #
22847 # lo(d0) = rnd mode #
22848 # #
22849 # OUTPUT ************************************************************** #
22850 # a0 = points to extended precision result #
22851 # d0.b = condition code bits #
22852 # #
22853 # ALGORITHM *********************************************************** #
22854 # The default overflow result can be determined by the sign of #
22855 # the result and the rounding mode/prec in effect. These bits are #
22856 # concatenated together to create an index into the default result #
22857 # table. A pointer to the correct result is returned in a0. The #
22858 # resulting condition codes are returned in d0 in case the caller #
22859 # doesn't want FPSR_cc altered (as is the case for fmove out). #
22860 # #
22861 #########################################################################
22863 global ovf_res
22864 ovf_res:
22870 bra.b ovf_res_load
22872 global ovf_res2
22873 ovf_res2:
22876 swap %d0
22881 #
22882 # use the rounding mode, precision, and result sign as in index into the
22883 # two tables below to fetch the default result and the result ccodes.
22884 #
22885 ovf_res_load:
22889 rts
22891 tbl_ovfl_cc:
22900 tbl_ovfl_result:
22936 #########################################################################
22937 # XDEF **************************************************************** #
22938 # get_packed(): fetch a packed operand from memory and then #
22939 # convert it to a floating-point binary number. #
22940 # #
22941 # XREF **************************************************************** #
22942 # _dcalc_ea() - calculate the correct <ea> #
22943 # _mem_read() - fetch the packed operand from memory #
22944 # facc_in_x() - the fetch failed so jump to special exit code #
22945 # decbin() - convert packed to binary extended precision #
22946 # #
22947 # INPUT *************************************************************** #
22948 # None #
22949 # #
22950 # OUTPUT ************************************************************** #
22951 # If no failure on _mem_read(): #
22952 # FP_SRC(a6) = packed operand now as a binary FP number #
22953 # #
22954 # ALGORITHM *********************************************************** #
22955 # Get the correct <ea> whihc is the value on the exception stack #
22956 # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. #
22957 # Then, fetch the operand from memory. If the fetch fails, exit #
22958 # through facc_in_x(). #
22959 # If the packed operand is a ZERO,NAN, or INF, convert it to #
22960 # its binary representation here. Else, call decbin() which will #
22961 # convert the packed value to an extended precision binary value. #
22962 # #
22963 #########################################################################
22965 # the stacked <ea> for packed is correct except for -(An).
22966 # the base reg must be updated for both -(An) and (An)+.
22967 global get_packed
22968 get_packed:
22979 # The packed operand is an INF or a NAN if the exponent field is all ones.
22983 rts # operand is an INF or NAN
22985 # The packed operand is a zero if the mantissa is all zero, else it's
22986 # a normal packed op.
22987 gp_try_zero:
22995 rts # operand is a ZERO
22996 gp_not_spec:
23000 rts
23002 #########################################################################
23003 # decbin(): Converts normalized packed bcd value pointed to by register #
23004 # a0 to extended-precision value in fp0. #
23005 # #
23006 # INPUT *************************************************************** #
23007 # a0 = pointer to normalized packed bcd value #
23008 # #
23009 # OUTPUT ************************************************************** #
23010 # fp0 = exact fp representation of the packed bcd value. #
23011 # #
23012 # ALGORITHM *********************************************************** #
23013 # Expected is a normal bcd (i.e. non-exceptional; all inf, zero, #
23014 # and NaN operands are dispatched without entering this routine) #
23015 # value in 68881/882 format at location (a0). #
23016 # #
23017 # A1. Convert the bcd exponent to binary by successive adds and #
23018 # muls. Set the sign according to SE. Subtract 16 to compensate #
23019 # for the mantissa which is to be interpreted as 17 integer #
23020 # digits, rather than 1 integer and 16 fraction digits. #
23021 # Note: this operation can never overflow. #
23022 # #
23023 # A2. Convert the bcd mantissa to binary by successive #
23024 # adds and muls in FP0. Set the sign according to SM. #
23025 # The mantissa digits will be converted with the decimal point #
23026 # assumed following the least-significant digit. #
23027 # Note: this operation can never overflow. #
23028 # #
23029 # A3. Count the number of leading/trailing zeros in the #
23030 # bcd string. If SE is positive, count the leading zeros; #
23031 # if negative, count the trailing zeros. Set the adjusted #
23032 # exponent equal to the exponent from A1 and the zero count #
23033 # added if SM = 1 and subtracted if SM = 0. Scale the #
23034 # mantissa the equivalent of forcing in the bcd value: #
23035 # #
23036 # SM = 0 a non-zero digit in the integer position #
23037 # SM = 1 a non-zero digit in Mant0, lsd of the fraction #
23038 # #
23039 # this will insure that any value, regardless of its #
23040 # representation (ex. 0.1E2, 1E1, 10E0, 100E-1), is converted #
23041 # consistently. #
23042 # #
23043 # A4. Calculate the factor 10^exp in FP1 using a table of #
23044 # 10^(2^n) values. To reduce the error in forming factors #
23045 # greater than 10^27, a directed rounding scheme is used with #
23046 # tables rounded to RN, RM, and RP, according to the table #
23047 # in the comments of the pwrten section. #
23048 # #
23049 # A5. Form the final binary number by scaling the mantissa by #
23050 # the exponent factor. This is done by multiplying the #
23051 # mantissa in FP0 by the factor in FP1 if the adjusted #
23052 # exponent sign is positive, and dividing FP0 by FP1 if #
23053 # it is negative. #
23054 # #
23055 # Clean up and return. Check if the final mul or div was inexact. #
23056 # If so, set INEX1 in USER_FPSR. #
23057 # #
23058 #########################################################################
23060 #
23061 # PTENRN, PTENRM, and PTENRP are arrays of powers of 10 rounded
23062 # to nearest, minus, and plus, respectively. The tables include
23063 # 10**{1,2,4,8,16,32,64,128,256,512,1024,2048,4096}. No rounding
23064 # is required until the power is greater than 27, however, all
23065 # tables include the first 5 for ease of indexing.
23066 #
23067 RTABLE:
23079 global decbin
23080 decbin:
23089 #
23090 # Calculate exponent:
23091 # 1. Copy bcd value in memory for use as a working copy.
23092 # 2. Calculate absolute value of exponent in d1 by mul and add.
23093 # 3. Correct for exponent sign.
23094 # 4. Subtract 16 to compensate for interpreting the mant as all integer digits.
23095 # (i.e., all digits assumed left of the decimal point.)
23096 #
23097 # Register usage:
23098 #
23099 # calc_e:
23100 # (*) d0: temp digit storage
23101 # (*) d1: accumulator for binary exponent
23102 # (*) d2: digit count
23103 # (*) d3: offset pointer
23104 # ( ) d4: first word of bcd
23105 # ( ) a0: pointer to working bcd value
23106 # ( ) a6: pointer to original bcd value
23107 # (*) FP_SCR1: working copy of original bcd value
23108 # (*) L_SCR1: copy of original exponent word
23109 #
23110 calc_e:
23115 e_gd:
23124 e_pos:
23130 e_save:
23132 #
23133 #
23134 # Calculate mantissa:
23135 # 1. Calculate absolute value of mantissa in fp0 by mul and add.
23136 # 2. Correct for mantissa sign.
23137 # (i.e., all digits assumed left of the decimal point.)
23138 #
23139 # Register usage:
23140 #
23141 # calc_m:
23142 # (*) d0: temp digit storage
23143 # (*) d1: lword counter
23144 # (*) d2: digit count
23145 # (*) d3: offset pointer
23146 # ( ) d4: words 2 and 3 of bcd
23147 # ( ) a0: pointer to working bcd value
23148 # ( ) a6: pointer to original bcd value
23149 # (*) fp0: mantissa accumulator
23150 # ( ) FP_SCR1: working copy of original bcd value
23151 # ( ) L_SCR1: copy of original exponent word
23152 #
23153 calc_m:
23156 #
23157 #
23158 # Since the packed number has a long word between the first & second parts,
23159 # get the integer digit then skip down & get the rest of the
23160 # mantissa. We will unroll the loop once.
23161 #
23164 #
23165 #
23166 # Get the rest of the mantissa.
23167 #
23168 loadlw:
23172 md2b:
23176 #
23177 #
23178 # If all the digits (8) in that long word have been converted (d2=0),
23179 # then inc d1 (=2) to point to the next long word and reset d3 to 0
23180 # to initialize the digit offset, and set d2 to 7 for the digit count;
23181 # else continue with this long word.
23182 #
23185 nextlw:
23189 #
23190 # Check the sign of the mant and make the value in fp0 the same sign.
23191 #
23192 m_sign:
23196 #
23197 # Append/strip zeros:
23198 #
23199 # For adjusted exponents which have an absolute value greater than 27*,
23200 # this routine calculates the amount needed to normalize the mantissa
23201 # for the adjusted exponent. That number is subtracted from the exp
23202 # if the exp was positive, and added if it was negative. The purpose
23203 # of this is to reduce the value of the exponent and the possibility
23204 # of error in calculation of pwrten.
23205 #
23206 # 1. Branch on the sign of the adjusted exponent.
23207 # 2p.(positive exp)
23208 # 2. Check M16 and the digits in lwords 2 and 3 in decending order.
23209 # 3. Add one for each zero encountered until a non-zero digit.
23210 # 4. Subtract the count from the exp.
23211 # 5. Check if the exp has crossed zero in #3 above; make the exp abs
23212 # and set SE.
23213 # 6. Multiply the mantissa by 10**count.
23214 # 2n.(negative exp)
23215 # 2. Check the digits in lwords 3 and 2 in decending order.
23216 # 3. Add one for each zero encountered until a non-zero digit.
23217 # 4. Add the count to the exp.
23218 # 5. Check if the exp has crossed zero in #3 above; clear SE.
23219 # 6. Divide the mantissa by 10**count.
23220 #
23221 # *Why 27? If the adjusted exponent is within -28 < expA < 28, than
23222 # any adjustment due to append/strip zeros will drive the resultane
23223 # exponent towards zero. Since all pwrten constants with a power
23224 # of 27 or less are exact, there is no need to use this routine to
23225 # attempt to lessen the resultant exponent.
23226 #
23227 # Register usage:
23228 #
23229 # ap_st_z:
23230 # (*) d0: temp digit storage
23231 # (*) d1: zero count
23232 # (*) d2: digit count
23233 # (*) d3: offset pointer
23234 # ( ) d4: first word of bcd
23235 # (*) d5: lword counter
23236 # ( ) a0: pointer to working bcd value
23237 # ( ) FP_SCR1: working copy of original bcd value
23238 # ( ) L_SCR1: copy of original exponent word
23239 #
23240 #
23241 # First check the absolute value of the exponent to see if this
23242 # routine is necessary. If so, then check the sign of the exponent
23243 # and do append (+) or strip (-) zeros accordingly.
23244 # This section handles a positive adjusted exponent.
23245 #
23246 ap_st_z:
23249 ble.w pwrten # if abs(expA) <28, skip ap/st zeros
23263 ap_p_cl:
23266 ap_p_gd:
23272 ap_p_fx:
23281 #
23282 # Calculate the mantissa multiplier to compensate for the striping of
23283 # zeros from the mantissa.
23284 #
23285 ap_p_fm:
23290 ap_p_el:
23294 ap_p_en:
23300 #
23301 # This section handles a negative adjusted exponent.
23302 #
23303 ap_st_n:
23311 ap_n_cl:
23314 ap_n_gd:
23320 ap_n_fx:
23329 #
23330 # Calculate the mantissa multiplier to compensate for the appending of
23331 # zeros to the mantissa.
23332 #
23333 ap_n_fm:
23338 ap_n_el:
23342 ap_n_en:
23347 #
23348 #
23349 # Calculate power-of-ten factor from adjusted and shifted exponent.
23350 #
23351 # Register usage:
23352 #
23353 # pwrten:
23354 # (*) d0: temp
23355 # ( ) d1: exponent
23356 # (*) d2: {FPCR[6:5],SM,SE} as index in RTABLE; temp
23357 # (*) d3: FPCR work copy
23358 # ( ) d4: first word of bcd
23359 # (*) a1: RTABLE pointer
23360 # calc_p:
23361 # (*) d0: temp
23362 # ( ) d1: exponent
23363 # (*) d3: PWRTxx table index
23364 # ( ) a0: pointer to working copy of bcd
23365 # (*) a1: PWRTxx pointer
23366 # (*) fp1: power-of-ten accumulator
23367 #
23368 # Pwrten calculates the exponent factor in the selected rounding mode
23369 # according to the following table:
23370 #
23371 # Sign of Mant Sign of Exp Rounding Mode PWRTEN Rounding Mode
23372 #
23373 # ANY ANY RN RN
23374 #
23375 # + + RP RP
23376 # - + RP RM
23377 # + - RP RM
23378 # - - RP RP
23379 #
23380 # + + RM RM
23381 # - + RM RP
23382 # + - RM RP
23383 # - - RM RM
23384 #
23385 # + + RZ RM
23386 # - + RZ RM
23387 # + - RZ RP
23388 # - - RZ RP
23389 #
23390 #
23391 pwrten:
23407 not_rp:
23409 bcc.b not_rm
23412 not_rm:
23414 calc_p:
23419 no_neg:
23422 e_loop:
23426 e_next:
23430 #
23431 #
23432 # Check the sign of the adjusted exp and make the value in fp0 the
23433 # same sign. If the exp was pos then multiply fp1*fp0;
23434 # else divide fp0/fp1.
23435 #
23436 # Register Usage:
23437 # norm:
23438 # ( ) a0: pointer to working bcd value
23439 # (*) fp0: mantissa accumulator
23440 # ( ) fp1: scaling factor - 10**(abs(exp))
23441 #
23442 pnorm:
23447 bra.b end_dec
23450 #
23451 #
23452 # Clean up and return with result in fp0.
23453 #
23454 # If the final mul/div in decbin incurred an inex exception,
23455 # it will be inex2, but will be reported as inex1 by get_op.
23456 #
23457 end_dec:
23462 no_exc:
23468 rts
23470 #########################################################################
23471 # bindec(): Converts an input in extended precision format to bcd format#
23472 # #
23473 # INPUT *************************************************************** #
23474 # a0 = pointer to the input extended precision value in memory. #
23475 # the input may be either normalized, unnormalized, or #
23476 # denormalized. #
23477 # d0 = contains the k-factor sign-extended to 32-bits. #
23478 # #
23479 # OUTPUT ************************************************************** #
23480 # FP_SCR0(a6) = bcd format result on the stack. #
23481 # #
23482 # ALGORITHM *********************************************************** #
23483 # #
23484 # A1. Set RM and size ext; Set SIGMA = sign of input. #
23485 # The k-factor is saved for use in d7. Clear the #
23486 # BINDEC_FLG for separating normalized/denormalized #
23487 # input. If input is unnormalized or denormalized, #
23488 # normalize it. #
23489 # #
23490 # A2. Set X = abs(input). #
23491 # #
23492 # A3. Compute ILOG. #
23493 # ILOG is the log base 10 of the input value. It is #
23494 # approximated by adding e + 0.f when the original #
23495 # value is viewed as 2^^e * 1.f in extended precision. #
23496 # This value is stored in d6. #
23497 # #
23498 # A4. Clr INEX bit. #
23499 # The operation in A3 above may have set INEX2. #
23500 # #
23501 # A5. Set ICTR = 0; #
23502 # ICTR is a flag used in A13. It must be set before the #
23503 # loop entry A6. #
23504 # #
23505 # A6. Calculate LEN. #
23506 # LEN is the number of digits to be displayed. The #
23507 # k-factor can dictate either the total number of digits, #
23508 # if it is a positive number, or the number of digits #
23509 # after the decimal point which are to be included as #
23510 # significant. See the 68882 manual for examples. #
23511 # If LEN is computed to be greater than 17, set OPERR in #
23512 # USER_FPSR. LEN is stored in d4. #
23513 # #
23514 # A7. Calculate SCALE. #
23515 # SCALE is equal to 10^ISCALE, where ISCALE is the number #
23516 # of decimal places needed to insure LEN integer digits #
23517 # in the output before conversion to bcd. LAMBDA is the #
23518 # sign of ISCALE, used in A9. Fp1 contains #
23519 # 10^^(abs(ISCALE)) using a rounding mode which is a #
23520 # function of the original rounding mode and the signs #
23521 # of ISCALE and X. A table is given in the code. #
23522 # #
23523 # A8. Clr INEX; Force RZ. #
23524 # The operation in A3 above may have set INEX2. #
23525 # RZ mode is forced for the scaling operation to insure #
23526 # only one rounding error. The grs bits are collected in #
23527 # the INEX flag for use in A10. #
23528 # #
23529 # A9. Scale X -> Y. #
23530 # The mantissa is scaled to the desired number of #
23531 # significant digits. The excess digits are collected #
23532 # in INEX2. #
23533 # #
23534 # A10. Or in INEX. #
23535 # If INEX is set, round error occurred. This is #
23536 # compensated for by 'or-ing' in the INEX2 flag to #
23537 # the lsb of Y. #
23538 # #
23539 # A11. Restore original FPCR; set size ext. #
23540 # Perform FINT operation in the user's rounding mode. #
23541 # Keep the size to extended. #
23542 # #
23543 # A12. Calculate YINT = FINT(Y) according to user's rounding #
23544 # mode. The FPSP routine sintd0 is used. The output #
23545 # is in fp0. #
23546 # #
23547 # A13. Check for LEN digits. #
23548 # If the int operation results in more than LEN digits, #
23549 # or less than LEN -1 digits, adjust ILOG and repeat from #
23550 # A6. This test occurs only on the first pass. If the #
23551 # result is exactly 10^LEN, decrement ILOG and divide #
23552 # the mantissa by 10. #
23553 # #
23554 # A14. Convert the mantissa to bcd. #
23555 # The binstr routine is used to convert the LEN digit #
23556 # mantissa to bcd in memory. The input to binstr is #
23557 # to be a fraction; i.e. (mantissa)/10^LEN and adjusted #
23558 # such that the decimal point is to the left of bit 63. #
23559 # The bcd digits are stored in the correct position in #
23560 # the final string area in memory. #
23561 # #
23562 # A15. Convert the exponent to bcd. #
23563 # As in A14 above, the exp is converted to bcd and the #
23564 # digits are stored in the final string. #
23565 # Test the length of the final exponent string. If the #
23566 # length is 4, set operr. #
23567 # #
23568 # A16. Write sign bits to final string. #
23569 # #
23570 #########################################################################
23574 # Constants in extended precision
23575 PLOG2:
23577 PLOG2UP1:
23580 # Constants in single precision
23581 FONE:
23583 FTWO:
23585 FTEN:
23587 F4933:
23590 RBDTBL:
23596 # Implementation Notes:
23597 #
23598 # The registers are used as follows:
23599 #
23600 # d0: scratch; LEN input to binstr
23601 # d1: scratch
23602 # d2: upper 32-bits of mantissa for binstr
23603 # d3: scratch;lower 32-bits of mantissa for binstr
23604 # d4: LEN
23605 # d5: LAMBDA/ICTR
23606 # d6: ILOG
23607 # d7: k-factor
23608 # a0: ptr for original operand/final result
23609 # a1: scratch pointer
23610 # a2: pointer to FP_X; abs(original value) in ext
23611 # fp0: scratch
23612 # fp1: scratch
23613 # fp2: scratch
23614 # F_SCR1:
23615 # F_SCR2:
23616 # L_SCR1:
23617 # L_SCR2:
23619 global bindec
23620 bindec:
23624 # A1. Set RM and size ext. Set SIGMA = sign input;
23625 # The k-factor is saved for use in d7. Clear BINDEC_FLG for
23626 # separating normalized/denormalized input. If the input
23627 # is a denormalized number, set the BINDEC_FLG memory word
23628 # to signal denorm. If the input is unnormalized, normalize
23629 # the input and test for denormalized result.
23630 #
23637 bne.w A2_str # no; input is a NORM
23639 #
23640 # Normalize the denorm
23641 #
23642 un_de_norm:
23647 norm_loop:
23652 bge.b norm_loop
23653 #
23654 # Test if the normalized input is denormalized
23655 #
23656 tst.w %d0
23659 pos_exp:
23665 # A2. Set X = abs(input).
23666 #
23667 A2_str:
23673 # A3. Compute ILOG.
23674 # ILOG is the log base 10 of the input value. It is approx-
23675 # imated by adding e + 0.f when the original value is viewed
23676 # as 2^^e * 1.f in extended precision. This value is stored
23677 # in d6.
23678 #
23679 # Register usage:
23680 # Input/Output
23681 # d0: k-factor/exponent
23682 # d2: x/x
23683 # d3: x/x
23684 # d4: x/x
23685 # d5: x/x
23686 # d6: x/ILOG
23687 # d7: k-factor/Unchanged
23688 # a0: ptr for original operand/final result
23689 # a1: x/x
23690 # a2: x/x
23691 # fp0: x/float(ILOG)
23692 # fp1: x/x
23693 # fp2: x/x
23694 # F_SCR1:x/x
23695 # F_SCR2:Abs(X)/Abs(X) with $3fff exponent
23696 # L_SCR1:x/x
23697 # L_SCR2:first word of X packed/Unchanged
23702 bra.b A4_str
23703 A3_cont:
23710 fbge.w pos_res # if pos, branch
23714 pos_res:
23719 # A4. Clr INEX bit.
23720 # The operation in A3 above may have set INEX2.
23722 A4_str:
23726 # A5. Set ICTR = 0;
23727 # ICTR is a flag used in A13. It must be set before the
23728 # loop entry A6. The lower word of d5 is used for ICTR.
23732 # A6. Calculate LEN.
23733 # LEN is the number of digits to be displayed. The k-factor
23734 # can dictate either the total number of digits, if it is
23735 # a positive number, or the number of digits after the
23736 # original decimal point which are to be included as
23737 # significant. See the 68882 manual for examples.
23738 # If LEN is computed to be greater than 17, set OPERR in
23739 # USER_FPSR. LEN is stored in d4.
23740 #
23741 # Register usage:
23742 # Input/Output
23743 # d0: exponent/Unchanged
23744 # d2: x/x/scratch
23745 # d3: x/x
23746 # d4: exc picture/LEN
23747 # d5: ICTR/Unchanged
23748 # d6: ILOG/Unchanged
23749 # d7: k-factor/Unchanged
23750 # a0: ptr for original operand/final result
23751 # a1: x/x
23752 # a2: x/x
23753 # fp0: float(ILOG)/Unchanged
23754 # fp1: x/x
23755 # fp2: x/x
23756 # F_SCR1:x/x
23757 # F_SCR2:Abs(X) with $3fff exponent/Unchanged
23758 # L_SCR1:x/x
23759 # L_SCR2:first word of X packed/Unchanged
23761 A6_str:
23766 k_neg:
23770 len_ck:
23780 LEN_ng:
23784 # A7. Calculate SCALE.
23785 # SCALE is equal to 10^ISCALE, where ISCALE is the number
23786 # of decimal places needed to insure LEN integer digits
23787 # in the output before conversion to bcd. LAMBDA is the sign
23788 # of ISCALE, used in A9. Fp1 contains 10^^(abs(ISCALE)) using
23789 # the rounding mode as given in the following table (see
23790 # Coonen, p. 7.23 as ref.; however, the SCALE variable is
23791 # of opposite sign in bindec.sa from Coonen).
23792 #
23793 # Initial USE
23794 # FPCR[6:5] LAMBDA SIGN(X) FPCR[6:5]
23795 # ----------------------------------------------
23796 # RN 00 0 0 00/0 RN
23797 # RN 00 0 1 00/0 RN
23798 # RN 00 1 0 00/0 RN
23799 # RN 00 1 1 00/0 RN
23800 # RZ 01 0 0 11/3 RP
23801 # RZ 01 0 1 11/3 RP
23802 # RZ 01 1 0 10/2 RM
23803 # RZ 01 1 1 10/2 RM
23804 # RM 10 0 0 11/3 RP
23805 # RM 10 0 1 10/2 RM
23806 # RM 10 1 0 10/2 RM
23807 # RM 10 1 1 11/3 RP
23808 # RP 11 0 0 10/2 RM
23809 # RP 11 0 1 11/3 RP
23810 # RP 11 1 0 11/3 RP
23811 # RP 11 1 1 10/2 RM
23812 #
23813 # Register usage:
23814 # Input/Output
23815 # d0: exponent/scratch - final is 0
23816 # d2: x/0 or 24 for A9
23817 # d3: x/scratch - offset ptr into PTENRM array
23818 # d4: LEN/Unchanged
23819 # d5: 0/ICTR:LAMBDA
23820 # d6: ILOG/ILOG or k if ((k<=0)&(ILOG<k))
23821 # d7: k-factor/Unchanged
23822 # a0: ptr for original operand/final result
23823 # a1: x/ptr to PTENRM array
23824 # a2: x/x
23825 # fp0: float(ILOG)/Unchanged
23826 # fp1: x/10^ISCALE
23827 # fp2: x/x
23828 # F_SCR1:x/x
23829 # F_SCR2:Abs(X) with $3fff exponent/Unchanged
23830 # L_SCR1:x/x
23831 # L_SCR2:first word of X packed/Unchanged
23833 A7_str:
23839 k_pos:
23853 no_inf:
23855 iscale:
23864 x_pos:
23874 not_rn:
23879 not_rp2:
23881 rmode:
23883 e_loop2:
23887 e_next2:
23892 # A8. Clr INEX; Force RZ.
23893 # The operation in A3 above may have set INEX2.
23894 # RZ mode is forced for the scaling operation to insure
23895 # only one rounding error. The grs bits are collected in
23896 # the INEX flag for use in A10.
23897 #
23898 # Register usage:
23899 # Input/Output
23904 # A9. Scale X -> Y.
23905 # The mantissa is scaled to the desired number of significant
23906 # digits. The excess digits are collected in INEX2. If mul,
23907 # Check d2 for excess 10 exponential value. If not zero,
23908 # the iscale value would have caused the pwrten calculation
23909 # to overflow. Only a negative iscale can cause this, so
23910 # multiply by 10^(d2), which is now only allowed to be 24,
23911 # with a multiply by 10^8 and 10^16, which is exact since
23912 # 10^24 is exact. If the input was denormalized, we must
23913 # create a busy stack frame with the mul command and the
23914 # two operands, and allow the fpu to complete the multiply.
23915 #
23916 # Register usage:
23917 # Input/Output
23918 # d0: FPCR with RZ mode/Unchanged
23919 # d2: 0 or 24/unchanged
23920 # d3: x/x
23921 # d4: LEN/Unchanged
23922 # d5: ICTR:LAMBDA
23923 # d6: ILOG/Unchanged
23924 # d7: k-factor/Unchanged
23925 # a0: ptr for original operand/final result
23926 # a1: ptr to PTENRM array/Unchanged
23927 # a2: x/x
23928 # fp0: float(ILOG)/X adjusted for SCALE (Y)
23929 # fp1: 10^ISCALE/Unchanged
23930 # fp2: x/x
23931 # F_SCR1:x/x
23932 # F_SCR2:Abs(X) with $3fff exponent/Unchanged
23933 # L_SCR1:x/x
23934 # L_SCR2:first word of X packed/Unchanged
23936 A9_str:
23942 bra.w A10_st # branch to A10
23944 sc_mul:
23946 beq.w A9_norm # if norm, continue with mul
23948 # for DENORM, we must calculate:
23949 # fp0 = input_op * 10^ISCALE * 10^24
23950 # since the input operand is a DENORM, we can't multiply it directly.
23951 # so, we do the multiplication of the exponents and mantissas separately.
23952 # in this way, we avoid underflow on intermediate stages of the
23953 # multiplication and guarantee a result without exception.
23966 bmi.w sc_mul_err # is result is DENORM, punt!!!
23977 # fmul.x 36(%a1),%fp0 # multiply fp0 by 10^8
23978 # fmul.x 48(%a1),%fp0 # multiply fp0 by 10^16
23987 bra.b A10_st
23989 sc_mul_err:
23990 bra.b sc_mul_err
23992 A9_norm:
23997 A9_con:
24000 # A10. Or in INEX.
24001 # If INEX is set, round error occurred. This is compensated
24002 # for by 'or-ing' in the INEX2 flag to the lsb of Y.
24003 #
24004 # Register usage:
24005 # Input/Output
24006 # d0: FPCR with RZ mode/FPSR with INEX2 isolated
24007 # d2: x/x
24008 # d3: x/x
24009 # d4: LEN/Unchanged
24010 # d5: ICTR:LAMBDA
24011 # d6: ILOG/Unchanged
24012 # d7: k-factor/Unchanged
24013 # a0: ptr for original operand/final result
24014 # a1: ptr to PTENxx array/Unchanged
24015 # a2: x/ptr to FP_SCR1(a6)
24016 # fp0: Y/Y with lsb adjusted
24017 # fp1: 10^ISCALE/Unchanged
24018 # fp2: x/x
24020 A10_st:
24030 # A11. Restore original FPCR; set size ext.
24031 # Perform FINT operation in the user's rounding mode. Keep
24032 # the size to extended. The sintdo entry point in the sint
24033 # routine expects the FPCR value to be in USER_FPCR for
24034 # mode and precision. The original FPCR is saved in L_SCR1.
24036 A11_st:
24039 # ;block exceptions
24042 # A12. Calculate YINT = FINT(Y) according to user's rounding mode.
24043 # The FPSP routine sintd0 is used. The output is in fp0.
24044 #
24045 # Register usage:
24046 # Input/Output
24047 # d0: FPSR with AINEX cleared/FPCR with size set to ext
24048 # d2: x/x/scratch
24049 # d3: x/x
24050 # d4: LEN/Unchanged
24051 # d5: ICTR:LAMBDA/Unchanged
24052 # d6: ILOG/Unchanged
24053 # d7: k-factor/Unchanged
24054 # a0: ptr for original operand/src ptr for sintdo
24055 # a1: ptr to PTENxx array/Unchanged
24056 # a2: ptr to FP_SCR1(a6)/Unchanged
24057 # a6: temp pointer to FP_SCR1(a6) - orig value saved and restored
24058 # fp0: Y/YINT
24059 # fp1: 10^ISCALE/Unchanged
24060 # fp2: x/x
24061 # F_SCR1:x/x
24062 # F_SCR2:Y adjusted for inex/Y with original exponent
24063 # L_SCR1:x/original USER_FPCR
24064 # L_SCR2:first word of X packed/Unchanged
24066 A12_st:
24076 do_fint12:
24078 # bsr sintdo # sint routine returns int in fp0
24082 ## mov.l USER_FPCR(%a6),%d0 # ext prec/keep rnd mode
24083 ## andi.l &0x00000030,%d0
24084 ## fmov.l %d0,%fpcr
24088 ## fmov.l &0x0,%fpcr
24089 ## fmov.l %fpsr,%d0 # don't keep ccodes
24090 ## or.w %d0,FPSR_EXCEPT(%a6)
24102 # A13. Check for LEN digits.
24103 # If the int operation results in more than LEN digits,
24104 # or less than LEN -1 digits, adjust ILOG and repeat from
24105 # A6. This test occurs only on the first pass. If the
24106 # result is exactly 10^LEN, decrement ILOG and divide
24107 # the mantissa by 10. The calculation of 10^LEN cannot
24108 # be inexact, since all powers of ten upto 10^27 are exact
24109 # in extended precision, so the use of a previous power-of-ten
24110 # table will introduce no error.
24111 #
24112 #
24113 # Register usage:
24114 # Input/Output
24115 # d0: FPCR with size set to ext/scratch final = 0
24116 # d2: x/x
24117 # d3: x/scratch final = x
24118 # d4: LEN/LEN adjusted
24119 # d5: ICTR:LAMBDA/LAMBDA:ICTR
24120 # d6: ILOG/ILOG adjusted
24121 # d7: k-factor/Unchanged
24122 # a0: pointer into memory for packed bcd string formation
24123 # a1: ptr to PTENxx array/Unchanged
24124 # a2: ptr to FP_SCR1(a6)/Unchanged
24125 # fp0: int portion of Y/abs(YINT) adjusted
24126 # fp1: 10^ISCALE/Unchanged
24127 # fp2: x/10^LEN
24128 # F_SCR1:x/x
24129 # F_SCR2:Y with original exponent/Unchanged
24130 # L_SCR1:original USER_FPCR/Unchanged
24131 # L_SCR2:first word of X packed/Unchanged
24133 A13_st:
24137 #
24138 # Compute 10^(LEN-1)
24139 #
24144 l_loop:
24148 l_next:
24152 #
24153 # 10^LEN-1 is computed for this test and A14. If the input was
24154 # denormalized, check only the case in which YINT > 10^LEN.
24155 #
24159 bra test_2
24160 #
24161 # Compare abs(YINT) to 10^(LEN-1) and 10^LEN
24162 #
24163 A13_con:
24166 fbge.w test_2 # if greater, do next test
24171 bra.w A6_str # return to A6 and recompute YINT
24172 test_2:
24175 fblt.w A14_st # if less, all is ok, go to A14
24176 fbgt.w fix_ex # if greater, fix and redo
24180 fix_ex:
24184 bra.w A6_str # return to A6 and recompute YINT
24185 #
24186 # Since ICTR <> 0, we have already been through one adjustment,
24187 # and shouldn't have another; this is to check if abs(YINT) = 10^LEN
24188 # 10^LEN is again computed using whatever table is in a1 since the
24189 # value calculated cannot be inexact.
24190 #
24191 not_zr:
24195 z_loop:
24199 z_next:
24205 fbneq.w A14_st # if not, skip this
24211 # A14. Convert the mantissa to bcd.
24212 # The binstr routine is used to convert the LEN digit
24213 # mantissa to bcd in memory. The input to binstr is
24214 # to be a fraction; i.e. (mantissa)/10^LEN and adjusted
24215 # such that the decimal point is to the left of bit 63.
24216 # The bcd digits are stored in the correct position in
24217 # the final string area in memory.
24218 #
24219 #
24220 # Register usage:
24221 # Input/Output
24222 # d0: x/LEN call to binstr - final is 0
24223 # d1: x/0
24224 # d2: x/ms 32-bits of mant of abs(YINT)
24225 # d3: x/ls 32-bits of mant of abs(YINT)
24226 # d4: LEN/Unchanged
24227 # d5: ICTR:LAMBDA/LAMBDA:ICTR
24228 # d6: ILOG
24229 # d7: k-factor/Unchanged
24230 # a0: pointer into memory for packed bcd string formation
24231 # /ptr to first mantissa byte in result string
24232 # a1: ptr to PTENxx array/Unchanged
24233 # a2: ptr to FP_SCR1(a6)/Unchanged
24234 # fp0: int portion of Y/abs(YINT) adjusted
24235 # fp1: 10^ISCALE/Unchanged
24236 # fp2: 10^LEN/Unchanged
24237 # F_SCR1:x/Work area for final result
24238 # F_SCR2:Y with original exponent/Unchanged
24239 # L_SCR1:original USER_FPCR/Unchanged
24240 # L_SCR2:first word of X packed/Unchanged
24242 A14_st:
24258 m_loop:
24262 no_sft:
24267 no_zr:
24272 zer_m:
24275 bsr binstr # call binstr to convert mant
24278 # A15. Convert the exponent to bcd.
24279 # As in A14 above, the exp is converted to bcd and the
24280 # digits are stored in the final string.
24281 #
24282 # Digits are stored in L_SCR1(a6) on return from BINDEC as:
24283 #
24284 # 32 16 15 0
24285 # -----------------------------------------
24286 # | 0 | e3 | e2 | e1 | e4 | X | X | X |
24287 # -----------------------------------------
24288 #
24289 # And are moved into their proper places in FP_SCR0. If digit e4
24290 # is non-zero, OPERR is signaled. In all cases, all 4 digits are
24291 # written as specified in the 881/882 manual for packed decimal.
24292 #
24293 # Register usage:
24294 # Input/Output
24295 # d0: x/LEN call to binstr - final is 0
24296 # d1: x/scratch (0);shift count for final exponent packing
24297 # d2: x/ms 32-bits of exp fraction/scratch
24298 # d3: x/ls 32-bits of exp fraction
24299 # d4: LEN/Unchanged
24300 # d5: ICTR:LAMBDA/LAMBDA:ICTR
24301 # d6: ILOG
24302 # d7: k-factor/Unchanged
24303 # a0: ptr to result string/ptr to L_SCR1(a6)
24304 # a1: ptr to PTENxx array/Unchanged
24305 # a2: ptr to FP_SCR1(a6)/Unchanged
24306 # fp0: abs(YINT) adjusted/float(ILOG)
24307 # fp1: 10^ISCALE/Unchanged
24308 # fp2: 10^LEN/Unchanged
24309 # F_SCR1:Work area for final result/BCD result
24310 # F_SCR2:Y with original exponent/ILOG/10^4
24311 # L_SCR1:original USER_FPCR/Exponent digits on return from binstr
24312 # L_SCR2:first word of X packed/Unchanged
24314 A15_st:
24316 beq.b not_denorm
24318 fbeq.w den_zero # if zero, use k-factor or 4933
24321 bra.b convrt
24322 den_zero:
24327 use_ilog:
24330 bra.b convrt
24331 not_denorm:
24333 fbneq.w not_zero # if zero, force exponent
24336 not_zero:
24339 convrt:
24348 x_loop:
24352 x_loop_fin:
24359 bsr binstr # call binstr to convert exp
24371 # A16. Write sign bits to final string.
24372 # Sigma is bit 31 of initial value; RHO is bit 31 of d6 (ILOG).
24373 #
24374 # Register usage:
24375 # Input/Output
24376 # d0: x/scratch - final is x
24377 # d2: x/x
24378 # d3: x/x
24379 # d4: LEN/Unchanged
24380 # d5: ICTR:LAMBDA/LAMBDA:ICTR
24381 # d6: ILOG/ILOG adjusted
24382 # d7: k-factor/Unchanged
24383 # a0: ptr to L_SCR1(a6)/Unchanged
24384 # a1: ptr to PTENxx array/Unchanged
24385 # a2: ptr to FP_SCR1(a6)/Unchanged
24386 # fp0: float(ILOG)/Unchanged
24387 # fp1: 10^ISCALE/Unchanged
24388 # fp2: 10^LEN/Unchanged
24389 # F_SCR1:BCD result with correct signs
24390 # F_SCR2:ILOG/10^4
24391 # L_SCR1:Exponent digits on return from binstr
24392 # L_SCR2:first word of X packed/Unchanged
24394 A16_st:
24400 mant_p:
24404 wr_sgn:
24407 # Clean up and restore all registers used.
24412 rts
24414 global PTENRN
24415 PTENRN:
24430 global PTENRP
24431 PTENRP:
24446 global PTENRM
24447 PTENRM:
24462 #########################################################################
24463 # binstr(): Converts a 64-bit binary integer to bcd. #
24464 # #
24465 # INPUT *************************************************************** #
24466 # d2:d3 = 64-bit binary integer #
24467 # d0 = desired length (LEN) #
24468 # a0 = pointer to start in memory for bcd characters #
24469 # (This pointer must point to byte 4 of the first #
24470 # lword of the packed decimal memory string.) #
24471 # #
24472 # OUTPUT ************************************************************** #
24473 # a0 = pointer to LEN bcd digits representing the 64-bit integer. #
24474 # #
24475 # ALGORITHM *********************************************************** #
24476 # The 64-bit binary is assumed to have a decimal point before #
24477 # bit 63. The fraction is multiplied by 10 using a mul by 2 #
24478 # shift and a mul by 8 shift. The bits shifted out of the #
24479 # msb form a decimal digit. This process is iterated until #
24480 # LEN digits are formed. #
24481 # #
24482 # A1. Init d7 to 1. D7 is the byte digit counter, and if 1, the #
24483 # digit formed will be assumed the least significant. This is #
24484 # to force the first byte formed to have a 0 in the upper 4 bits. #
24485 # #
24486 # A2. Beginning of the loop: #
24487 # Copy the fraction in d2:d3 to d4:d5. #
24488 # #
24489 # A3. Multiply the fraction in d2:d3 by 8 using bit-field #
24490 # extracts and shifts. The three msbs from d2 will go into d1. #
24491 # #
24492 # A4. Multiply the fraction in d4:d5 by 2 using shifts. The msb #
24493 # will be collected by the carry. #
24494 # #
24495 # A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5 #
24496 # into d2:d3. D1 will contain the bcd digit formed. #
24497 # #
24498 # A6. Test d7. If zero, the digit formed is the ms digit. If non- #
24499 # zero, it is the ls digit. Put the digit in its place in the #
24500 # upper word of d0. If it is the ls digit, write the word #
24501 # from d0 to memory. #
24502 # #
24503 # A7. Decrement d6 (LEN counter) and repeat the loop until zero. #
24504 # #
24505 #########################################################################
24507 # Implementation Notes:
24508 #
24509 # The registers are used as follows:
24510 #
24511 # d0: LEN counter
24512 # d1: temp used to form the digit
24513 # d2: upper 32-bits of fraction for mul by 8
24514 # d3: lower 32-bits of fraction for mul by 8
24515 # d4: upper 32-bits of fraction for mul by 2
24516 # d5: lower 32-bits of fraction for mul by 2
24517 # d6: temp for bit-field extracts
24518 # d7: byte digit formation word;digit count {0,1}
24519 # a0: pointer into memory for packed bcd string formation
24520 #
24522 global binstr
24523 binstr:
24526 #
24527 # A1: Init d7
24528 #
24531 #
24532 # A2. Copy d2:d3 to d4:d5. Start loop.
24533 #
24534 loop:
24537 #
24538 # A3. Multiply d2:d3 by 8; extract msbs into d1.
24539 #
24545 #
24546 # A4. Multiply d4:d5 by 2; add carry out to d1.
24547 #
24552 #
24553 # A5. Add mul by 8 to mul by 2. D1 contains the digit formed.
24554 #
24561 #
24562 # A6. Test d7 and branch.
24563 #
24566 sec_d:
24575 first_d:
24584 #
24585 # Clean up and return with result in fp0.
24586 #
24587 end_bstr:
24589 rts
24591 #########################################################################
24592 # XDEF **************************************************************** #
24593 # facc_in_b(): dmem_read_byte failed #
24594 # facc_in_w(): dmem_read_word failed #
24595 # facc_in_l(): dmem_read_long failed #
24596 # facc_in_d(): dmem_read of dbl prec failed #
24597 # facc_in_x(): dmem_read of ext prec failed #
24598 # #
24599 # facc_out_b(): dmem_write_byte failed #
24600 # facc_out_w(): dmem_write_word failed #
24601 # facc_out_l(): dmem_write_long failed #
24602 # facc_out_d(): dmem_write of dbl prec failed #
24603 # facc_out_x(): dmem_write of ext prec failed #
24604 # #
24605 # XREF **************************************************************** #
24606 # _real_access() - exit through access error handler #
24607 # #
24608 # INPUT *************************************************************** #
24609 # None #
24610 # #
24611 # OUTPUT ************************************************************** #
24612 # None #
24613 # #
24614 # ALGORITHM *********************************************************** #
24615 # Flow jumps here when an FP data fetch call gets an error #
24616 # result. This means the operating system wants an access error frame #
24617 # made out of the current exception stack frame. #
24618 # So, we first call restore() which makes sure that any updated #
24619 # -(an)+ register gets returned to its pre-exception value and then #
24620 # we change the stack to an acess error stack frame. #
24621 # #
24622 #########################################################################
24624 facc_in_b:
24626 bsr.w restore # fix An
24629 bra.w facc_finish
24631 facc_in_w:
24633 bsr.w restore # fix An
24636 bra.b facc_finish
24638 facc_in_l:
24640 bsr.w restore # fix An
24643 bra.b facc_finish
24645 facc_in_d:
24647 bsr.w restore # fix An
24650 bra.b facc_finish
24652 facc_in_x:
24654 bsr.w restore # fix An
24657 bra.b facc_finish
24659 ################################################################
24661 facc_out_b:
24663 bsr.w restore # restore An
24666 bra.b facc_finish
24668 facc_out_w:
24670 bsr.w restore # restore An
24673 bra.b facc_finish
24675 facc_out_l:
24677 bsr.w restore # restore An
24680 bra.b facc_finish
24682 facc_out_d:
24684 bsr.w restore # restore An
24687 bra.b facc_finish
24689 facc_out_x:
24691 bsr.w restore # restore An
24695 # here's where we actually create the access error frame from the
24696 # current exception stack frame.
24697 facc_finish:
24704 unlk %a6
24717 facc_out2:
24718 bra.l _real_access
24720 ##################################################################
24722 # if the effective addressing mode was predecrement or postincrement,
24723 # the emulation has already changed its value to the correct post-
24724 # instruction value. but since we're exiting to the access error
24725 # handler, then AN must be returned to its pre-instruction value.
24726 # we do that here.
24727 restore:
24731 beq.w rest_inc
24733 beq.w rest_dec
24734 rts
24736 rest_inc:
24743 tbl_rest_inc:
24744 short ri_a0 - tbl_rest_inc
24745 short ri_a1 - tbl_rest_inc
24746 short ri_a2 - tbl_rest_inc
24747 short ri_a3 - tbl_rest_inc
24748 short ri_a4 - tbl_rest_inc
24749 short ri_a5 - tbl_rest_inc
24750 short ri_a6 - tbl_rest_inc
24751 short ri_a7 - tbl_rest_inc
24753 ri_a0:
24755 rts
24756 ri_a1:
24758 rts
24759 ri_a2:
24761 rts
24762 ri_a3:
24764 rts
24765 ri_a4:
24767 rts
24768 ri_a5:
24770 rts
24771 ri_a6:
24773 rts
24774 # if it's a fmove out instruction, we don't have to fix a7
24775 # because we hadn't changed it yet. if it's an opclass two
24776 # instruction (data moved in) and the exception was in supervisor
24777 # mode, then also also wasn't updated. if it was user mode, then
24778 # restore the correct a7 which is in the USP currently.
24779 ri_a7:
24788 ri_a7_done:
24789 rts
24791 # need to invert adjustment value if the <ea> was predec
24792 rest_dec:
24794 bra.b rest_inc