arch/x86_64-all/include/aros/cpucontext.h

   1 #ifndef AROS_X86_64_CPUCONTEXT_H
   2 #define AROS_X86_64_CPUCONTEXT_H
   3
   4 /*
   5     Copyright © 1995-2010, The AROS Development Team. All rights reserved.
   6     $Id$
   7
   8     Desc: CPU context definition for x86-64 processors
   9     Lang: english
  10 */
  11
  12 typedef struct
  13 {
  14     UBYTE data[10];
  15     UBYTE pad[6];
  16 } MMReg;
  17
  18 typedef struct
  19 {
  20     UBYTE data[16];
  21 } XMMReg;
  22
  23 struct FPXContext
  24 {
  25     UWORD  fcw;
  26     UWORD  fsw;
  27     UWORD  ftw;
  28     UWORD  fop;
  29     ULONG  ip;
  30     ULONG  cs;
  31     ULONG  dp;
  32     ULONG  ds;
  33     ULONG  mxcsr;
  34     ULONG  pad;
  35     MMReg  mm[8];
  36     XMMReg xmm[16];
  37     XMMReg reserved[6];
  38 };
  39
  40 struct ExceptionContext
  41 {
  42     ULONG Flags;        /* Context flags                */
  43     ULONG Reserved;     /* Padding                      */
  44     UQUAD rax;
  45     UQUAD rbx;
  46     UQUAD rcx;
  47     UQUAD rdx;
  48     UQUAD rsi;
  49     UQUAD rdi;
  50     UQUAD r8;
  51     UQUAD r9;
  52     UQUAD r10;
  53     UQUAD r11;
  54     UQUAD r12;
  55     UQUAD r13;
  56     UQUAD r14;
  57     UQUAD r15;
  58     UQUAD rbp;
  59     UQUAD ds;           /* Segment registers are padded */
  60     UQUAD es;
  61     UQUAD fs;
  62     UQUAD gs;
  63     UQUAD rip;
  64     UQUAD cs;
  65     UQUAD rflags;
  66     UQUAD rsp;
  67     UQUAD ss;
  68
  69     struct FPXContext *FXData;  /* Pointer to SSE context area */
  70 };
  71
  72 enum enECFlags
  73 {
  74     ECF_SEGMENTS = 1<<0, /* Segment registers are present */
  75     ECF_FPX      = 1<<1, /* SSE context is present        */
  76 };
  77
  78 #endif