arch/x86_64-pc/kernel/tls.h

   1 #ifndef ASM_TLS_H
   2 #define ASM_TLS_H
   3
   4 #include <aros/config.h>
   5
   6 #if defined(__AROSEXEC_SMP__)
   7 #include <kernel_scheduler.h>
   8 #endif
   9
  10 #include "apic.h"
  11
  12 typedef struct tls
  13 {
  14     struct ExecBase             *SysBase;
  15     void                        *KernelBase;    /* Base of kernel.resource              */
  16 #if defined(__AROSEXEC_SMP__)
  17     struct X86SchedulerPrivate  *ScheduleData;
  18 #endif
  19     apicid_t                    CPUNumber;
  20 } tls_t;
  21
  22 #define TLSSF_Quantum   (1 << 0)
  23 #define TLSSF_Switch    (1 << 1)
  24 #define TLSSF_Dispatch  (1 << 2)
  25
  26 #define TLS_OFFSET(name) ((char *)&(((tls_t *)0)->name)-(char *)0)
  27
  28 #define TLS_GET(name) \
  29     ({ \
  30         tls_t *__tls = (tls_t *)0; \
  31         typeof(__tls -> name) __ret; \
  32         switch (sizeof(__tls -> name)) { \
  33 case 2: asm volatile("movw %%gs:%P1,%0":"=r"(__ret):"n"(TLS_OFFSET(name)):"memory"); break; \
  34 case 4: asm volatile("movl %%gs:%P1,%0":"=r"(__ret):"n"(TLS_OFFSET(name)):"memory"); break; \
  35 case 8: asm volatile("movq %%gs:%P1,%0":"=r"(__ret):"n"(TLS_OFFSET(name)):"memory"); break; \
  36         } \
  37         __ret;  \
  38     })
  39
  40 #define TLS_SET(name, val) \
  41     do { \
  42         tls_t *__tls = (tls_t *)0; \
  43         typeof(__tls -> name) __set = val; \
  44         switch (sizeof(__tls -> name)) { \
  45 case 2: asm volatile("movw %0,%%gs:%P1"::"r"(__set),"n"(TLS_OFFSET(name)):"memory"); break; \
  46 case 4: asm volatile("movl %0,%%gs:%P1"::"r"(__set),"n"(TLS_OFFSET(name)):"memory"); break; \
  47 case 8: asm volatile("movq %0,%%gs:%P1"::"r"(__set),"n"(TLS_OFFSET(name)):"memory"); break; \
  48         } \
  49     } while(0);
  50
  51 #endif