2 Copyright © 2004-2013, The AROS Development Team. All rights reserved.
5 Desc: PCI-DMA hardware definitions
12 * this **might** cause problems with PPC64, which **might** expect both to be 64bit.
20 #define PRDE_EOT 0x80000000
23 /* The single IDE bus (channel) */
27 struct PRDEntry
*ab_PRD
;
30 /* SFF-8038i DMA registers */
31 #define dma_Command 0x00
32 #define dma_Status 0x02
35 /* DMA command register */
36 #define DMA_READ 0x00 /* PCI *READS* from memory to drive */
37 #define DMA_WRITE 0x08 /* PCI *WRITES* to memory from drive */
38 #define DMA_START 0x01 /* DMA Start/Stop */
42 #define DMAB_Interrupt 2
43 #define DMAB_Simplex 7
45 #define DMAF_Active (1 << DMAB_Active)
46 #define DMAF_Error (1 << DMAB_Error)
47 #define DMAF_Interrupt (1 << DMAB_Interrupt)
48 #define DMAF_Simplex (1 << DMAB_Simplex)
50 extern const APTR dma_FuncTable
[];