rom/usb/classes/stir4200/stir4200.h

   1 #ifndef STIR4200_H
   2 #define STIR4200_H
   3
   4 #include <intuition/intuition.h>
   5 #include <intuition/intuitionbase.h>
   6 #include <libraries/mui.h>
   7 #include <libraries/gadtools.h>
   8 #include <exec/devices.h>
   9
  10 #if defined(__GNUC__)
  11 # pragma pack(2)
  12 #endif
  13
  14 #define ID_ABOUT        0x55555555
  15 #define ID_STORE_CONFIG 0xaaaaaaaa
  16 #define ID_DEF_CONFIG   0xaaaaaaab
  17
  18 struct ClsDevCfg
  19 {
  20     ULONG cdc_ChunkID;
  21     ULONG cdc_Length;
  22     ULONG cdc_StackAuto;
  23     ULONG cdc_DefaultUnit;
  24     ULONG cdc_RXSense;
  25     ULONG cdc_TXPower;
  26 };
  27
  28 #if defined(__GNUC__)
  29 # pragma pack()
  30 #endif
  31
  32 /* Misc */
  33
  34 #define STIR_IRDA_HEADER  4
  35 #define STIR_MIN_RTT 500
  36 #define STIR_IRDA_RXFRAME_LEN 64
  37 #define STIR_FIFO_SIZE 4096
  38 #define STIR_IDLE_TIMEOUT 10               /* milliseconds */
  39 #define STIR_IDLE_PERIODS 700              /* roughly 7 second idle window */
  40 #define STIR_MIN_SPEED_DELAY 75            /* milliseconds */
  41
  42 #define STIR_MAX_ACTIVE_RX_URBS   1       /* Don't touch !!! */
  43 #define STIR_MAX_RX_URBS  (STIR_MAX_ACTIVE_RX_URBS + 1)
  44
  45 #define USTR_WRITE_MULT   0x00         /* Val = Not used (0x0000), Idx = First register to write, Len = #regs */
  46 #define USTR_READ_MULT    0x01         /* Val = Not used (0x0000), Idx = First register to read,  Len = #regs */
  47 #define USTR_READ_ROM     0x02         /* Val = Not used (0x0000), Idx = Base ROM address (00-ff),  Len <= 64 */
  48 #define USTR_WRITE_REG    0x03         /* Val = LSB contains data, Idx = Reg to write, Len = 0 */
  49
  50                                /*     7         6          5         4          3         2          1         0   */
  51 #define STREG_FIFODAT     0x00 /*                                     Reserved                                     */
  52 #define STREG_MODE        0x01 /*     FIR    Reserved     SIR       ASK     FASTRXEN   FFRSTEN    FFSPRST PDCLK(8) */
  53 #define STREG_BAUDRATE    0x02 /*                                   PDCLK(7: 0)                                    */
  54 #define STREG_CTRL        0x03 /*  SDMODE    RXSLOW      DLOOP1    TXPWD      RXPWD       TXPWR(1: 0)       SRESET */
  55 #define STREG_SENSITIVITY 0x04 /*          RXDSNS(2: 0)          BSTUFF SPWIDTH          ID(2)     ID(1)     ID(0) */
  56 #define STREG_STATUS      0x05 /*  EOFRAME   FFUNDER     FFOVER    FFDIR      FFCLR    FFEMPTY    FFRXERR FFTXERR  */
  57 #define STREG_FIFOCNT_L   0x06 /*                                    FFCNT(7:0)                                    */
  58 #define STREG_FIFOCNT_H   0x07 /*     0         0          0                         FFCNT(12: 8)                  */
  59 #define STREG_DPLLTUNE    0x08 /*                          DPCNT(5: 0)                               LONGP(1: 0)   */
  60 #define STREG_IRDIG       0x09 /*   RXHIGH   TXLOW     Reserved Reserved Reserved      Reserved Reserved Reserved  */
  61 #define STREG_TEST        0x0f /*  PLLDWN    LOOPIR LOOPUSB TSTENA                       TSTOSC(3: 0)              */
  62
  63 /* STREG_MODE */
  64 #define SMF_FIR           0x80
  65 #define SMF_SIR           0x20
  66 #define SMF_ASK           0x10
  67 #define SMF_FASTRXEN      0x08
  68 #define SMF_FASTRSTEN     0x04
  69 #define SMF_FFSPRST       0x02
  70 #define SMF_PDCLK8        0x01
  71
  72 /* STREG_BAUDRATE */
  73 #define PDCLK_4000000     0x002
  74 #define PDCLK_115200      0x009
  75 #define PDCLK_57600       0x013
  76 #define PDCLK_38400       0x01D
  77 #define PDCLK_19200       0x03B
  78 #define PDCLK_9600        0x077
  79 #define PDCLK_2400        0x1DF
  80
  81 /* STREG_CTRL */
  82 #define SCF_SDMODE        0x80
  83 #define SCF_RXSLOW        0x40
  84 #define SCF_DLOOP1        0x20
  85 #define SCF_TXPWD         0x10
  86 #define SCF_RXPWD         0x08
  87 #define SCF_TXPWR_LOW     0x06
  88 #define SCF_TXPWR_MEDLOW  0x04
  89 #define SCF_TXPWR_MEDHIGH 0x02
  90 #define SCF_TXPWR_HIGH    0x00
  91 #define SCF_SRESET        0x01
  92
  93 /* STREG_SENSITIVITY */
  94 #define SSB_RXDSNS           5
  95 #define SSF_BSTUFF        0x10
  96 #define SSF_SPWIDTH       0x08
  97 #define SSM_ID            0x07
  98
  99 /* STREG_STATUS */
 100 #define SSF_EOF           0x80
 101 #define SSF_FFUNDER       0x40
 102 #define SSF_FFOVER        0x20
 103 #define SSF_FFDIR         0x10
 104 #define SSF_FFCLR         0x08
 105 #define SSF_FFEMPTY       0x04
 106 #define SSF_FFRXERR       0x02
 107 #define SSF_FFTXERR       0x01
 108
 109 /* STREG_IRDIG */
 110 #define SIF_RXHIGH        0x80
 111 #define SIF_TXLOW         0x40
 112
 113 /* STREG_TEST */
 114 #define STF_PLLDOWN       0x80
 115 #define STF_LOOPIR        0x40
 116 #define STF_LOOPUSB       0x20
 117 #define STF_TSTENA        0x10
 118 #define STM_TSTOSC        0x0f
 119
 120 #define DEFBUFFERSIZE 4096
 121
 122 struct NepSTIrDevBase
 123 {
 124     struct Library      np_Library;       /* standard */
 125     UWORD               np_Flags;         /* various flags */
 126
 127     BPTR                np_SegList;       /* device seglist */
 128     struct NepSTIr4200Base *np_ClsBase;    /* pointer to class base */
 129     struct Library     *np_UtilityBase;   /* utility base */
 130 };
 131
 132 struct NepClassSTIr4200
 133 {
 134     struct Unit         ncp_Unit;         /* Unit structure */
 135     ULONG               ncp_UnitNo;       /* Unit number */
 136     struct NepSTIr4200Base *ncp_ClsBase;  /* Up linkage */
 137     struct NepSTIrDevBase *ncp_DevBase;    /* Device base */
 138     struct Library     *ncp_Base;         /* Poseidon base */
 139     struct PsdDevice   *ncp_Device;       /* Up linkage */
 140     struct PsdConfig   *ncp_Config;       /* Up linkage */
 141     struct PsdInterface *ncp_Interface;   /* Up linkage */
 142     struct Task        *ncp_ReadySigTask; /* Task to send ready signal to */
 143     LONG                ncp_ReadySignal;  /* Signal to send when ready */
 144     struct Task        *ncp_Task;         /* Subtask */
 145     struct MsgPort     *ncp_TaskMsgPort;  /* Message Port of Subtask */
 146
 147     struct PsdPipe     *ncp_EP0Pipe;      /* Endpoint 0 pipe */
 148     struct PsdEndpoint *ncp_EPOut;        /* Endpoint 1 */
 149     struct PsdPipe     *ncp_EPOutPipe;    /* Endpoint 1 pipe */
 150     struct PsdEndpoint *ncp_EPIn;         /* Endpoint 2 */
 151     struct PsdPipe     *ncp_EPInPipe;     /* Endpoint 2 pipe */
 152     IPTR                ncp_EPInMaxPktSize; /* Endpoint 2 max pkt size */
 153     struct MsgPort     *ncp_DevMsgPort;   /* Message Port for IOParReq */
 154     UWORD               ncp_UnitProdID;   /* ProductID of unit */
 155     UWORD               ncp_UnitVendorID; /* VendorID of unit */
 156     BOOL                ncp_DenyRequests; /* Do not accept further IO requests */
 157     UBYTE              *ncp_ReadBuffer;   /* Read Buffer Address */
 158     UBYTE              *ncp_WriteBuffer;  /* Read Buffer Address */
 159     BOOL                ncp_AbortRead;    /* if true, abort pending read */
 160     BOOL                ncp_AbortWrite;   /* if true, abort pending write */
 161
 162     BOOL                ncp_FrameStarted; /* on receive: has frame started yet? */
 163     BOOL                ncp_UnescapeFirst; /* pending escape from previous packet */
 164     BOOL                ncp_FIRMode;      /* Fast Mode or slow mode */
 165     ULONG               ncp_BaudRate;     /* Last set baudrate */
 166
 167     ULONG               ncp_RBufRemain;   /* Remaining bytes in read buffer */
 168     ULONG               ncp_RBufOffset;   /* Offset in readbuffer */
 169
 170     struct IOIrDAReq   *ncp_ReadPending;  /* read IORequest pending */
 171     struct IOIrDAReq   *ncp_WritePending; /* write IORequest pending */
 172     struct List         ncp_ReadQueue;    /* List of read requests */
 173     struct List         ncp_WriteQueue;   /* List of write requests */
 174
 175     STRPTR              ncp_DevIDString;  /* Device ID String */
 176
 177     BOOL                ncp_UsingDefaultCfg;
 178     struct ClsDevCfg   *ncp_CDC;
 179
 180     struct Library     *ncp_MUIBase;       /* MUI master base */
 181     struct Library     *ncp_PsdBase;       /* Poseidon base */
 182     struct Library     *ncp_IntBase;       /* Intuition base */
 183     struct Task        *ncp_GUITask;       /* GUI Task */
 184     struct NepClassHid *ncp_GUIBinding;    /* Window of binding that's open */
 185
 186     Object             *ncp_App;
 187     Object             *ncp_MainWindow;
 188
 189     Object             *ncp_UnitObj;
 190     Object             *ncp_StackAutoObj;
 191
 192     Object             *ncp_UseObj;
 193     Object             *ncp_SetDefaultObj;
 194     Object             *ncp_CloseObj;
 195
 196     Object             *ncp_AboutMI;
 197     Object             *ncp_UseMI;
 198     Object             *ncp_SetDefaultMI;
 199     Object             *ncp_MUIPrefsMI;
 200
 201 };
 202
 203 struct NepSTIr4200Base
 204 {
 205     struct Library      nh_Library;       /* standard */
 206     UWORD               nh_Flags;         /* various flags */
 207
 208     struct Library     *nh_UtilityBase;   /* utility base */
 209
 210     struct NepSTIrDevBase *nh_DevBase;       /* base of device created */
 211     struct List         nh_Units;         /* List of units available */
 212
 213     struct NepClassSTIr4200 nh_DummyNCP;     /* Dummy ncp for default config */
 214 };
 215
 216
 217 #endif /* STIR4200_H */