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revert between 56095 -> 55830 in arch
[AROS.git] / workbench / devs / networks / sis900 / sis900.h
blobcb372d9f97e21e2bc2010f0ee4466b5622856dd6
1 #ifndef _SIS900_H
2 #define _SIS900_H
3
4 /*
5 * $Id$
6 */
7
8 /*
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful, but
15 WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
23 */
24
25 #define DEBUG 0
26
27 #include <exec/types.h>
28 #include <exec/libraries.h>
29 #include <exec/semaphores.h>
30 #include <exec/devices.h>
31 #include <exec/interrupts.h>
32 #include <dos/bptr.h>
33
34 #include <oop/oop.h>
35
36 #include <hidd/pci.h>
37
38 #include <devices/timer.h>
39 #include <devices/sana2.h>
40 #include <devices/sana2specialstats.h>
41
42 #include <proto/exec.h>
43 #include <aros/debug.h>
44
45 #include LC_LIBDEFS_FILE
46
47 #define SiS900_TASK_NAME "%s.task"
48 #define SiS900_PORT_NAME "%s.port"
49
50 /** Operational parameters that are set at compile time **/
51 #define ETH_ZLEN 60 // Min. octets in frame sans FCS
52
53 #define NUM_TX_DESC 16 /* Number of Tx descriptor registers. */
54 #define NUM_RX_DESC 16 /* Number of Rx descriptor registers. */
55
56 /** Device Driver Structures **/
57
58 struct SiS900Base {
59 struct Device sis900b_Device;
60
61 OOP_Object *sis900b_PCI;
62 OOP_AttrBase sis900b_PCIDeviceAttrBase;
63
64 ULONG sis900b_UnitCount;
65 struct List sis900b_Units;
66 };
67
68 #undef HiddPCIDeviceAttrBase
69 #define HiddPCIDeviceAttrBase (LIBBASE->sis900b_PCIDeviceAttrBase)
70
71 struct SiS900Startup
72 {
73 struct MsgPort *sis900sm_SyncPort;
74 struct SiS900Unit *sis900sm_Unit;
75 };
76
77 enum {
78 WRITE_QUEUE,
79 ADOPT_QUEUE,
80 EVENT_QUEUE,
81 GENERAL_QUEUE,
82 REQUEST_QUEUE_COUNT
83 };
84
85 struct Opener
86 {
87 struct MinNode node;
88 struct MsgPort read_port;
89 BOOL (*rx_function)(APTR, APTR, ULONG);
90 BOOL (*tx_function)(APTR, APTR, ULONG);
91 struct Hook *filter_hook;
92 struct MinList initial_stats;
93 };
94
95 struct TypeStats
96 {
97 struct MinNode node;
98 ULONG packet_type;
99 struct Sana2PacketTypeStats stats;
100 };
101
102
103 struct TypeTracker
104 {
105 struct MinNode node;
106 ULONG packet_type;
107 struct Sana2PacketTypeStats stats;
108 ULONG user_count;
109 };
110
111
112 struct AddressRange
113 {
114 struct MinNode node;
115 ULONG add_count;
116 ULONG lower_bound_left;
117 ULONG upper_bound_left;
118 UWORD lower_bound_right;
119 UWORD upper_bound_right;
120 };
121
122 /* SiS900 Specific Structs */
123
124 struct mii_phy {
125 struct mii_phy *next;
126 int phy_addr;
127 UWORD phy_id0;
128 UWORD phy_id1;
129 UWORD status;
130 UBYTE phy_types;
131 };
132
133 typedef struct _BufferDesc {
134 ULONG link;
135 ULONG cmdsts;
136 ULONG bufptr;
137 } BufferDesc;
138
139 #define SANA2_SPECIAL_STAT_COUNT 3
140
141 /* Per-Unit Device struct */
142 struct SiS900Unit {
143 struct MinNode sis900u_Node;
144
145 struct SiS900Base *sis900u_device;
146
147 STRPTR sis900u_name;
148
149 ULONG sis900u_UnitNum;
150 IPTR sis900u_DriverFlags;
151
152 OOP_Object *sis900u_PCIDevice;
153 OOP_Object *sis900u_PCIDriver;
154 IPTR sis900u_IRQ;
155 BOOL sis900u_IntsAdded;
156
157 int sis900u_open_count;
158 struct SignalSemaphore sis900u_unit_lock;
159
160 LONG sis900u_range_count;
161 struct MinList sis900u_Openers;
162 struct MinList sis900u_multicast_ranges;
163 struct MinList sis900u_type_trackers;
164
165 ULONG sis900u_mtu;
166 ULONG sis900u_ifflags;
167 struct Sana2DeviceQuery sis900u_Sana2Info;
168 struct Sana2DeviceStats sis900u_stats;
169 ULONG sis900u_special_stats[SANA2_SPECIAL_STAT_COUNT];
170
171 struct Process *sis900u_Process;
172
173 struct MsgPort *sis900u_input_port;
174
175 struct MsgPort *sis900u_request_ports[REQUEST_QUEUE_COUNT];
176
177 struct Interrupt sis900u_irqhandler;
178 struct Interrupt sis900u_touthandler;
179
180 struct MsgPort *sis900u_TimerSlowPort;
181 struct timerequest *sis900u_TimerSlowReq;
182
183 struct MsgPort *sis900u_TimerFastPort;
184 struct timerequest *sis900u_TimerFastReq;
185
186 struct MsgPort e1ku_DelayPort;
187 struct timerequest e1ku_DelayReq;
188
189 char *sis900u_rtl_cardname;
190 char *sis900u_rtl_chipname;
191
192 IPTR sis900u_DeviceID;
193 IPTR sis900u_RevisionID;
194 IPTR sis900u_HostRevisionID;
195 IPTR sis900u_BaseMem;
196 IPTR sis900u_SizeMem;
197 IPTR sis900u_BaseIO;
198
199 BYTE sis900u_signal_0;
200 BYTE sis900u_signal_1;
201 BYTE sis900u_signal_2;
202 BYTE sis900u_signal_3;
203
204 UBYTE sis900u_dev_addr[6];
205 UWORD sis900u_org_addr[3];
206
207 struct Interrupt sis900u_rx_int;
208 struct Interrupt sis900u_tx_int;
209
210 ULONG sis900u_state;
211 APTR sis900u_mc_list;
212
213 /* SiS900 - New!! */
214 APTR tx_buffers[NUM_TX_DESC];
215 APTR rx_buffers[NUM_RX_DESC];
216
217 BufferDesc *tx_ring;
218 BufferDesc *rx_ring;
219
220 APTR tx_ring_dma;
221 APTR rx_ring_dma;
222
223 struct mii_phy *mii;
224 struct mii_phy *first_mii; /* record the first mii structure */
225 unsigned int cur_phy;
226
227 unsigned int tx_full; /* The Tx queue is full. */
228
229 unsigned int cur_rx,
230 dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
231 unsigned int cur_tx,
232 dirty_tx;
233
234 UBYTE autong_complete; /* 1: auto-negotiate complete */
235 };
236
237 void handle_request(LIBBASETYPEPTR, struct IOSana2Req *);
238
239 /* Media selection options. */
240 enum {
241 IF_PORT_UNKNOWN = 0,
242 IF_PORT_10BASE2,
243 IF_PORT_10BASET,
244 IF_PORT_AUI,
245 IF_PORT_100BASET,
246 IF_PORT_100BASETX,
247 IF_PORT_100BASEFX
248 };
249
250 /* These flag bits are private to the generic network queueing
251 * layer, they may not be explicitly referenced by any other
252 * code.
253 */
254
255 enum netdev_state_t
256 {
257 __LINK_STATE_XOFF=0,
258 __LINK_STATE_START,
259 __LINK_STATE_PRESENT,
260 __LINK_STATE_SCHED,
261 __LINK_STATE_NOCARRIER,
262 __LINK_STATE_RX_SCHED,
263 __LINK_STATE_LINKWATCH_PENDING
264 };
265
266 static inline int test_bit(int nr, const volatile ULONG *addr)
267 {
268 return ((1UL << (nr & 31)) & (addr[nr >> 5])) != 0;
269 }
270
271 static inline void set_bit(int nr, volatile ULONG *addr)
272 {
273 addr[nr >> 5] |= 1UL << (nr & 31);
274 }
275
276 static inline void clear_bit(int nr, volatile ULONG *addr)
277 {
278 addr[nr >> 5] &= ~(1UL << (nr & 31));
279 }
280
281 static inline int test_and_set_bit(int nr, volatile ULONG *addr)
282 {
283 int oldbit = test_bit(nr, addr);
284 set_bit(nr, addr);
285 return oldbit;
286 }
287
288 static inline int test_and_clear_bit(int nr, volatile ULONG *addr)
289 {
290 int oldbit = test_bit(nr, addr);
291 clear_bit(nr, addr);
292 return oldbit;
293 }
294
295 static inline void netif_schedule(struct SiS900Unit *unit)
296 {
297 if (!test_bit(__LINK_STATE_XOFF, &unit->sis900u_state)) {
298 Cause(&unit->sis900u_tx_int);
299 }
300 }
301
302 static inline void netif_start_queue(struct SiS900Unit *unit)
303 {
304 clear_bit(__LINK_STATE_XOFF, &unit->sis900u_state);
305 }
306
307 static inline void netif_wake_queue(struct SiS900Unit *unit)
308 {
309 if (test_and_clear_bit(__LINK_STATE_XOFF, &unit->sis900u_state)) {
310 Cause(&unit->sis900u_tx_int);
311 }
312 }
313
314 static inline void netif_stop_queue(struct SiS900Unit *unit)
315 {
316 set_bit(__LINK_STATE_XOFF, &unit->sis900u_state);
317 }
318
319 static inline int netif_queue_stopped(const struct SiS900Unit *unit)
320 {
321 return test_bit(__LINK_STATE_XOFF, &unit->sis900u_state);
322 }
323
324 static inline int netif_running(const struct SiS900Unit *unit)
325 {
326 return test_bit(__LINK_STATE_START, &unit->sis900u_state);
327 }
328
329 static inline int netif_carrier_ok(const struct SiS900Unit *unit)
330 {
331 return !test_bit(__LINK_STATE_NOCARRIER, &unit->sis900u_state);
332 }
333
334 extern void __netdev_watchdog_up(struct SiS900Unit *unit);
335
336 static inline void netif_carrier_on(struct SiS900Unit *unit)
337 {
338 if (test_and_clear_bit(__LINK_STATE_NOCARRIER, &unit->sis900u_state)) {
339 // linkwatch_fire_event(unit);
340 }
341 if (netif_running(unit)) {
342 // __netdev_watchdog_up(unit);
343 }
344 }
345
346 static inline void netif_carrier_off(struct SiS900Unit *unit)
347 {
348 if (!test_and_set_bit(__LINK_STATE_NOCARRIER, &unit->sis900u_state)) {
349 // linkwatch_fire_event(unit);
350 }
351 }
352
353 /* Standard interface flags (netdevice->flags). */
354 #define IFF_UP 0x1 /* interface is up */
355 #define IFF_BROADCAST 0x2 /* broadcast address valid */
356 #define IFF_DEBUG 0x4 /* turn on debugging */
357 #define IFF_LOOPBACK 0x8 /* is a loopback net */
358 #define IFF_POINTOPOINT 0x10 /* interface is has p-p link */
359 #define IFF_NOTRAILERS 0x20 /* avoid use of trailers */
360 #define IFF_RUNNING 0x40 /* resources allocated */
361 #define IFF_NOARP 0x80 /* no ARP protocol */
362 #define IFF_PROMISC 0x100 /* receive all packets */
363 #define IFF_ALLMULTI 0x200 /* receive all multicast packets*/
364
365 #define IFF_MASTER 0x400 /* master of a load balancer */
366 #define IFF_SLAVE 0x800 /* slave of a load balancer */
367
368 #define IFF_MULTICAST 0x1000 /* Supports multicast */
369
370 #define IFF_VOLATILE (IFF_LOOPBACK|IFF_POINTOPOINT|IFF_BROADCAST|IFF_MASTER|IFF_SLAVE|IFF_RUNNING)
371
372 #define IFF_PORTSEL 0x2000 /* can set media type */
373 #define IFF_AUTOMEDIA 0x4000 /* auto media select active */
374 #define IFF_DYNAMIC 0x8000 /* dialup device with changing addresses*/
375 #define IFF_SHARED 0x10000 /* interface may be shared */
376 #define IFF_CONFIGURED 0x20000 /* interface already configured */
377
378 /*
379 * We tag multicasts with these structures.
380 */
381
382 #define MAX_ADDR_LEN 32
383
384 struct dev_mc_list
385 {
386 struct dev_mc_list *next;
387 UBYTE dmi_addr[MAX_ADDR_LEN];
388 unsigned char dmi_addrlen;
389 int dmi_users;
390 int dmi_gusers;
391 };
392
393 /* ENET defines */
394
395 #define HZ 1000000
396 #define ETH_DATA_LEN 1500
397
398 #define ETH_ADDRESSSIZE 6
399 #define ETH_HEADERSIZE 14
400 #define ETH_CRCSIZE 4
401 #define ETH_MTU (ETH_DATA_LEN)
402 #define ETH_MAXPACKETSIZE ((ETH_HEADERSIZE) + (ETH_MTU) + (ETH_CRCSIZE))
403
404 #define ETH_PACKET_DEST 0
405 #define ETH_PACKET_SOURCE 6
406 #define ETH_PACKET_TYPE 12
407 #define ETH_PACKET_IEEELEN 12
408 #define ETH_PACKET_SNAPTYPE 20
409 #define ETH_PACKET_DATA 14
410 #define ETH_PACKET_CRC (ETH_PACKET_DATA + ETH_MTU)
411
412 #define RXTX_ALLOC_BUFSIZE (ETH_MAXPACKETSIZE + 26)
413
414 #define TX_LIMIT_STOP 63
415 #define TX_LIMIT_START 62
416
417 struct eth_frame {
418 UBYTE eth_packet_dest[6];
419 UBYTE eth_packet_source[6];
420 UWORD eth_packet_type;
421 UBYTE eth_packet_data[ETH_MTU];
422 UBYTE eth_packet_crc[4];
423 UBYTE eth_pad[RXTX_ALLOC_BUFSIZE - ETH_MAXPACKETSIZE];
424 } __attribute__((packed));
425 #define eth_packet_ieeelen eth_packet_type
426
427 /* ***************************** */
428 /* SiS900 DEFINES */
429 /* ***************************** */
430
431 /* The I/O extent, SiS 900 needs 256 bytes of io address */
432 #define SIS900_TOTAL_SIZE 0x100
433
434 /* Symbolic offsets to registers. */
435 enum sis900_registers {
436 cr=0x0, //Command Register
437 cfg=0x4, //Configuration Register
438 mear=0x8, //EEPROM Access Register
439 ptscr=0xc, //PCI Test Control Register
440 isr=0x10, //Interrupt Status Register
441 imr=0x14, //Interrupt Mask Register
442 ier=0x18, //Interrupt Enable Register
443 epar=0x18, //Enhanced PHY Access Register
444 txdp=0x20, //Transmit Descriptor Pointer Register
445 txcfg=0x24, //Transmit Configuration Register
446 rxdp=0x30, //Receive Descriptor Pointer Register
447 rxcfg=0x34, //Receive Configuration Register
448 flctrl=0x38, //Flow Control Register
449 rxlen=0x3c, //Receive Packet Length Register
450 rfcr=0x48, //Receive Filter Control Register
451 rfdr=0x4C, //Receive Filter Data Register
452 pmctrl=0xB0, //Power Management Control Register
453 pmer=0xB4 //Power Management Wake-up Event Register
454 };
455
456 /* Symbolic names for bits in various registers */
457 enum sis900_command_register_bits {
458 RELOAD = 0x00000400, ACCESSMODE = 0x00000200,/* ET */
459 RESET = 0x00000100, SWI = 0x00000080, RxRESET = 0x00000020,
460 TxRESET = 0x00000010, RxDIS = 0x00000008, RxENA = 0x00000004,
461 TxDIS = 0x00000002, TxENA = 0x00000001
462 };
463
464 enum sis900_configuration_register_bits {
465 DESCRFMT = 0x00000100 /* 7016 specific */, REQALG = 0x00000080,
466 SB = 0x00000040, POW = 0x00000020, EXD = 0x00000010,
467 PESEL = 0x00000008, LPM = 0x00000004, BEM = 0x00000001,
468 /* 635 & 900B Specific */
469 RND_CNT = 0x00000400, FAIR_BACKOFF = 0x00000200,
470 EDB_MASTER_EN = 0x00002000
471 };
472
473 enum sis900_eeprom_access_reigster_bits {
474 MDC = 0x00000040, MDDIR = 0x00000020, MDIO = 0x00000010, /* 7016 specific */
475 EECS = 0x00000008, EECLK = 0x00000004, EEDO = 0x00000002,
476 EEDI = 0x00000001
477 };
478
479 enum sis900_interrupt_register_bits {
480 WKEVT = 0x10000000, TxPAUSEEND = 0x08000000, TxPAUSE = 0x04000000,
481 TxRCMP = 0x02000000, RxRCMP = 0x01000000, DPERR = 0x00800000,
482 SSERR = 0x00400000, RMABT = 0x00200000, RTABT = 0x00100000,
483 RxSOVR = 0x00010000, HIBERR = 0x00008000, SWINT = 0x00001000,
484 MIBINT = 0x00000800, TxURN = 0x00000400, TxIDLE = 0x00000200,
485 TxERR = 0x00000100, TxDESC = 0x00000080, TxOK = 0x00000040,
486 RxORN = 0x00000020, RxIDLE = 0x00000010, RxEARLY = 0x00000008,
487 RxERR = 0x00000004, RxDESC = 0x00000002, RxOK = 0x00000001
488 };
489
490 enum sis900_interrupt_enable_reigster_bits {
491 IE = 0x00000001
492 };
493
494 /* maximum dma burst for transmission and receive */
495 #define MAX_DMA_RANGE 7 /* actually 0 means MAXIMUM !! */
496 #define TxMXDMA_shift 20
497 #define RxMXDMA_shift 20
498
499 enum sis900_tx_rx_dma{
500 DMA_BURST_512 = 0, DMA_BURST_64 = 5
501 };
502
503 /* transmit FIFO thresholds */
504 #define TX_FILL_THRESH 16 /* 1/4 FIFO size */
505 #define TxFILLT_shift 8
506 #define TxDRNT_shift 0
507 #define TxDRNT_100 48 /* 3/4 FIFO size */
508 #define TxDRNT_10 16 /* 1/2 FIFO size */
509
510 enum sis900_transmit_config_register_bits {
511 TxCSI = 0x80000000, TxHBI = 0x40000000, TxMLB = 0x20000000,
512 TxATP = 0x10000000, TxIFG = 0x0C000000, TxFILLT = 0x00003F00,
513 TxDRNT = 0x0000003F
514 };
515
516 /* recevie FIFO thresholds */
517 #define RxDRNT_shift 1
518 #define RxDRNT_100 16 /* 1/2 FIFO size */
519 #define RxDRNT_10 24 /* 3/4 FIFO size */
520
521 enum sis900_reveive_config_register_bits {
522 RxAEP = 0x80000000, RxARP = 0x40000000, RxATX = 0x10000000,
523 RxAJAB = 0x08000000, RxDRNT = 0x0000007F
524 };
525
526 #define RFAA_shift 28
527 #define RFADDR_shift 16
528
529 enum sis900_receive_filter_control_register_bits {
530 RFEN = 0x80000000, RFAAB = 0x40000000, RFAAM = 0x20000000,
531 RFAAP = 0x10000000, RFPromiscuous = (RFAAB|RFAAM|RFAAP)
532 };
533
534 enum sis900_reveive_filter_data_mask {
535 RFDAT = 0x0000FFFF
536 };
537
538 /* EEPROM Addresses */
539 enum sis900_eeprom_address {
540 EEPROMSignature = 0x00, EEPROMVendorID = 0x02, EEPROMDeviceID = 0x03,
541 EEPROMMACAddr = 0x08, EEPROMChecksum = 0x0b
542 };
543
544 /* The EEPROM commands include the alway-set leading bit. Refer to NM93Cxx datasheet */
545 enum sis900_eeprom_command {
546 EEread = 0x0180, EEwrite = 0x0140, EEerase = 0x01C0,
547 EEwriteEnable = 0x0130, EEwriteDisable = 0x0100,
548 EEeraseAll = 0x0120, EEwriteAll = 0x0110,
549 EEaddrMask = 0x013F, EEcmdShift = 16
550 };
551
552 /* For SiS962 or SiS963, request the eeprom software access */
553 enum sis96x_eeprom_command {
554 EEREQ = 0x00000400, EEDONE = 0x00000200, EEGNT = 0x00000100
555 };
556
557 /* Management Data I/O (mdio) frame */
558 #define MIIread 0x6000
559 #define MIIwrite 0x5002
560 #define MIIpmdShift 7
561 #define MIIregShift 2
562 #define MIIcmdLen 16
563 #define MIIcmdShift 16
564
565 /* Buffer Descriptor Status*/
566 enum sis900_buffer_status {
567 OWN = 0x80000000, MORE = 0x40000000, INTR = 0x20000000,
568 SUPCRC = 0x10000000, INCCRC = 0x10000000,
569 OK = 0x08000000, DSIZE = 0x00000FFF
570 };
571 /* Status for TX Buffers */
572 enum sis900_tx_buffer_status {
573 ABORT = 0x04000000, UNDERRUN = 0x02000000, NOCARRIER = 0x01000000,
574 DEFERD = 0x00800000, EXCDEFER = 0x00400000, OWCOLL = 0x00200000,
575 EXCCOLL = 0x00100000, COLCNT = 0x000F0000
576 };
577
578 enum sis900_rx_bufer_status {
579 OVERRUN = 0x02000000, DEST = 0x00800000, BCAST = 0x01800000,
580 MCAST = 0x01000000, UNIMATCH = 0x00800000, TOOLONG = 0x00400000,
581 RUNT = 0x00200000, RXISERR = 0x00100000, CRCERR = 0x00080000,
582 FAERR = 0x00040000, LOOPBK = 0x00020000, RXCOL = 0x00010000
583 };
584
585 /* MII register offsets */
586 enum mii_registers {
587 MII_CONTROL = 0x0000, MII_STATUS = 0x0001, MII_PHY_ID0 = 0x0002,
588 MII_PHY_ID1 = 0x0003, MII_ANADV = 0x0004, MII_ANLPAR = 0x0005,
589 MII_ANEXT = 0x0006
590 };
591
592 /* mii registers specific to SiS 900 */
593 enum sis_mii_registers {
594 MII_CONFIG1 = 0x0010, MII_CONFIG2 = 0x0011, MII_STSOUT = 0x0012,
595 MII_MASK = 0x0013, MII_RESV = 0x0014
596 };
597
598 /* mii registers specific to ICS 1893 */
599 enum ics_mii_registers {
600 MII_EXTCTRL = 0x0010, MII_QPDSTS = 0x0011, MII_10BTOP = 0x0012,
601 MII_EXTCTRL2 = 0x0013
602 };
603
604 /* mii registers specific to AMD 79C901 */
605 enum amd_mii_registers {
606 MII_STATUS_SUMMARY = 0x0018
607 };
608
609 /* MII Control register bit definitions. */
610 enum mii_control_register_bits {
611 MII_CNTL_FDX = 0x0100, MII_CNTL_RST_AUTO = 0x0200,
612 MII_CNTL_ISOLATE = 0x0400, MII_CNTL_PWRDWN = 0x0800,
613 MII_CNTL_AUTO = 0x1000, MII_CNTL_SPEED = 0x2000,
614 MII_CNTL_LPBK = 0x4000, MII_CNTL_RESET = 0x8000
615 };
616
617 /* MII Status register bit */
618 enum mii_status_register_bits {
619 MII_STAT_EXT = 0x0001, MII_STAT_JAB = 0x0002,
620 MII_STAT_LINK = 0x0004, MII_STAT_CAN_AUTO = 0x0008,
621 MII_STAT_FAULT = 0x0010, MII_STAT_AUTO_DONE = 0x0020,
622 MII_STAT_CAN_T = 0x0800, MII_STAT_CAN_T_FDX = 0x1000,
623 MII_STAT_CAN_TX = 0x2000, MII_STAT_CAN_TX_FDX = 0x4000,
624 MII_STAT_CAN_T4 = 0x8000
625 };
626
627 #define MII_ID1_OUI_LO 0xFC00 /* low bits of OUI mask */
628 #define MII_ID1_MODEL 0x03F0 /* model number */
629 #define MII_ID1_REV 0x000F /* model number */
630
631 /* MII NWAY Register Bits ...
632 valid for the ANAR (Auto-Negotiation Advertisement) and
633 ANLPAR (Auto-Negotiation Link Partner) registers */
634 enum mii_nway_register_bits {
635 MII_NWAY_NODE_SEL = 0x001f, MII_NWAY_CSMA_CD = 0x0001,
636 MII_NWAY_T = 0x0020, MII_NWAY_T_FDX = 0x0040,
637 MII_NWAY_TX = 0x0080, MII_NWAY_TX_FDX = 0x0100,
638 MII_NWAY_T4 = 0x0200, MII_NWAY_PAUSE = 0x0400,
639 MII_NWAY_RF = 0x2000, MII_NWAY_ACK = 0x4000,
640 MII_NWAY_NP = 0x8000
641 };
642
643 enum mii_stsout_register_bits {
644 MII_STSOUT_LINK_FAIL = 0x4000,
645 MII_STSOUT_SPD = 0x0080, MII_STSOUT_DPLX = 0x0040
646 };
647
648 enum mii_stsics_register_bits {
649 MII_STSICS_SPD = 0x8000, MII_STSICS_DPLX = 0x4000,
650 MII_STSICS_LINKSTS = 0x0001
651 };
652
653 enum mii_stssum_register_bits {
654 MII_STSSUM_LINK = 0x0008, MII_STSSUM_DPLX = 0x0004,
655 MII_STSSUM_AUTO = 0x0002, MII_STSSUM_SPD = 0x0001
656 };
657
658 enum sis900_revision_id {
659 SIS630A_900_REV = 0x80, SIS630E_900_REV = 0x81,
660 SIS630S_900_REV = 0x82, SIS630EA1_900_REV = 0x83,
661 SIS630ET_900_REV = 0x84, SIS635A_900_REV = 0x90,
662 SIS96x_900_REV = 0X91, SIS900B_900_REV = 0x03
663 };
664
665 enum sis630_revision_id {
666 SIS630A0 = 0x00, SIS630A1 = 0x01,
667 SIS630B0 = 0x10, SIS630B1 = 0x11
668 };
669
670 #define FDX_CAPABLE_DUPLEX_UNKNOWN 0
671 #define FDX_CAPABLE_HALF_SELECTED 1
672 #define FDX_CAPABLE_FULL_SELECTED 2
673
674 #define HW_SPEED_UNCONFIG 0
675 #define HW_SPEED_HOME 1
676 #define HW_SPEED_10_MBPS 10
677 #define HW_SPEED_100_MBPS 100
678 #define HW_SPEED_DEFAULT (HW_SPEED_100_MBPS)
679
680 #define CRC_SIZE 4
681 #define MAC_HEADER_SIZE 14
682
683 #define TX_BUF_SIZE 1536
684 #define RX_BUF_SIZE 1536
685
686 #define TX_TOTAL_SIZE NUM_TX_DESC*sizeof(BufferDesc)
687 #define RX_TOTAL_SIZE NUM_RX_DESC*sizeof(BufferDesc)
688
689 int mdio_read(struct SiS900Unit *, int, int);
690
691 void sis900func_initialize(struct SiS900Unit *);
692 void sis900func_deinitialize(struct SiS900Unit *);
693 int sis900func_open(struct SiS900Unit *);
694 int sis900func_close(struct SiS900Unit *);
695 void sis900func_set_mac(struct SiS900Unit *);
696 void sis900func_set_multicast(struct SiS900Unit *);
697
698 #endif
699
Mirror of AROS' svn.