2 Copyright 2010, The AROS Development Team. All rights reserved.
8 #include <proto/exec.h>
10 #include <aros/debug.h>
12 #include "agp_private.h"
14 #undef HiddAGPBridgeDeviceAttrBase
15 #define HiddAGPBridgeDeviceAttrBase (SD(cl)->hiddAGPBridgeDeviceAB)
17 #define AGP_INTEL_NBXCFG 0x50
18 #define AGP_INTEL_CTRL 0xb0
19 #define AGP_INTEL_APER_SIZE 0xb4
20 #define AGP_INTEL_GATT_BASE 0xb8
22 #define AGP_INTEL_I845_AGPM 0x51
23 #define AGP_INTEL_I845_ERRSTS 0xc8
25 #define IS_845_BRIDGE(x) \
27 (x == 0x2570) || /* 82865_HB */ \
28 (x == 0x1a30) || /* 82845_HB */ \
29 (x == 0x2560) || /* 82845G_HB */ \
30 (x == 0x358c) || /* 82854_HB */ \
31 (x == 0x3340) || /* 82855PM_HB */ \
32 (x == 0x3580) || /* 82855GM_HB */ \
33 (x == 0x2578) /* 82875_HB */ \
37 OOP_Object
* METHOD(i845BridgeDevice
, Root
, New
)
39 o
= (OOP_Object
*)OOP_DoSuperMethod(cl
, o
, (OOP_Msg
) msg
);
45 BOOL
METHOD(i845BridgeDevice
, Hidd_AGPBridgeDevice
, Initialize
)
47 struct HIDDGenericBridgeDeviceData
* gbddata
=
48 OOP_INST_DATA(SD(cl
)->genericBridgeDeviceClass
, o
);
50 struct pHidd_AGPBridgeDevice_ScanAndDetectDevices saddmsg
= {
51 mID
: OOP_GetMethodID(IID_Hidd_AGPBridgeDevice
, moHidd_AGPBridgeDevice_ScanAndDetectDevices
)
54 D(ULONG major
, minor
;)
55 OOP_Object
* bridgedev
= NULL
;
56 UBYTE bridgeagpcap
= 0;
57 UBYTE aperture_size_value
= 0;
61 /* Scan for bridge and agp devices */
62 if (!OOP_DoMethod(o
, (OOP_Msg
)&saddmsg
))
65 /* Check if bridge is a supported Intel bridge */
66 if (gbddata
->bridge
->VendorID
!= 0x8086)
68 if (!IS_845_BRIDGE(gbddata
->bridge
->ProductID
))
71 bridgedev
= gbddata
->bridge
->PciDevice
;
72 bridgeagpcap
= gbddata
->bridge
->AgpCapability
;
74 /* Getting version info */
75 D(major
= (readconfigbyte(bridgedev
, bridgeagpcap
+ AGP_VERSION_REG
) >> 4) & 0xf);
76 D(minor
= readconfigbyte(bridgedev
, bridgeagpcap
+ AGP_VERSION_REG
) & 0xf);
78 D(bug("[AGP] [Intel 845] Read config: AGP version %d.%d\n", major
, minor
));
81 gbddata
->bridgemode
= readconfiglong(bridgedev
, bridgeagpcap
+ AGP_STATUS_REG
);
83 D(bug("[AGP] [Intel 845] Reading mode: 0x%x\n", gbddata
->bridgemode
));
85 gbddata
->memmask
= 0x00000017;
91 /* Getting GART size */
92 aperture_size_value
= readconfigbyte(bridgedev
, AGP_INTEL_APER_SIZE
);
93 D(bug("[AGP] [Intel 845] Reading aperture size value: %x\n", aperture_size_value
));
95 switch(aperture_size_value
)
97 case(63): gbddata
->bridgeapersize
= 4; break;
98 case(62): gbddata
->bridgeapersize
= 8; break;
99 case(60): gbddata
->bridgeapersize
= 16; break;
100 case(56): gbddata
->bridgeapersize
= 32; break;
101 case(48): gbddata
->bridgeapersize
= 64; break;
102 case(32): gbddata
->bridgeapersize
= 128; break;
103 case(0): gbddata
->bridgeapersize
= 256; break;
104 default: gbddata
->bridgeapersize
= 0; break;
107 D(bug("[AGP] [Intel 845] Calculated aperture size: %d MB\n", (ULONG
)gbddata
->bridgeapersize
));
109 /* Creation of GATT table */
110 struct pHidd_AGPBridgeDevice_CreateGattTable cgtmsg
= {
111 mID
: OOP_GetMethodID(IID_Hidd_AGPBridgeDevice
, moHidd_AGPBridgeDevice_CreateGattTable
)
113 if (!OOP_DoMethod(o
, (OOP_Msg
)&cgtmsg
))
117 /* Getting GART base */
118 gbddata
->bridgeaperbase
= (IPTR
)readconfiglong(bridgedev
, AGP_APER_BASE
);
119 gbddata
->bridgeaperbase
&= (~0x0fUL
) /* PCI_BASE_ADDRESS_MEM_MASK */;
120 D(bug("[AGP] [Intel 845] Reading aperture base: 0x%x\n", (ULONG
)(IPTR
)gbddata
->bridgeaperbase
));
122 /* Set GATT pointer */
123 writeconfiglong(bridgedev
, AGP_INTEL_GATT_BASE
, (ULONG
)(IPTR
)gbddata
->gatttable
);
124 D(bug("[AGP] [Intel 845] Set GATT pointer to 0x%x\n", (ULONG
)(IPTR
)gbddata
->gatttable
));
126 /* Control register */
127 writeconfiglong(bridgedev
, AGP_INTEL_CTRL
, 0x00000000);
130 agpm
= readconfigbyte(bridgedev
, AGP_INTEL_I845_AGPM
);
131 writeconfigbyte(bridgedev
, AGP_INTEL_I845_AGPM
, agpm
| (1 << 1));
133 /* Clear error conditions */
134 writeconfigword(bridgedev
, AGP_INTEL_I845_ERRSTS
, 0x001c);
136 gbddata
->state
= STATE_INITIALIZED
;
141 VOID
METHOD(i845BridgeDevice
, Hidd_AGPBridgeDevice
, FlushChipset
)