workbench/devs/networks/prism2/encryption_68k.s

   1 /*
   2
   3 Copyright (C) 2011 Neil Cafferkey
   4
   5 This program is free software; you can redistribute it and/or modify
   6 it under the terms of the GNU General Public License as published by
   7 the Free Software Foundation; either version 2 of the License, or
   8 (at your option) any later version.
   9
  10 This program is distributed in the hope that it will be useful, but
  11 WITHOUT ANY WARRANTY; without even the implied warranty of
  12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13 General Public License for more details.
  14
  15 You should have received a copy of the GNU General Public License
  16 along with this program; if not, write to the Free Software
  17 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18 MA 02111-1307, USA.
  19
  20 */
  21
  22
  23 /****i* prism2.device/UpdateMIC ********************************************
  24 *
  25 *   NAME
  26 *       UpdateMIC -- Include new data into a Michael MIC value.
  27 *
  28 *   SYNOPSIS
  29 *       UpdateMIC(left, right, data, count)
  30 *
  31 *       VOID UpdateMIC(ULONG *, ULONG *, ULONG *, ULONG);
  32 *
  33 *   INTERNALS
  34 *       Register assignment relative to C implementation:
  35 *
  36 *       d2: l
  37 *       d3: r
  38 *       d4: count
  39 *       a2: left
  40 *       a3: right
  41 *       a4: data
  42 *
  43 ****************************************************************************
  44 *
  45 */
  46
  47         .globl  _UpdateMIC
  48
  49 _UpdateMIC:
  50
  51         /* Anchor stack arguments */
  52
  53         link    a5,#0
  54
  55         /* Push registers that should be preserved on to stack */
  56
  57         movem.l d2-d7/a2-a4,-(sp)
  58
  59         /* Apply transformation */
  60
  61         movea.l (8,a5),a2
  62         movea.l (12,a5),a3
  63         movea.l (16,a5),a4
  64         move.l  (20,a5),d4
  65         subq.w  #1,d4
  66
  67         move.l  (a2),d2
  68         move.l  (a3),d3
  69
  70 mic_loop$:
  71
  72         move.l  (a4)+,d0
  73         rol.w   #8,d0
  74         swap.w  d0
  75         rol.w   #8,d0
  76         eor.l   d0,d2
  77
  78         move.l  d2,d0
  79         swap.w  d0
  80         rol.l   #1,d0
  81         eor.l   d0,d3
  82
  83         add.l   d3,d2
  84
  85         move.l  d2,d0
  86         rol.w   #8,d0
  87         swap.w  d0
  88         rol.w   #8,d0
  89         swap.w  d0
  90         eor.l   d0,d3
  91
  92         add.l   d3,d2
  93
  94         move.l  d2,d0
  95         rol.l   #3,d0
  96         eor.l   d0,d3
  97
  98         add.l   d3,d2
  99
 100         move.l  d2,d0
 101         ror.l   #2,d0
 102         eor.l   d0,d3
 103
 104         add.l   d3,d2
 105
 106         dbra    d4,mic_loop$
 107
 108         /* Store new left and right values */
 109
 110         move.l  d2,(a2)
 111         move.l  d3,(a3)
 112
 113         /* Pop preserved registers off stack and return with original SP */
 114
 115         movem.l (sp)+,d2-d7/a2-a4
 116         unlk    a5
 117         rts
 118
 119
 120
 121
 122 /****i* prism2.device/TKIPKeyMix2 ******************************************
 123 *
 124 *   NAME
 125 *       TKIPKeyMix2 -- Apply phase 2 of the TKIP key-mixing function.
 126 *
 127 *   SYNOPSIS
 128 *       TKIPKeyMix2(rc4_seed, ttak, tk, iv16)
 129 *
 130 *       VOID TKIPKeyMix2(UBYTE *, UWORD *, UWORD *, UWORD);
 131 *
 132 *   INTERNALS
 133 *       Register assignment relative to C implementation:
 134 *
 135 *       d4: iv16
 136 *       a0: temp_key
 137 *       a1: sbox
 138 *       a2: rc4_seed
 139 *       a3: ttak
 140 *       a4: tk
 141 *
 142 ****************************************************************************
 143 *
 144 */
 145
 146         .globl  _TKIPKeyMix2
 147
 148 _TKIPKeyMix2:
 149
 150         /* Anchor stack arguments */
 151
 152         link    a5,#0
 153
 154         /* Push registers that should be preserved on to stack */
 155
 156         movem.l d2-d7/a2-a4,-(sp)
 157
 158         /* --- */
 159
 160         movea.l (12,a5),a3
 161
 162         move.l  (a3)+,d5
 163         move.l  (a3)+,d6
 164         move.w  (a3)+,d7
 165
 166         move.w  d7,d1
 167         move.w  (22,a5),d4
 168         add.w   d4,d1
 169         swap.w  d7
 170         move.w  d1,d7
 171
 172         movea.l (16,a5),a4
 173         lea     _sbox,a1
 174
 175         /* --- */
 176
 177         move.w  (a4)+,d0
 178         eor.w   d0,d1
 179         moveq   #0,d2
 180         move.b  d1,d2
 181         lsr.w   #8,d1
 182         lsl.w   #1,d2
 183         move.w  (a1,d2:w),d0
 184         lsl.w   #1,d1
 185         move.w  (a1,d1:w),d1
 186         rol.w   #8,d1
 187         eor.w   d0,d1
 188         swap.w  d5
 189         add.w   d1,d5
 190
 191         move.w  (a4)+,d1
 192         eor.w   d5,d1
 193         moveq   #0,d2
 194         move.b  d1,d2
 195         lsr.w   #8,d1
 196         lsl.w   #1,d2
 197         move.w  (a1,d2:w),d0
 198         lsl.w   #1,d1
 199         move.w  (a1,d1:w),d1
 200         rol.w   #8,d1
 201         eor.w   d0,d1
 202         swap.w  d5
 203         add.w   d1,d5
 204
 205         move.w  (a4)+,d1
 206         eor.w   d5,d1
 207         moveq   #0,d2
 208         move.b  d1,d2
 209         lsr.w   #8,d1
 210         lsl.w   #1,d2
 211         move.w  (a1,d2:w),d0
 212         lsl.w   #1,d1
 213         move.w  (a1,d1:w),d1
 214         rol.w   #8,d1
 215         eor.w   d0,d1
 216         swap.w  d6
 217         add.w   d1,d6
 218
 219         move.w  (a4)+,d1
 220         eor.w   d6,d1
 221         moveq   #0,d2
 222         move.b  d1,d2
 223         lsr.w   #8,d1
 224         lsl.w   #1,d2
 225         move.w  (a1,d2:w),d0
 226         lsl.w   #1,d1
 227         move.w  (a1,d1:w),d1
 228         rol.w   #8,d1
 229         eor.w   d0,d1
 230         swap.w  d6
 231         add.w   d1,d6
 232
 233         move.w  (a4)+,d1
 234         eor.w   d6,d1
 235         moveq   #0,d2
 236         move.b  d1,d2
 237         lsr.w   #8,d1
 238         lsl.w   #1,d2
 239         move.w  (a1,d2:w),d0
 240         lsl.w   #1,d1
 241         move.w  (a1,d1:w),d1
 242         rol.w   #8,d1
 243         eor.w   d0,d1
 244         swap.w  d7
 245         add.w   d1,d7
 246
 247         move.w  (a4)+,d1
 248         eor.w   d7,d1
 249         moveq   #0,d2
 250         move.b  d1,d2
 251         lsr.w   #8,d1
 252         lsl.w   #1,d2
 253         move.w  (a1,d2:w),d0
 254         lsl.w   #1,d1
 255         move.w  (a1,d1:w),d1
 256         rol.w   #8,d1
 257         eor.w   d0,d1
 258         swap.w  d7
 259         add.w   d1,d7
 260
 261         /* --- */
 262
 263         move.w  (a4)+,d0
 264         eor.w   d7,d0
 265         ror.w   #1,d0
 266         swap.w  d5
 267         add.w   d0,d5
 268
 269         move.w  (a4)+,d0
 270         eor.w   d5,d0
 271         ror.w   #1,d0
 272         swap.w  d5
 273         add.w   d5,d0
 274         move.w  d0,d5
 275
 276         ror.w   #1,d0
 277         swap.w  d6
 278         add.w   d6,d0
 279         move.w  d0,d6
 280
 281         ror.w   #1,d0
 282         swap.w  d6
 283         add.w   d6,d0
 284         move.w  d0,d6
 285
 286         ror.w   #1,d0
 287         swap.w  d7
 288         add.w   d7,d0
 289         move.w  d0,d7
 290
 291         ror.w   #1,d0
 292         swap.w  d7
 293         add.w   d7,d0
 294         move.w  d0,d7
 295
 296         /* Write RC4 seed */
 297
 298         movea.l (8,a5),a2
 299
 300         move.w  d4,d1
 301         rol.w   #8,d1
 302         move.b  d1,(a2)+
 303         ori.b   #0x20,d1
 304         andi.b  #0x7f,d1
 305         move.b  d1,(a2)+
 306         move.b  d4,(a2)+
 307
 308         movea.l (16,a5),a4
 309         move.w  (a4),d1
 310         eor.w   d1,d0
 311         lsr.w   #1,d0
 312         move.b  d0,(a2)+
 313
 314         moveq   #5,d3
 315
 316         rol.w   #8,d5
 317         swap.w  d5
 318         rol.w   #8,d5
 319         swap.w  d5
 320         move.l  d5,(a2)+
 321
 322         rol.w   #8,d6
 323         swap.w  d6
 324         rol.w   #8,d6
 325         swap.w  d6
 326         move.l  d6,(a2)+
 327
 328         rol.w   #8,d7
 329         swap.w  d7
 330         rol.w   #8,d7
 331         swap.w  d7
 332         move.l  d7,(a2)+
 333
 334         /* Pop preserved registers off stack and return with original SP */
 335
 336         movem.l (sp)+,d2-d7/a2-a4
 337         unlk    a5
 338         rts
 339
 340
 341
 342 /****i* prism2.device/RC4Encrypt *******************************************
 343 *
 344 *   NAME
 345 *       RC4Encrypt -- Encrypt data using the RC4 cipher, and append CRC.
 346 *
 347 *   SYNOPSIS
 348 *       RC4Encrypt(unit, data, size, buffer, seed)
 349 *
 350 *       VOID RC4Encrypt(struct DevUnit *, UBYTE *, UWORD, UBYTE *, UBYTE *);
 351 *
 352 *   NOTES
 353 *       The input data may overlap the output buffer as long as the output
 354 *       address is not higher than the input address.
 355 *
 356 *   INTERNALS
 357 *       Register assignment relative to C implementation:
 358 *
 359 *       d2: n, i
 360 *       d3: j
 361 *       d4: "k"
 362 *       d5: crc
 363 *       a0: data
 364 *       a1: buffer
 365 *       a2: s
 366 *       a3: seed, crc32
 367 *
 368 ****************************************************************************
 369 *
 370 */
 371
 372         .globl  _RC4Encrypt
 373
 374 _RC4Encrypt:
 375
 376         /* Anchor stack arguments and make space for S table */
 377
 378         link    a5,#-256
 379
 380         /* Push registers that should be preserved on to stack */
 381
 382         movem.l d2-d7/a2-a4,-(sp)
 383
 384         /* Initialise RC4 state */
 385
 386         move.l  #0x00010203,d2
 387         lea     (-256,a5),a2
 388         movea.l a2,a0
 389
 390 preinit_state$:
 391
 392         move.l  d2,(a0)+
 393         add.l   #0x04040404,d2
 394         bcc.b   preinit_state$
 395
 396         moveq   #0,d2
 397         moveq   #0,d3
 398         move.w  #255,d4
 399         movea.l (24,a5),a3
 400         movea.l a2,a0
 401
 402 init_state$:
 403
 404         move.b  (a0),d0
 405         andi.w  #0xf,d2
 406         add.b   (a3,d2:w),d3
 407         add.b   d0,d3
 408
 409         move.b  (a2,d3:w),(a0)+
 410         move.b  d0,(a2,d3:w)
 411
 412         addq.b  #1,d2
 413         dbra    d4,init_state$
 414
 415         /* Encrypt data and calculate CRC */
 416
 417         moveq   #0,d1
 418         moveq   #0,d2
 419         moveq   #0,d3
 420         move.w  (18,a5),d4
 421         subq.w  #1,d4
 422         moveq   #-1,d5
 423         moveq   #0,d6
 424         movea.l (12,a5),a0
 425         movea.l (20,a5),a1
 426         lea     _crc32,a3
 427
 428 encrypt$:
 429
 430         /* Encrypt a byte */
 431
 432         addq.b  #1,d2
 433         move.b  (a2,d2:w),d0
 434         add.b   d0,d3
 435
 436         move.b  (a2,d3:w),d1
 437         move.b  d1,(a2,d2:w)
 438         move.b  d0,(a2,d3:w)
 439
 440         add.b   d0,d1
 441         move.b  (a0)+,d0
 442         move.b  (a2,d1:w),d1
 443         eor.b   d0,d1
 444         move.b  d1,(a1)+
 445
 446         /* Update CRC */
 447
 448         eor.l   d5,d0
 449         andi.l  #0xff,d0
 450         lsl.l   #2,d0
 451         move.l  (a3,d0:w),d0
 452         lsr.l   #8,d5
 453         eor.l   d0,d5
 454
 455         dbra    d4,encrypt$
 456
 457         /* Check if CRC has been encrypted */
 458
 459         tst.b   d6
 460         bne.b   crc_done$
 461         moveq   #1,d6
 462
 463         /* Copy CRC complement to buffer, then go back and encrypt it */
 464
 465         not.l   d5
 466         rol.w   #8,d5
 467         swap.w  d5
 468         rol.w   #8,d5
 469         move.l  d5,(a1)
 470
 471         movea.l a1,a0
 472         moveq   #3,d4
 473         bra.b   encrypt$
 474
 475 crc_done$:
 476
 477         /* Pop preserved registers off stack and return with original SP */
 478
 479         movem.l (sp)+,d2-d7/a2-a4
 480         unlk    a5
 481         rts
 482
 483
 484
 485 /****i* prism2.device/RC4Decrypt *******************************************
 486 *
 487 *   NAME
 488 *       RC4Decrypt -- Decrypt data using the RC4 cipher, and check CRC.
 489 *
 490 *   SYNOPSIS
 491 *       success = RC4Encrypt(unit, data, size, buffer, seed)
 492 *
 493 *       BOOL RC4Decrypt(struct DevUnit *, UBYTE *, UWORD, UBYTE *, UBYTE *);
 494 *
 495 *   NOTES
 496 *       The input data may overlap the output buffer as long as the output
 497 *       address is not higher than the input address.
 498 *
 499 *       The output buffer must be at least as big as the input data.
 500 *
 501 *   INTERNALS
 502 *       This implementation skips the CRC/ICV check in order to gain speed.
 503 *
 504 *       Register assignment relative to C implementation:
 505 *
 506 *       d2: n, i
 507 *       d3: j
 508 *       a0: data
 509 *       a1: buffer
 510 *       a2: s
 511 *       a3: seed
 512 *
 513 ****************************************************************************
 514 *
 515 */
 516
 517         .globl  _RC4Decrypt
 518
 519 _RC4Decrypt:
 520
 521         /* Anchor stack arguments and make space for S table */
 522
 523         link    a5,#-256
 524
 525         /* Push registers that should be preserved on to stack */
 526
 527         movem.l d2-d7/a2-a4,-(sp)
 528
 529         /* Initialise RC4 state */
 530
 531         move.l  #0x00010203,d2
 532         lea     (-256,a5),a2
 533         movea.l a2,a0
 534
 535 preinit_state2$:
 536
 537         move.l  d2,(a0)+
 538         add.l   #0x04040404,d2
 539         bcc.b   preinit_state2$
 540
 541         moveq   #0,d2
 542         moveq   #0,d3
 543         move.w  #255,d4
 544         movea.l (24,a5),a3
 545         movea.l a2,a0
 546
 547 init_state2$:
 548
 549         move.b  (a0),d0
 550         andi.w  #0xf,d2
 551         add.b   (a3,d2:w),d3
 552         add.b   d0,d3
 553
 554         move.b  (a2,d3:w),(a0)+
 555         move.b  d0,(a2,d3:w)
 556
 557         addq.b  #1,d2
 558         dbra    d4,init_state2$
 559
 560         /* Decrypt data and calculate CRC */
 561
 562         moveq   #0,d1
 563         moveq   #0,d2
 564         moveq   #0,d3
 565         move.w  (18,a5),d4
 566         subq.w  #5,d4
 567         movea.l (12,a5),a0
 568         movea.l (20,a5),a1
 569
 570 decrypt$:
 571
 572         /* Decrypt a byte */
 573
 574         addq.b  #1,d2
 575         move.b  (a2,d2:w),d0
 576         add.b   d0,d3
 577
 578         move.b  (a2,d3:w),d1
 579         move.b  d1,(a2,d2:w)
 580         move.b  d0,(a2,d3:w)
 581
 582         add.b   d0,d1
 583         move.b  (a0)+,d0
 584         move.b  (a2,d1:w),d1
 585         eor.b   d1,d0
 586         move.b  d0,(a1)+
 587
 588         dbra    d4,decrypt$
 589
 590         /* Assume a good CRC */
 591
 592         moveq   #-1,d0
 593
 594
 595         /* Pop preserved registers off stack and return with original SP */
 596
 597         movem.l (sp)+,d2-d7/a2-a4
 598         unlk    a5
 599         rts
 600
 601
 602
 603 /****i* prism2.device/AESEncrypt *******************************************
 604 *
 605 *   NAME
 606 *       AESEncrypt -- Encrypt a block using the AES cipher.
 607 *
 608 *   SYNOPSIS
 609 *       AESEncrypt(data, buffer, key)
 610 *
 611 *       VOID AESEncrypt(UBYTE *, UBYTE *, UBYTE *);
 612 *
 613 *   INTERNALS
 614 *       Register assignment relative to C implementation:
 615 *
 616 *       d0: s0
 617 *       d1: s1
 618 *       d2: s2
 619 *       d3: s3
 620 *       d4: i
 621 *       a0: s0, data
 622 *       a1: s1
 623 *       a2: s2
 624 *       a3: s3
 625 *       a4: s3, key, buffer
 626 *       a5: te0
 627 *
 628 ****************************************************************************
 629 *
 630 */
 631
 632         .globl  _AESEncrypt
 633
 634 _AESEncrypt:
 635
 636         /* Anchor stack arguments */
 637
 638         link    a5,#0
 639
 640         /* Push registers that should be preserved on to stack */
 641
 642         movem.l d2-d7/a2-a4,-(sp)
 643
 644         /* Initialise AES state */
 645
 646         movea.l (8,a5),a0
 647         movea.l (16,a5),a4
 648         move.l  a5,d5
 649
 650         move.l  (a0)+,d0
 651         move.l  (a4)+,d7
 652         eor.l   d7,d0
 653         move.l  (a0)+,d1
 654         move.l  (a4)+,d7
 655         eor.l   d7,d1
 656         move.l  (a0)+,d2
 657         move.l  (a4)+,d7
 658         eor.l   d7,d2
 659         move.l  (a0)+,d3
 660         move.l  (a4)+,d7
 661         eor.l   d7,d3
 662
 663         /* Save s values in address registers */
 664
 665         movea.l d0,a0
 666         movea.l d1,a1
 667         movea.l d2,a2
 668         movea.l d3,a3
 669
 670         /* Apply first 9 rounds */
 671
 672         lea     _te0,a5
 673         moveq   #8,d4
 674
 675 aes_loop$:
 676
 677         /* Initialise new state from key */
 678
 679         move.l  (a4)+,d0
 680         move.l  (a4)+,d1
 681         move.l  (a4)+,d2
 682         move.l  (a4)+,d3
 683
 684         /* Inject s0-based data */
 685
 686         move.l  a0,d6
 687
 688         moveq   #0,d7
 689         move.b  d6,d7
 690         move.l  (0x300*4:w,a5,d7:w*4),d7
 691         eor.l   d7,d1
 692
 693         lsr.w   #8,d6
 694         move.l  (0x200*4:w,a5,d6:w*4),d7
 695         eor.l   d7,d2
 696
 697         swap.w  d6
 698         moveq   #0,d7
 699         move.b  d6,d7
 700         move.l  (0x100*4:w,a5,d7:w*4),d7
 701         eor.l   d7,d3
 702
 703         lsr.w   #8,d6
 704         move.l  (a5,d6:w*4),d7
 705         eor.l   d7,d0
 706
 707         /* Inject s1-based data */
 708
 709         move.l  a1,d6
 710
 711         moveq   #0,d7
 712         move.b  d6,d7
 713         move.l  (0x300*4:w,a5,d7:w*4),d7
 714         eor.l   d7,d2
 715
 716         lsr.w   #8,d6
 717         move.l  (0x200*4:w,a5,d6:w*4),d7
 718         eor.l   d7,d3
 719
 720         swap.w  d6
 721         moveq   #0,d7
 722         move.b  d6,d7
 723         move.l  (0x100*4:w,a5,d7:w*4),d7
 724         eor.l   d7,d0
 725
 726         lsr.w   #8,d6
 727         move.l  (a5,d6:w*4),d7
 728         eor.l   d7,d1
 729
 730         /* Inject s2-based data */
 731
 732         move.l  a2,d6
 733
 734         moveq   #0,d7
 735         move.b  d6,d7
 736         move.l  (0x300*4:w,a5,d7:w*4),d7
 737         eor.l   d7,d3
 738
 739         lsr.w   #8,d6
 740         move.l  (0x200*4:w,a5,d6:w*4),d7
 741         eor.l   d7,d0
 742
 743         swap.w  d6
 744         moveq   #0,d7
 745         move.b  d6,d7
 746         move.l  (0x100*4:w:w,a5,d7:w*4),d7
 747         eor.l   d7,d1
 748
 749         lsr.w   #8,d6
 750         move.l  (a5,d6:w*4),d7
 751         eor.l   d7,d2
 752
 753         /* Inject s3-based data */
 754
 755         move.l  a3,d6
 756
 757         moveq   #0,d7
 758         move.b  d6,d7
 759         move.l  (0x300*4:w,a5,d7:w*4),d7
 760         eor.l   d7,d0
 761
 762         lsr.w   #8,d6
 763         move.l  (0x200*4:w,a5,d6:w*4),d7
 764         eor.l   d7,d1
 765
 766         swap.w  d6
 767         moveq   #0,d7
 768         move.b  d6,d7
 769         move.l  (0x100*4:w,a5,d7:w*4),d7
 770         eor.l   d7,d2
 771
 772         lsr.w   #8,d6
 773         move.l  (a5,d6:w*4),d7
 774         eor.l   d7,d3
 775
 776         /* Save state values in address registers */
 777
 778         movea.l d0,a0
 779         movea.l d1,a1
 780         movea.l d2,a2
 781         movea.l d3,a3
 782
 783         dbra    d4,aes_loop$
 784
 785         /* Apply final round */
 786
 787         lea     _te4,a5
 788
 789         /* Initialise new state from key */
 790
 791         move.l  (a4)+,d0
 792         move.l  (a4)+,d1
 793         move.l  (a4)+,d2
 794         move.l  (a4)+,d3
 795
 796         /* Inject s0-based data */
 797
 798         move.l  a0,d6
 799
 800         move.w  d6,d7
 801         andi.w  #0xff,d7
 802         lsl.w   #2,d7
 803         move.l  (a5,d7:w),d7
 804         andi.l  #0x000000ff,d7
 805         eor.l   d7,d1
 806
 807         lsr.w   #6,d6
 808         move.w  d6,d7
 809         andi.w  #0x3fc,d7
 810         move.l  (a5,d7:w),d7
 811         andi.l  #0x0000ff00,d7
 812         eor.l   d7,d2
 813
 814         swap.w  d6
 815         move.w  d6,d7
 816         andi.w  #0xff,d7
 817         lsl.w   #2,d7
 818         move.l  (a5,d7:w),d7
 819         andi.l  #0x00ff0000,d7
 820         eor.l   d7,d3
 821
 822         lsr.w   #6,d6
 823         move.w  d6,d7
 824         andi.w  #0x3fc,d7
 825         move.l  (a5,d7:w),d7
 826         andi.l  #0xff000000,d7
 827         eor.l   d7,d0
 828
 829         /* Inject s1-based data */
 830
 831         move.l  a1,d6
 832
 833         move.w  d6,d7
 834         andi.w  #0xff,d7
 835         lsl.w   #2,d7
 836         move.l  (a5,d7:w),d7
 837         andi.l  #0x000000ff,d7
 838         eor.l   d7,d2
 839
 840         lsr.w   #6,d6
 841         move.w  d6,d7
 842         andi.w  #0x3fc,d7
 843         move.l  (a5,d7:w),d7
 844         andi.l  #0x0000ff00,d7
 845         eor.l   d7,d3
 846
 847         swap.w  d6
 848         move.w  d6,d7
 849         andi.w  #0xff,d7
 850         lsl.w   #2,d7
 851         move.l  (a5,d7:w),d7
 852         andi.l  #0x00ff0000,d7
 853         eor.l   d7,d0
 854
 855         lsr.w   #6,d6
 856         move.w  d6,d7
 857         andi.w  #0x3fc,d7
 858         move.l  (a5,d7:w),d7
 859         andi.l  #0xff000000,d7
 860         eor.l   d7,d1
 861
 862         /* Inject s2-based data */
 863
 864         move.l  a2,d6
 865
 866         move.w  d6,d7
 867         andi.w  #0xff,d7
 868         lsl.w   #2,d7
 869         move.l  (a5,d7:w),d7
 870         andi.l  #0x000000ff,d7
 871         eor.l   d7,d3
 872
 873         lsr.w   #6,d6
 874         move.l  d6,d7
 875         andi.w  #0x3fc,d7
 876         move.l  (a5,d7:w),d7
 877         andi.l  #0x0000ff00,d7
 878         eor.l   d7,d0
 879
 880         swap.w  d6
 881         move.w  d6,d7
 882         andi.w  #0xff,d7
 883         lsl.w   #2,d7
 884         move.l  (a5,d7:w),d7
 885         andi.l  #0x00ff0000,d7
 886         eor.l   d7,d1
 887
 888         lsr.w   #6,d6
 889         move.w  d6,d7
 890         andi.w  #0x3fc,d7
 891         move.l  (a5,d7:w),d7
 892         andi.l  #0xff000000,d7
 893         eor.l   d7,d2
 894
 895         /* Inject s3-based data */
 896
 897         move.l  a3,d6
 898
 899         move.w  d6,d7
 900         andi.w  #0xff,d7
 901         lsl.w   #2,d7
 902         move.l  (a5,d7:w),d7
 903         andi.l  #0x000000ff,d7
 904         eor.l   d7,d0
 905
 906         lsr.w   #6,d6
 907         move.w  d6,d7
 908         andi.w  #0x3fc,d7
 909         move.l  (a5,d7:w),d7
 910         andi.l  #0x0000ff00,d7
 911         eor.l   d7,d1
 912
 913         swap.w  d6
 914         move.w  d6,d7
 915         andi.w  #0xff,d7
 916         lsl.w   #2,d7
 917         move.l  (a5,d7:w),d7
 918         andi.l  #0x00ff0000,d7
 919         eor.l   d7,d2
 920
 921         lsr.w   #6,d6
 922         move.w  d6,d7
 923         andi.w  #0x3fc,d7
 924         move.l  (a5,d7:w),d7
 925         andi.l  #0xff000000,d7
 926         eor.l   d7,d3
 927
 928         /* Write final state to buffer */
 929
 930         movea.l d5,a5
 931         movea.l (12,a5),a4
 932
 933         move.l  d0,(a4)+
 934         move.l  d1,(a4)+
 935         move.l  d2,(a4)+
 936         move.l  d3,(a4)+
 937
 938         /* Pop preserved registers off stack and return with original SP */
 939
 940         movem.l (sp)+,d2-d7/a2-a4
 941         unlk    a5
 942         rts
 943
 944
 945