2 Copyright © 2013, The AROS Development Team. All rights reserved.
7 #include <aros/kernel.h>
8 #include <aros/libcall.h>
10 #include <aros/arm/cpucontext.h>
15 #include <proto/exec.h>
16 #include <proto/kernel.h>
18 #include "kernel_cpu.h"
19 #include "kernel_intern.h"
20 #include "kernel_scheduler.h"
21 #include "kernel_intr.h"
22 #include "kernel_syscall.h"
24 extern char * __text_start
;
25 extern char * __text_end
;
37 this code currently assumes the caller is in user mode (and will break from any other mode)
39 r0 = passed to c handler, r1/r2 = temp
42 ".globl __vectorhand_swi \n"
43 ".type __vectorhand_swi,%function \n"
44 "__vectorhand_swi: \n"
46 " bl handle_syscall \n"
50 void cache_clear_e(void *addr
, uint32_t length
, uint32_t flags
)
54 if (addr
== NULL
&& length
== 0xffffffff)
60 void *end_addr
= ((uintptr_t)addr
+ length
+ 31) & ~31;
61 addr
= (void *)((uintptr_t)addr
& ~31);
62 count
= (uintptr_t)(end_addr
- addr
) >> 5;
65 D(bug("[Kernel] CacheClearE from %p length %d count %d, flags %x\n", addr
, length
, count
, flags
));
69 if (flags
& CACRF_ClearD
)
71 __asm__
__volatile__("mcr p15, 0, %0, c7, c14, 1"::"r"(addr
));
73 if (flags
& CACRF_ClearI
)
75 __asm__
__volatile__("mcr p15, 0, %0, c7, c5, 1"::"r"(addr
));
77 if (flags
& CACRF_InvalidateD
)
79 __asm__
__volatile__("mcr p15, 0, %0, c7, c6, 1"::"r"(addr
));
85 __asm__
__volatile__("mcr p15, 0, %0, c7, c10, 4"::"r"(addr
));
88 void handle_syscall(void *regs
)
90 register unsigned int addr
;
91 register unsigned int swi_no
;
93 /* We determine the SWI number by reading in "tasks"
94 program counter, subtract the instruction from it and
95 obtain the value from there. we also use this to check if
96 we have been called from outwith the kernel's code (illegal!)
99 addr
= ((uint32_t *)regs
)[15];
101 swi_no
= *((unsigned int *)addr
) & 0x00ffffff;
103 D(bug("[Kernel] ## SWI %d @ 0x%p\n", swi_no
, addr
));
105 if (((char*)addr
< &__text_start
) || ((char*)addr
>= &__text_end
))
107 D(bug("[Kernel] ## SWI : ILLEGAL ACCESS!\n"));
110 if (swi_no
<= 0x0b || swi_no
== 0x100)
112 DREGS(cpu_DumpRegs(regs
));
118 D(bug("[Kernel] ## CLI...\n"));
119 ((uint32_t *)regs
)[16] |= (1 << 7);
125 D(bug("[Kernel] ## STI...\n"));
126 ((uint32_t *)regs
)[16] &= ~(1 << 7);
132 D(bug("[Kernel] ## SUPERSTATE... (0x%p ->", ((uint32_t *)regs
)[16]));
133 ((uint32_t *)regs
)[16] &= ~(CPUMODE_MASK
);
134 ((uint32_t *)regs
)[16] |= (0x80 | CPUMODE_SYSTEM
);
135 D(bug(" 0x%p)\n", ((uint32_t *)regs
)[16]));
139 case SC_GETCPUNUMBER
:
141 ((uint32_t *)regs
)[0] = GetCPUNumber();
145 case SC_ISSUPERSTATE
:
147 D(bug("[Kernel] ## ISSUPERSTATE... "));
148 ((uint32_t *)regs
)[0] = !(((((uint32_t *)regs
)[16] & CPUMODE_MASK
) == CPUMODE_USER
));
149 D(bug("%d\n", ((uint32_t *)regs
)[0]));
155 D(bug("[Kernel] ## REBOOT...\n"));
156 asm volatile ("mov pc, #0\n"); // Jump to the reset vector..
162 D(bug("[Kernel] ## CACHECLEARE...\n"));
163 void * address
= ((void **)regs
)[0];
164 uint32_t length
= ((uint32_t *)regs
)[1];
165 uint32_t flags
= ((uint32_t *)regs
)[2];
167 cache_clear_e(address
, length
, flags
);
173 * Execure core_SysCall only when we will go back to user mode. Default core_SysCall does
174 * not check this condition and could execute Cause() handler before IRQ is entirely handled.
179 uint32_t mode
= (((uint32_t *)regs
)[16]) & 0x1f;
180 if (mode
== 0x10 || mode
== 0x1f)
181 core_SysCall(swi_no
, regs
);
188 D(bug("[Kernel] ## SWI : ILLEGAL SWI!\n"));
192 D(bug("[Kernel] ## SWI returning ..\n"));