List.mui: Update entries count prior to range change
[AROS.git] / arch / i386-all / include / aros / fenv.h
blob8a5c39711e7ad003c181ca93d115b1e2079f65ee
1 /*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
26 * $FreeBSD: src/lib/msun/i387/fenv.h,v 1.6 2007/01/06 21:46:23 das Exp $
29 #ifndef _FENV_H_
30 #define _FENV_H_
32 #include <aros/system.h>
33 #include <aros/types/int_t.h>
35 /*
36 * To preserve binary compatibility with FreeBSD 5.3, we pack the
37 * mxcsr into some reserved fields, rather than changing sizeof(fenv_t).
39 typedef struct {
40 uint16_t __control;
41 uint16_t __mxcsr_hi;
42 uint16_t __status;
43 uint16_t __mxcsr_lo;
44 uint32_t __tag;
45 char __other[16];
46 } fenv_t;
48 #define __get_mxcsr(env) (((env).__mxcsr_hi << 16) | \
49 ((env).__mxcsr_lo))
50 #define __set_mxcsr(env, x) do { \
51 (env).__mxcsr_hi = (uint32_t)(x) >> 16; \
52 (env).__mxcsr_lo = (uint16_t)(x); \
53 } while (0)
55 typedef uint16_t fexcept_t;
57 /* Exception flags */
58 #define FE_INVALID 0x01
59 #define FE_DENORMAL 0x02
60 #define FE_DIVBYZERO 0x04
61 #define FE_OVERFLOW 0x08
62 #define FE_UNDERFLOW 0x10
63 #define FE_INEXACT 0x20
64 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
65 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
67 /* Rounding modes */
68 #define FE_TONEAREST 0x0000
69 #define FE_DOWNWARD 0x0400
70 #define FE_UPWARD 0x0800
71 #define FE_TOWARDZERO 0x0c00
72 #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
73 FE_UPWARD | FE_TOWARDZERO)
76 * As compared to the x87 control word, the SSE unit's control word
77 * has the rounding control bits offset by 3 and the exception mask
78 * bits offset by 7.
80 #define _SSE_ROUND_SHIFT 3
81 #define _SSE_EMASK_SHIFT 7
83 __BEGIN_DECLS
85 /* After testing for SSE support once, we cache the result in __has_sse. */
86 enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK };
87 extern enum __sse_support __has_sse;
88 int __test_sse(void);
89 #ifdef __SSE__
90 #define __HAS_SSE() 1
91 #else
92 #define __HAS_SSE() (__has_sse == __SSE_YES || \
93 (__has_sse == __SSE_UNK && __test_sse()))
94 #endif
96 /* Default floating-point environment */
97 extern const fenv_t __fe_dfl_env;
98 #define FE_DFL_ENV (&__fe_dfl_env)
100 #define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw))
101 #define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env))
102 #define __fldenvx(__env) __asm __volatile("fldenv %0" : : "m" (__env) \
103 : "st", "st(1)", "st(2)", "st(3)", "st(4)", \
104 "st(5)", "st(6)", "st(7)")
105 #define __fnclex() __asm __volatile("fnclex")
106 #define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env)))
107 #define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw)))
108 #define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=am" (*(__sw)))
109 #define __fwait() __asm __volatile("fwait")
110 #define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr))
111 #define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
113 #ifndef STDC_NOINLINE
114 static __inline int
115 feclearexcept(int __excepts)
117 fenv_t __env;
118 int __mxcsr;
120 if (__excepts == FE_ALL_EXCEPT) {
121 __fnclex();
122 } else {
123 __fnstenv(&__env);
124 __env.__status &= ~__excepts;
125 __fldenv(__env);
127 if (__HAS_SSE()) {
128 __stmxcsr(&__mxcsr);
129 __mxcsr &= ~__excepts;
130 __ldmxcsr(__mxcsr);
132 return (0);
135 static __inline int
136 fegetexceptflag(fexcept_t *__flagp, int __excepts)
138 int __mxcsr;
139 short __status;
141 __fnstsw(&__status);
142 if (__HAS_SSE())
143 __stmxcsr(&__mxcsr);
144 else
145 __mxcsr = 0;
146 *__flagp = (__mxcsr | __status) & __excepts;
147 return (0);
149 #endif /* !STDC_NOINLINE */
151 int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
152 int feraiseexcept(int __excepts);
154 #ifndef STDC_NOINLINE
155 static __inline int
156 fetestexcept(int __excepts)
158 int __mxcsr;
159 short __status;
161 __fnstsw(&__status);
162 if (__HAS_SSE())
163 __stmxcsr(&__mxcsr);
164 else
165 __mxcsr = 0;
166 return ((__status | __mxcsr) & __excepts);
169 static __inline int
170 fegetround(void)
172 int __control;
175 * We assume that the x87 and the SSE unit agree on the
176 * rounding mode. Reading the control word on the x87 turns
177 * out to be about 5 times faster than reading it on the SSE
178 * unit on an Opteron 244.
180 __fnstcw(&__control);
181 return (__control & _ROUND_MASK);
184 static __inline int
185 fesetround(int __round)
187 int __mxcsr, __control;
189 if (__round & ~_ROUND_MASK)
190 return (-1);
192 __fnstcw(&__control);
193 __control &= ~_ROUND_MASK;
194 __control |= __round;
195 __fldcw(__control);
197 if (__HAS_SSE()) {
198 __stmxcsr(&__mxcsr);
199 __mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
200 __mxcsr |= __round << _SSE_ROUND_SHIFT;
201 __ldmxcsr(__mxcsr);
204 return (0);
206 #endif /* !STDC_NOINLINE */
208 int fegetenv(fenv_t *__envp);
209 int feholdexcept(fenv_t *__envp);
211 #ifndef STDC_NOINLINE
212 static __inline int
213 fesetenv(const fenv_t *__envp)
215 fenv_t __env = *__envp;
216 int __mxcsr;
218 __mxcsr = __get_mxcsr(__env);
219 __set_mxcsr(__env, 0xffffffff);
221 * XXX Using fldenvx() instead of fldenv() tells the compiler that this
222 * instruction clobbers the i387 register stack. This happens because
223 * we restore the tag word from the saved environment. Normally, this
224 * would happen anyway and we wouldn't care, because the ABI allows
225 * function calls to clobber the i387 regs. However, fesetenv() is
226 * inlined, so we need to be more careful.
228 __fldenvx(__env);
229 if (__HAS_SSE())
230 __ldmxcsr(__mxcsr);
231 return (0);
233 #endif /* !STDC_NOINLINE */
235 int feupdateenv(const fenv_t *__envp);
237 #if __BSD_VISIBLE
239 int feenableexcept(int __mask);
240 int fedisableexcept(int __mask);
242 #ifndef STDC_NOINLINE
243 static __inline int
244 fegetexcept(void)
246 int __control;
249 * We assume that the masks for the x87 and the SSE unit are
250 * the same.
252 __fnstcw(&__control);
253 return (~__control & FE_ALL_EXCEPT);
255 #endif /* !STDC_NOINLINE */
257 #endif /* __BSD_VISIBLE */
259 __END_DECLS
261 #endif /* !_FENV_H_ */