arch/.unmaintained/ppc-native/exec/cachepostdma.s

   1 /*
   2     Copyright © 1995-2001, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 /******************************************************************************
   7
   8     NAME
   9
  10         AROS_LH3(void, CachePostDMA,
  11
  12     SYNOPSIS
  13         AROS_LHA(APTR,    address, A0),
  14         AROS_LHA(ULONG *, length,  A1),
  15         AROS_LHA(ULONG,   flags,  D0),
  16
  17     LOCATION
  18         struct ExecBase *, SysBase, 128, Exec)
  19
  20     FUNCTION
  21         Do everything necessary to make CPU caches aware that a DMA has
  22         happened.
  23
  24     INPUTS
  25         address - Virtual address of memory affected by the DMA
  26         *length - Number of bytes affected
  27         flags   - DMA_NoModify    - Indicate that the memory did not change.
  28                   DMA_ReadFromRAM - Indicate that the DMA goes from RAM
  29                                     to the device. Set this bit in bot calls.
  30
  31     RESULT
  32
  33     NOTES
  34         DMA must follow a call to CachePreDMA() and must be followed
  35         by a call to CachePostDMA().
  36
  37     EXAMPLE
  38
  39     BUGS
  40
  41     SEE ALSO
  42         CachePreDMA()
  43
  44     INTERNALS
  45         According to Phase 5 technical documentation implementing this is
  46         a bit tricky.
  47         Left out until I decide about PPC memory model
  48
  49     HISTORY
  50
  51 ******************************************************************************/
  52
  53         #include "machine.i"
  54
  55         .text
  56         .balign 4
  57         .globl  AROS_SLIB_ENTRY(CachePostDMA,Exec)
  58         .type   AROS_SLIB_ENTRY(CachePostDMA,Exec),@function
  59 AROS_SLIB_ENTRY(CachePostDMA,Exec):
  60         subr
  61         rts