Test initialisation of MUIA_List_AdjustWidth and MUIA_List_AdjustHeight, and
[AROS.git] / arch / all-pc / kernel / apic.h
blobd5765056b840fb40728dff95373962c6fcbce30b
1 /*
2 Copyright © 1995-2011, The AROS Development Team. All rights reserved.
3 $Id$
5 Desc: Generic AROS APIC definitions.
6 Lang: english
7 */
9 #include <asm/cpu.h>
10 #include <proto/acpica.h>
13 * Per-CPU data
14 * Even old IntelMP spec say that we should be prepared to handle different CPUs.
15 * This is why we have timer frequency here, not globally.
17 struct CPUData
19 ULONG timerFreq; /* Timer clock frequency */
20 UBYTE lapicID; /* Local APIC ID */
21 UBYTE sysID; /* System (ACPI, whatever) ID, can differ */
24 struct APICData
26 IPTR lapicBase; /* Local APIC base address */
27 IPTR ioapicBase; /* IOAPIC base address */
28 CONST_APTR acpi_madt; /* ACPI MADT pointer (cached) */
29 ULONG count; /* Total number of APICs in the system */
30 UWORD flags; /* See below */
31 struct CPUData cores[0]; /* Per-CPU data */
34 #define APF_8259 0x0001 /* Legacy PIC present */
36 ULONG core_APIC_Wake(APTR start_addr, UBYTE id, IPTR base);
37 UBYTE core_APIC_GetID(IPTR base);
38 void core_APIC_Init(struct APICData *data, ULONG cpuNum);
39 void core_APIC_AckIntr(void);
41 #ifdef __x86_64__
42 #define APIC_BASE_MASK 0x000FFFFFFFFFF000
43 #else
44 #define APIC_BASE_MASK 0xFFFFF000
45 #endif
47 /* This is callable in supervisor only */
48 static inline IPTR core_APIC_GetBase(void)
50 return rdmsri(0x1B) & APIC_BASE_MASK;
53 struct APICData *acpi_APIC_Init(void);
54 struct APICData *core_APIC_Probe(void);
55 UBYTE core_APIC_GetNumber(struct APICData *data);