arch/all-pc/kernel/xtpic.c

   1 /*
   2     Copyright © 2011, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: Legacy Intel 8259A PIC driver.
   6 */
   7
   8 #include <asm/io.h>
   9 #include <inttypes.h>
  10
  11 #include "xtpic.h"
  12
  13 void XTPIC_Init(uint16_t *irqmask)
  14 {
  15     /*
  16      * After initialization everything is disabled except cascade interrupt (IRQ 2).
  17      * Be careful and don't miss this! Without IRQ2 enabled slave 8259 (and its IRQs)
  18      * will not work!
  19      */
  20     *irqmask = 0xFFFB;
  21
  22     /* Setup the 8259. Send four ICWs (see 8529 datasheet) */
  23     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x11),"i"(0x20)); /* Initialization sequence for 8259A-1 (edge-triggered, cascaded, ICW4 needed) */
  24     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x11),"i"(0xa0)); /* Initialization sequence for 8259A-2, the same as above */
  25     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x20),"i"(0x21)); /* IRQs for master at 0x20 - 0x27 */
  26     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x28),"i"(0xa1)); /* IRQs for slave at 0x28 - 0x2f */
  27     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x04),"i"(0x21)); /* 8259A-1 is master, slave at IRQ2 */
  28     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x02),"i"(0xa1)); /* 8259A-2 is slave, ID = 2 */
  29     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x01),"i"(0x21)); /* 8086 mode, non-buffered, nonspecial fully nested mode for both */
  30     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0x01),"i"(0xa1));
  31
  32     /* Now initialize interrupt masks */
  33     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0xfb),"i"(0x21)); /* Enable cascade int */
  34     asm("outb   %b0,%b1\n\tcall delay"::"a"((char)0xff),"i"(0xa1)); /* Mask all interrupts */
  35 }
  36
  37 /* Small delay routine used by XTPIC_Init() initializer */
  38 asm("\ndelay:\t.short   0x00eb\n\tret");
  39
  40 void XTPIC_DisableIRQ(uint8_t irqnum, uint16_t *irqmask)
  41 {
  42     irqnum &= 15;
  43
  44     if (irqnum == 2)
  45     {
  46         /* IRQ2 must never be disabled. Doing so breaks communication between two 8259's */
  47         return;
  48     }
  49
  50     *irqmask |= 1 << irqnum;
  51
  52     if (irqnum >= 8)
  53         outb((*irqmask >> 8) & 0xff, 0xA1);
  54     else
  55         outb(*irqmask & 0xff, 0x21);
  56 }
  57
  58 void XTPIC_EnableIRQ(uint8_t irqnum, uint16_t *irqmask)
  59 {
  60     irqnum &= 15;
  61     *irqmask &= ~(1 << irqnum);
  62
  63     if (irqnum >= 8)
  64         outb((*irqmask >> 8) & 0xff, 0xA1);
  65     else
  66         outb(*irqmask & 0xff, 0x21);
  67 }
  68
  69 /*
  70  * Careful! The 8259A is a fragile beast, it pretty much _has_ to be done exactly like this (mask it
  71  * first, _then_ send the EOI, and the order of EOI to the two 8259s is important!
  72  */
  73 void XTPIC_AckIntr(uint8_t intnum, uint16_t *irqmask)
  74 {
  75     intnum &= 15;
  76     *irqmask |= 1 << intnum;
  77
  78     if (intnum >= 8)
  79     {
  80         outb((*irqmask >> 8) & 0xff, 0xA1);
  81         outb(0x62, 0x20);
  82         outb(0x20, 0xa0);
  83     }
  84     else
  85     {
  86         outb(*irqmask & 0xff, 0x21);
  87         outb(0x20, 0x20);
  88     }
  89 }