2 # $NetBSD: fplsp.doc,v 1.1 2000/04/14 20:24:37 is Exp $
5 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
6 # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
7 # M68000 Hi-Performance Microprocessor Division
8 # M68060 Software Package Production Release
10 # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
11 # All rights reserved.
13 # THE SOFTWARE is provided on an "AS IS" basis and without warranty.
14 # To the maximum extent permitted by applicable law,
15 # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
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17 # FOR A PARTICULAR PURPOSE and any warranty against infringement with
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19 # and any accompanying written materials.
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24 # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
25 # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
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31 # SOFTWARE so long as this entire notice is retained without alteration
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33 # versions are clearly identified as such.
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36 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
38 68060 FLOATING-POINT SOFTWARE PACKAGE (Library version)
39 --------------------------------------------------------
41 The file fplsp.sa contains the "Library version" of the
42 68060SP Floating-Point Software Package. The routines
43 included in this module can be used to emulate the
44 FP instructions not implemented in 68060 hardware. These
45 instructions normally take exception vector #11
46 "FP Unimplemented Instruction".
48 By re-compiling a program that uses these instructions, and
49 making subroutine calls in place of the unimplemented
50 instructions, a program can avoid the overhead associated
51 with taking the exception.
55 The file fplsp.sa is essentially a hexadecimal image of the
56 release package. This is the ONLY format which will be supported.
57 The hex image was created by assembling the source code and
58 then converting the resulting binary output image into an
59 ASCII text file. The hexadecimal numbers are listed
60 using the Motorola Assembly Syntax assembler directive "dc.l"
61 (define constant longword). The file can be converted to other
62 assembly syntaxes by using any word processor with a global
63 search and replace function.
65 To assist in assembling and linking this module with other modules,
66 the installer should add a symbolic label to the top of the file.
67 This will allow calling routines to access the entry points
70 The source code fplsp.s has also been included but only for
71 documentation purposes.
73 Release file structure:
74 -----------------------
75 The file fplsp.sa contains an "Entry-Point" section and a
76 code section. The FPLSP has no "Call-Out" section. The first section
77 is the "Entry-Point" section. In order to access a function in the
78 package, a program must "bsr" or "jsr" to the location listed
79 below in "68060FPLSP entry points" that corresponds to the desired
80 function. A branch instruction located at the selected entry point
81 within the package will then enter the correct emulation code routine.
83 The entry point addresses at the beginning of the package will remain
84 fixed so that a program calling the routines will not have to be
85 re-compiled with every new 68060FPLSP release.
87 There are 3 entry-points for each instruction type: single precision,
88 double precision, and extended precision.
90 As an example, the "fsin" library instruction can be passed an
91 extended precision operand if program executes:
95 fmovm.x &0x01,-(%sp) # pass operand on stack
96 bsr.l _060FPLSP_TOP+0x1a8 # branch to fsin routine
97 add.l &0xc,%sp # clear operand from stack
99 Upon return, fp0 holds the correct result. The FPSR is
100 set correctly. The FPCR is unchanged. The FPIAR is undefined.
102 Another example. This time, a dyadic operation:
106 fmov.s %fp1,-(%sp) # pass src operand
107 fmov.s %fp0,-(%sp) # pass dst operand
108 bsr.l _060FPLSP_TOP+0x168 # branch to frem routine
109 addq.l &0x8,%sp # clear operands from stack
111 Again, the result is returned in fp0. Note that BOTH operands
112 are passed in single precision format.
116 The package takes exceptions according to the FPCR value upon subroutine
117 entry. If an exception should be reported, then the package forces
118 this exception using implemented floating-point instructions.
119 For example, if the instruction being emulated should cause a
120 floating-point Operand Error exception, then the library routine
121 executes an FMUL of a zero and an infinity to force the OPERR
122 exception. Although the FPIAR will be undefined for the enabled
123 Operand Error exception handler, the user will at least be able
124 to record that the event occurred.
128 The package does not attempt to correctly emulate instructions
129 with Signalling NAN inputs. Use of SNANs should be avoided with
132 The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points
133 are provided for the convenience of older compilers that make
134 subroutine calls for all fp instructions. The code does NOT emulate
135 the instruction but rather simply executes it.
137 68060FPLSP entry points:
138 ------------------------
140 0x000: _060LSP__facoss_
141 0x008: _060LSP__facosd_
142 0x010: _060LSP__facosx_
143 0x018: _060LSP__fasins_
144 0x020: _060LSP__fasind_
145 0x028: _060LSP__fasinx_
146 0x030: _060LSP__fatans_
147 0x038: _060LSP__fatand_
148 0x040: _060LSP__fatanx_
149 0x048: _060LSP__fatanhs_
150 0x050: _060LSP__fatanhd_
151 0x058: _060LSP__fatanhx_
152 0x060: _060LSP__fcoss_
153 0x068: _060LSP__fcosd_
154 0x070: _060LSP__fcosx_
155 0x078: _060LSP__fcoshs_
156 0x080: _060LSP__fcoshd_
157 0x088: _060LSP__fcoshx_
158 0x090: _060LSP__fetoxs_
159 0x098: _060LSP__fetoxd_
160 0x0a0: _060LSP__fetoxx_
161 0x0a8: _060LSP__fetoxm1s_
162 0x0b0: _060LSP__fetoxm1d_
163 0x0b8: _060LSP__fetoxm1x_
164 0x0c0: _060LSP__fgetexps_
165 0x0c8: _060LSP__fgetexpd_
166 0x0d0: _060LSP__fgetexpx_
167 0x0d8: _060LSP__fgetmans_
168 0x0e0: _060LSP__fgetmand_
169 0x0e8: _060LSP__fgetmanx_
170 0x0f0: _060LSP__flog10s_
171 0x0f8: _060LSP__flog10d_
172 0x100: _060LSP__flog10x_
173 0x108: _060LSP__flog2s_
174 0x110: _060LSP__flog2d_
175 0x118: _060LSP__flog2x_
176 0x120: _060LSP__flogns_
177 0x128: _060LSP__flognd_
178 0x130: _060LSP__flognx_
179 0x138: _060LSP__flognp1s_
180 0x140: _060LSP__flognp1d_
181 0x148: _060LSP__flognp1x_
182 0x150: _060LSP__fmods_
183 0x158: _060LSP__fmodd_
184 0x160: _060LSP__fmodx_
185 0x168: _060LSP__frems_
186 0x170: _060LSP__fremd_
187 0x178: _060LSP__fremx_
188 0x180: _060LSP__fscales_
189 0x188: _060LSP__fscaled_
190 0x190: _060LSP__fscalex_
191 0x198: _060LSP__fsins_
192 0x1a0: _060LSP__fsind_
193 0x1a8: _060LSP__fsinx_
194 0x1b0: _060LSP__fsincoss_
195 0x1b8: _060LSP__fsincosd_
196 0x1c0: _060LSP__fsincosx_
197 0x1c8: _060LSP__fsinhs_
198 0x1d0: _060LSP__fsinhd_
199 0x1d8: _060LSP__fsinhx_
200 0x1e0: _060LSP__ftans_
201 0x1e8: _060LSP__ftand_
202 0x1f0: _060LSP__ftanx_
203 0x1f8: _060LSP__ftanhs_
204 0x200: _060LSP__ftanhd_
205 0x208: _060LSP__ftanhx_
206 0x210: _060LSP__ftentoxs_
207 0x218: _060LSP__ftentoxd_
208 0x220: _060LSP__ftentoxx_
209 0x228: _060LSP__ftwotoxs_
210 0x230: _060LSP__ftwotoxd_
211 0x238: _060LSP__ftwotoxx_
213 0x240: _060LSP__fabss_
214 0x248: _060LSP__fabsd_
215 0x250: _060LSP__fabsx_
216 0x258: _060LSP__fadds_
217 0x260: _060LSP__faddd_
218 0x268: _060LSP__faddx_
219 0x270: _060LSP__fdivs_
220 0x278: _060LSP__fdivd_
221 0x280: _060LSP__fdivx_
222 0x288: _060LSP__fints_
223 0x290: _060LSP__fintd_
224 0x298: _060LSP__fintx_
225 0x2a0: _060LSP__fintrzs_
226 0x2a8: _060LSP__fintrzd_
227 0x2b0: _060LSP__fintrzx_
228 0x2b8: _060LSP__fmuls_
229 0x2c0: _060LSP__fmuld_
230 0x2c8: _060LSP__fmulx_
231 0x2d0: _060LSP__fnegs_
232 0x2d8: _060LSP__fnegd_
233 0x2e0: _060LSP__fnegx_
234 0x2e8: _060LSP__fsqrts_
235 0x2f0: _060LSP__fsqrtd_
236 0x2f8: _060LSP__fsqrtx_
237 0x300: _060LSP__fsubs_
238 0x308: _060LSP__fsubd_
239 0x310: _060LSP__fsubx_