arch/m68k-all/m680x0/fpsp/fpsp.h

   1 *       $NetBSD: fpsp.h,v 1.2 1994/10/26 07:49:04 cgd Exp $
   2
   3 *       MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
   4 *       M68000 Hi-Performance Microprocessor Division
   5 *       M68040 Software Package
   6 *
   7 *       M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
   8 *       All rights reserved.
   9 *
  10 *       THE SOFTWARE is provided on an "AS IS" basis and without warranty.
  11 *       To the maximum extent permitted by applicable law,
  12 *       MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
  13 *       INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
  14 *       PARTICULAR PURPOSE and any warranty against infringement with
  15 *       regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
  16 *       and any accompanying written materials.
  17 *
  18 *       To the maximum extent permitted by applicable law,
  19 *       IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
  20 *       (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
  21 *       PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
  22 *       OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
  23 *       SOFTWARE.  Motorola assumes no responsibility for the maintenance
  24 *       and support of the SOFTWARE.
  25 *
  26 *       You are hereby granted a copyright license to use, modify, and
  27 *       distribute the SOFTWARE so long as this entire notice is retained
  28 *       without alteration in any modified and/or redistributed versions,
  29 *       and that such modified versions are clearly identified as such.
  30 *       No licenses are granted by implication, estoppel or otherwise
  31 *       under any patents or trademarks of Motorola, Inc.
  32
  33 *
  34 *       fpsp.h 3.3 3.3
  35 *
  36
  37 *       fpsp.h --- stack frame offsets during FPSP exception handling
  38 *
  39 *       These equates are used to access the exception frame, the fsave
  40 *       frame and any local variables needed by the FPSP package.
  41 *
  42 *       All FPSP handlers begin by executing:
  43 *
  44 *               link    a6,#-LOCAL_SIZE
  45 *               fsave   -(a7)
  46 *               movem.l d0-d1/a0-a1,USER_DA(a6)
  47 *               fmovem.x fp0-fp3,USER_FP0(a6)
  48 *               fmove.l fpsr/fpcr/fpiar,USER_FPSR(a6)
  49 *
  50 *       After initialization, the stack looks like this:
  51 *
  52 *       A7 ---> +-------------------------------+
  53 *               |                               |
  54 *               |       FPU fsave area          |
  55 *               |                               |
  56 *               +-------------------------------+
  57 *               |                               |
  58 *               |       FPSP Local Variables    |
  59 *               |            including          |
  60 *               |         saved registers       |
  61 *               |                               |
  62 *               +-------------------------------+
  63 *       A6 ---> |       Saved A6                |
  64 *               +-------------------------------+
  65 *               |                               |
  66 *               |       Exception Frame         |
  67 *               |                               |
  68 *               |                               |
  69 *
  70 *       Positive offsets from A6 refer to the exception frame.  Negative
  71 *       offsets refer to the Local Variable area and the fsave area.
  72 *       The fsave frame is also accessible 'from the top' via A7.
  73 *
  74 *       On exit, the handlers execute:
  75 *
  76 *               movem.l USER_DA(a6),d0-d1/a0-a1
  77 *               fmovem.x USER_FP0(a6),fp0-fp3
  78 *               fmove.l USER_FPSR(a6),fpsr/fpcr/fpiar
  79 *               frestore (a7)+
  80 *               unlk    a6
  81 *
  82 *       and then either 'bra fpsp_done' if the exception was completely
  83 *       handled by the package, or 'bra real_xxxx' which is an external
  84 *       label to a routine that will process a real exception of the
  85 *       type that was generated.  Some handlers may omit the 'frestore'
  86 *       if the FPU state after the exception is idle.
  87 *
  88 *       Sometimes the exception handler will transform the fsave area
  89 *       because it needs to report an exception back to the user.  This
  90 *       can happen if the package is entered for an unimplemented float
  91 *       instruction that generates (say) an underflow.  Alternatively,
  92 *       a second fsave frame can be pushed onto the stack and the
  93 *       handler exit code will reload the new frame and discard the old.
  94 *
  95 *       The registers d0, d1, a0, a1 and fp0-fp3 are always saved and
  96 *       restored from the 'local variable' area and can be used as
  97 *       temporaries.  If a routine needs to change any
  98 *       of these registers, it should modify the saved copy and let
  99 *       the handler exit code restore the value.
 100 *
 101 *----------------------------------------------------------------------
 102 *
 103 *       Local Variables on the stack
 104 *
 105 LOCAL_SIZE      equ     192             ;bytes needed for local variables
 106 LV              equ     -LOCAL_SIZE     ;convenient base value
 107 *
 108 USER_DA         equ     LV+0            ;save space for D0-D1,A0-A1
 109 USER_D0         equ     LV+0            ;saved user D0
 110 USER_D1         equ     LV+4            ;saved user D1
 111 USER_A0         equ     LV+8            ;saved user A0
 112 USER_A1         equ     LV+12           ;saved user A1
 113 USER_FP0        equ     LV+16           ;saved user FP0
 114 USER_FP1        equ     LV+28           ;saved user FP1
 115 USER_FP2        equ     LV+40           ;saved user FP2
 116 USER_FP3        equ     LV+52           ;saved user FP3
 117 USER_FPCR       equ     LV+64           ;saved user FPCR
 118 FPCR_ENABLE     equ     USER_FPCR+2     ;       FPCR exception enable
 119 FPCR_MODE       equ     USER_FPCR+3     ;       FPCR rounding mode control
 120 USER_FPSR       equ     LV+68           ;saved user FPSR
 121 FPSR_CC         equ     USER_FPSR+0     ;       FPSR condition code
 122 FPSR_QBYTE      equ     USER_FPSR+1     ;       FPSR quotient
 123 FPSR_EXCEPT     equ     USER_FPSR+2     ;       FPSR exception
 124 FPSR_AEXCEPT    equ     USER_FPSR+3     ;       FPSR accrued exception
 125 USER_FPIAR      equ     LV+72           ;saved user FPIAR
 126 FP_SCR1         equ     LV+76           ;room for a temporary float value
 127 FP_SCR2         equ     LV+92           ;room for a temporary float value
 128 L_SCR1          equ     LV+108          ;room for a temporary long value
 129 L_SCR2          equ     LV+112          ;room for a temporary long value
 130 STORE_FLG       equ     LV+116
 131 BINDEC_FLG      equ     LV+117          ;used in bindec
 132 DNRM_FLG        equ     LV+118          ;used in res_func
 133 RES_FLG         equ     LV+119          ;used in res_func
 134 DY_MO_FLG       equ     LV+120          ;dyadic/monadic flag
 135 UFLG_TMP        equ     LV+121          ;temporary for uflag errata
 136 CU_ONLY         equ     LV+122          ;cu-only flag
 137 VER_TMP         equ     LV+123          ;temp holding for version number
 138 L_SCR3          equ     LV+124          ;room for a temporary long value
 139 FP_SCR3         equ     LV+128          ;room for a temporary float value
 140 FP_SCR4         equ     LV+144          ;room for a temporary float value
 141 FP_SCR5         equ     LV+160          ;room for a temporary float value
 142 FP_SCR6         equ     LV+176
 143 *
 144 *NEXT           equ     LV+192          ;need to increase LOCAL_SIZE
 145 *
 146 *--------------------------------------------------------------------------
 147 *
 148 *       fsave offsets and bit definitions
 149 *
 150 *       Offsets are defined from the end of an fsave because the last 10
 151 *       words of a busy frame are the same as the unimplemented frame.
 152 *
 153 CU_SAVEPC       equ     LV-92           ;micro-pc for CU (1 byte)
 154 FPR_DIRTY_BITS  equ     LV-91           ;fpr dirty bits
 155 *
 156 WBTEMP          equ     LV-76           ;write back temp (12 bytes)
 157 WBTEMP_EX       equ     WBTEMP          ;wbtemp sign and exponent (2 bytes)
 158 WBTEMP_HI       equ     WBTEMP+4        ;wbtemp mantissa [63:32] (4 bytes)
 159 WBTEMP_LO       equ     WBTEMP+8        ;wbtemp mantissa [31:00] (4 bytes)
 160 *
 161 WBTEMP_SGN      equ     WBTEMP+2        ;used to store sign
 162 *
 163 FPSR_SHADOW     equ     LV-64           ;fpsr shadow reg
 164 *
 165 FPIARCU         equ     LV-60           ;Instr. addr. reg. for CU (4 bytes)
 166 *
 167 CMDREG2B        equ     LV-52           ;cmd reg for machine 2
 168 CMDREG3B        equ     LV-48           ;cmd reg for E3 exceptions (2 bytes)
 169 *
 170 NMNEXC          equ     LV-44           ;NMNEXC (unsup,snan bits only)
 171 nmn_unsup_bit   equ     1
 172 nmn_snan_bit    equ     0
 173 *
 174 NMCEXC          equ     LV-43           ;NMNEXC & NMCEXC
 175 nmn_operr_bit   equ     7
 176 nmn_ovfl_bit    equ     6
 177 nmn_unfl_bit    equ     5
 178 nmc_unsup_bit   equ     4
 179 nmc_snan_bit    equ     3
 180 nmc_operr_bit   equ     2
 181 nmc_ovfl_bit    equ     1
 182 nmc_unfl_bit    equ     0
 183 *
 184 STAG            equ     LV-40           ;source tag (1 byte)
 185 WBTEMP_GRS      equ     LV-40           ;alias wbtemp guard, round, sticky
 186 guard_bit       equ     1               ;guard bit is bit number 1
 187 round_bit       equ     0               ;round bit is bit number 0
 188 stag_mask       equ     $E0             ;upper 3 bits are source tag type
 189 denorm_bit      equ     7               ;bit determins if denorm or unnorm
 190 etemp15_bit     equ     4               ;etemp exponent bit #15
 191 wbtemp66_bit    equ     2               ;wbtemp mantissa bit #66
 192 wbtemp1_bit     equ     1               ;wbtemp mantissa bit #1
 193 wbtemp0_bit     equ     0               ;wbtemp mantissa bit #0
 194 *
 195 STICKY          equ     LV-39           ;holds sticky bit
 196 sticky_bit      equ     7
 197 *
 198 CMDREG1B        equ     LV-36           ;cmd reg for E1 exceptions (2 bytes)
 199 kfact_bit       equ     12              ;distinguishes static/dynamic k-factor
 200 *                                       ;on packed move out's.  NOTE: this
 201 *                                       ;equate only works when CMDREG1B is in
 202 *                                       ;a register.
 203 *
 204 CMDWORD         equ     LV-35           ;command word in cmd1b
 205 direction_bit   equ     5               ;bit 0 in opclass
 206 size_bit2       equ     12              ;bit 2 in size field
 207 *
 208 DTAG            equ     LV-32           ;dest tag (1 byte)
 209 dtag_mask       equ     $E0             ;upper 3 bits are dest type tag
 210 fptemp15_bit    equ     4               ;fptemp exponent bit #15
 211 *
 212 WB_BYTE         equ     LV-31           ;holds WBTE15 bit (1 byte)
 213 wbtemp15_bit    equ     4               ;wbtemp exponent bit #15
 214 *
 215 E_BYTE          equ     LV-28           ;holds E1 and E3 bits (1 byte)
 216 E1              equ     2               ;which bit is E1 flag
 217 E3              equ     1               ;which bit is E3 flag
 218 SFLAG           equ     0               ;which bit is S flag
 219 *
 220 T_BYTE          equ     LV-27           ;holds T and U bits (1 byte)
 221 XFLAG           equ     7               ;which bit is X flag
 222 UFLAG           equ     5               ;which bit is U flag
 223 TFLAG           equ     4               ;which bit is T flag
 224 *
 225 FPTEMP          equ     LV-24           ;fptemp (12 bytes)
 226 FPTEMP_EX       equ     FPTEMP          ;fptemp sign and exponent (2 bytes)
 227 FPTEMP_HI       equ     FPTEMP+4        ;fptemp mantissa [63:32] (4 bytes)
 228 FPTEMP_LO       equ     FPTEMP+8        ;fptemp mantissa [31:00] (4 bytes)
 229 *
 230 FPTEMP_SGN      equ     FPTEMP+2        ;used to store sign
 231 *
 232 ETEMP           equ     LV-12           ;etemp (12 bytes)
 233 ETEMP_EX        equ     ETEMP           ;etemp sign and exponent (2 bytes)
 234 ETEMP_HI        equ     ETEMP+4         ;etemp mantissa [63:32] (4 bytes)
 235 ETEMP_LO        equ     ETEMP+8         ;etemp mantissa [31:00] (4 bytes)
 236 *
 237 ETEMP_SGN       equ     ETEMP+2         ;used to store sign
 238 *
 239 EXC_SR          equ     4               ;exception frame status register
 240 EXC_PC          equ     6               ;exception frame program counter
 241 EXC_VEC         equ     10              ;exception frame vector (format+vector#)
 242 EXC_EA          equ     12              ;exception frame effective address
 243 *
 244 *--------------------------------------------------------------------------
 245 *
 246 *       FPSR/FPCR bits
 247 *
 248 neg_bit         equ     3       negative result
 249 z_bit           equ     2       zero result
 250 inf_bit         equ     1       infinity result
 251 nan_bit         equ     0       not-a-number result
 252 *
 253 q_sn_bit        equ     7       sign bit of quotient byte
 254 *
 255 bsun_bit        equ     7       branch on unordered
 256 snan_bit        equ     6       signalling nan
 257 operr_bit       equ     5       operand error
 258 ovfl_bit        equ     4       overflow
 259 unfl_bit        equ     3       underflow
 260 dz_bit          equ     2       divide by zero
 261 inex2_bit       equ     1       inexact result 2
 262 inex1_bit       equ     0       inexact result 1
 263 *
 264 aiop_bit        equ     7       accrued illegal operation
 265 aovfl_bit       equ     6       accrued overflow
 266 aunfl_bit       equ     5       accrued underflow
 267 adz_bit         equ     4       accrued divide by zero
 268 ainex_bit       equ     3       accrued inexact
 269 *
 270 *       FPSR individual bit masks
 271 *
 272 neg_mask        equ     $08000000
 273 z_mask          equ     $04000000
 274 inf_mask        equ     $02000000
 275 nan_mask        equ     $01000000
 276 *
 277 bsun_mask       equ     $00008000
 278 snan_mask       equ     $00004000
 279 operr_mask      equ     $00002000
 280 ovfl_mask       equ     $00001000
 281 unfl_mask       equ     $00000800
 282 dz_mask         equ     $00000400
 283 inex2_mask      equ     $00000200
 284 inex1_mask      equ     $00000100
 285 *
 286 aiop_mask       equ     $00000080       accrued illegal operation
 287 aovfl_mask      equ     $00000040       accrued overflow
 288 aunfl_mask      equ     $00000020       accrued underflow
 289 adz_mask        equ     $00000010       accrued divide by zero
 290 ainex_mask      equ     $00000008       accrued inexact
 291 *
 292 *       FPSR combinations used in the FPSP
 293 *
 294 dzinf_mask      equ     inf_mask+dz_mask+adz_mask
 295 opnan_mask      equ     nan_mask+operr_mask+aiop_mask
 296 nzi_mask        equ     $01ffffff       clears N, Z, and I
 297 unfinx_mask     equ     unfl_mask+inex2_mask+aunfl_mask+ainex_mask
 298 unf2inx_mask    equ     unfl_mask+inex2_mask+ainex_mask
 299 ovfinx_mask     equ     ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
 300 inx1a_mask      equ     inex1_mask+ainex_mask
 301 inx2a_mask      equ     inex2_mask+ainex_mask
 302 snaniop_mask    equ     nan_mask+snan_mask+aiop_mask
 303 naniop_mask     equ     nan_mask+aiop_mask
 304 neginf_mask     equ     neg_mask+inf_mask
 305 infaiop_mask    equ     inf_mask+aiop_mask
 306 negz_mask       equ     neg_mask+z_mask
 307 opaop_mask      equ     operr_mask+aiop_mask
 308 unfl_inx_mask   equ     unfl_mask+aunfl_mask+ainex_mask
 309 ovfl_inx_mask   equ     ovfl_mask+aovfl_mask+ainex_mask
 310 *
 311 *--------------------------------------------------------------------------
 312 *
 313 *       FPCR rounding modes
 314 *
 315 x_mode          equ     $00     round to extended
 316 s_mode          equ     $40     round to single
 317 d_mode          equ     $80     round to double
 318 *
 319 rn_mode         equ     $00     round nearest
 320 rz_mode         equ     $10     round to zero
 321 rm_mode         equ     $20     round to minus infinity
 322 rp_mode         equ     $30     round to plus infinity
 323 *
 324 *--------------------------------------------------------------------------
 325 *
 326 *       Miscellaneous equates
 327 *
 328 signan_bit      equ     6       signalling nan bit in mantissa
 329 sign_bit        equ     7
 330 *
 331 rnd_stky_bit    equ     29      round/sticky bit of mantissa
 332 *                               this can only be used if in a data register
 333 sx_mask         equ     $01800000 set s and x bits in word $48
 334 *
 335 LOCAL_EX        equ     0
 336 LOCAL_SGN       equ     2
 337 LOCAL_HI        equ     4
 338 LOCAL_LO        equ     8
 339 LOCAL_GRS       equ     12      valid ONLY for FP_SCR1, FP_SCR2
 340 *
 341 *
 342 norm_tag        equ     $00     tag bits in {7:5} position
 343 zero_tag        equ     $20
 344 inf_tag         equ     $40
 345 nan_tag         equ     $60
 346 dnrm_tag        equ     $80
 347 *
 348 *       fsave sizes and formats
 349 *
 350 VER_4           equ     $40             fpsp compatible version numbers
 351 *                                       are in the $40s {$40-$4f}
 352 VER_40          equ     $40             original version number
 353 VER_41          equ     $41             revision version number
 354 *
 355 BUSY_SIZE       equ     100             size of busy frame
 356 BUSY_FRAME      equ     LV-BUSY_SIZE    start of busy frame
 357 *
 358 UNIMP_40_SIZE   equ     44              size of orig unimp frame
 359 UNIMP_41_SIZE   equ     52              size of rev unimp frame
 360 *
 361 IDLE_SIZE       equ     4               size of idle frame
 362 IDLE_FRAME      equ     LV-IDLE_SIZE    start of idle frame
 363 *
 364 *       exception vectors
 365 *
 366 TRACE_VEC       equ     $2024           trace trap
 367 FLINE_VEC       equ     $002C           'real' F-line
 368 UNIMP_VEC       equ     $202C           unimplemented
 369 INEX_VEC        equ     $00C4
 370 *
 371 dbl_thresh      equ     $3C01
 372 sgl_thresh      equ     $3F81
 373 *