arch/x86-all/processor/getcpuinfo.c

   1 /*
   2     Copyright © 2010-2013, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: GetCPUInfo() - Provides information about installed CPUs
   6     Lang: english
   7 */
   8
   9 #define DEBUG 0
  10 #include <aros/debug.h>
  11
  12 #include <aros/libcall.h>
  13 #include <resources/processor.h>
  14 #include <proto/utility.h>
  15
  16 #include "processor_intern.h"
  17 #include "processor_arch_intern.h"
  18
  19 static void ProcessFeaturesTag(struct X86ProcessorInformation * info, struct TagItem * tag);
  20
  21 #include <proto/processor.h>
  22
  23 /* See rom/processor/getcpuinfo.c for documentation */
  24
  25 AROS_LH1(void, GetCPUInfo,
  26     AROS_LHA(struct TagItem *, tagList, A0),
  27     struct ProcessorBase *, ProcessorBase, 1, Processor)
  28 {
  29     AROS_LIBFUNC_INIT
  30
  31     struct TagItem * passedTag = NULL;
  32     struct X86ProcessorInformation * processor = NULL;
  33     struct X86ProcessorInformation **sysprocs = ProcessorBase->Private1;
  34     ULONG selectedprocessor = 0;
  35
  36     D(bug("[processor.x86] :%s()\n", __PRETTY_FUNCTION__));
  37
  38     /* If processor was not selected, fall back to legacy mode and report on
  39     first available processor */
  40     selectedprocessor = (ULONG)GetTagData(GCIT_SelectedProcessor, 0, tagList);
  41
  42     /* If selectedprocessor not in line with number of processors, report on
  43     first available processor */
  44     if (selectedprocessor >= ProcessorBase->cpucount)
  45         selectedprocessor = 0;
  46
  47     processor = sysprocs[selectedprocessor];
  48
  49     /* Go over each passed tag and fill apprioprate data */
  50     while ((passedTag = NextTagItem(&tagList)) != NULL)
  51     {
  52         if ((passedTag->ti_Tag > GCIT_FeaturesBase) &&
  53             (passedTag->ti_Tag <= GCIT_FeaturesLast))
  54         {
  55             ProcessFeaturesTag(processor, passedTag);
  56         }
  57         else
  58         {
  59         switch(passedTag->ti_Tag)
  60         {
  61         case(GCIT_NumberOfProcessors):
  62             *((ULONG *)passedTag->ti_Data) = ProcessorBase->cpucount;
  63             break;
  64         case(GCIT_ModelString):
  65             *((CONST_STRPTR *)passedTag->ti_Data) = processor->BrandString;
  66             break;
  67         case(GCIT_Family):
  68             *((ULONG *)passedTag->ti_Data) = processor->Family;
  69             break;
  70         case(GCIT_VectorUnit):
  71             *((ULONG *)passedTag->ti_Data) = processor->VectorUnit;
  72             break;
  73         case(GCIT_L1CacheSize):
  74             *((ULONG *)passedTag->ti_Data) =
  75                 (processor->L1DataCacheSize + processor->L1InstructionCacheSize);
  76             break;
  77         case(GCIT_L1DataCacheSize):
  78             *((ULONG *)passedTag->ti_Data) = processor->L1DataCacheSize;
  79             break;
  80         case(GCIT_L1InstructionCacheSize):
  81             *((ULONG *)passedTag->ti_Data) = processor->L1InstructionCacheSize;
  82             break;
  83         case(GCIT_L2CacheSize):
  84             *((ULONG *)passedTag->ti_Data) = processor->L2CacheSize;
  85             break;
  86         case(GCIT_L3CacheSize):
  87             *((ULONG *)passedTag->ti_Data) = processor->L3CacheSize;
  88             break;
  89         case(GCIT_CacheLineSize):
  90             *((ULONG *)passedTag->ti_Data) = processor->CacheLineSize;
  91             break;
  92         case(GCIT_Architecture):
  93             *((ULONG *)passedTag->ti_Data) = PROCESSORARCH_X86;
  94             break;
  95         case(GCIT_Endianness):
  96             *((ULONG *)passedTag->ti_Data) = ENDIANNESS_LE;
  97             break;
  98         case(GCIT_ProcessorSpeed):
  99             *((UQUAD *)passedTag->ti_Data) = GetCurrentProcessorFrequency(processor);
 100             break;
 101         case(GCIT_ProcessorLoad):
 102             *((UBYTE *)passedTag->ti_Data) = 0; /* TODO: IMPLEMENT */
 103             break;
 104         case(GCIT_FrontsideSpeed):
 105             *((UQUAD *)passedTag->ti_Data) = processor->MaxFSBFrequency;
 106             break;
 107
 108         case GCIT_Vendor:
 109             *((ULONG *)passedTag->ti_Data) = processor->Vendor;
 110             break;
 111         }
 112         }
 113     }
 114
 115     AROS_LIBFUNC_EXIT
 116 } /* GetCPUInfo() */
 117
 118 static void ProcessFeaturesTag(struct X86ProcessorInformation * info, struct TagItem * tag)
 119 {
 120 D(bug("[processor.x86] :%s()\n", __PRETTY_FUNCTION__));
 121
 122     switch(tag->ti_Tag)
 123     {
 124     case(GCIT_SupportsFPU):
 125         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_FPU) >> FEATB_FPU); break;
 126     case(GCIT_SupportsMMX):
 127         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_MMX) >> FEATB_MMX); break;
 128     case(GCIT_SupportsSSE):
 129         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_SSE) >> FEATB_SSE); break;
 130     case(GCIT_SupportsSSE2):
 131         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_SSE2) >> FEATB_SSE2); break;
 132     case(GCIT_SupportsSSE3):
 133         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features2 & FEATF_SSE3) >> FEATB_SSE3); break;
 134     case(GCIT_SupportsSSSE3):
 135         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features2 & FEATF_SSSE3) >> FEATB_SSSE3); break;
 136     case(GCIT_SupportsSSE41):
 137         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features2 & FEATF_SSE41) >> FEATB_SSE41); break;
 138     case(GCIT_SupportsSSE42):
 139         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features2 & FEATF_SSE42) >> FEATB_SSE42); break;
 140     case(GCIT_SupportsMMXEXT):
 141         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features3 & FEATF_MMXEXT) >> FEATB_MMXEXT); break;
 142     case(GCIT_Supports3DNOW):
 143         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features3 & FEATF_3DNOW) >> FEATB_3DNOW); break;
 144     case(GCIT_Supports3DNOWEXT):
 145         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features3 & FEATF_3DNOWEXT) >> FEATB_3DNOWEXT); break;
 146     case(GCIT_SupportsSSE4A):
 147         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features4 & FEATF_SSE4A) >> FEATB_SSE4A); break;
 148     case(GCIT_SupportsVME):
 149         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_VME) >> FEATB_VME); break;
 150     case(GCIT_SupportsPSE):
 151         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_PSE) >> FEATB_PSE); break;
 152     case(GCIT_SupportsPAE):
 153         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_PAE) >> FEATB_PAE); break;
 154     case(GCIT_SupportsCX8):
 155         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_CX8) >> FEATB_CX8); break;
 156     case(GCIT_SupportsAPIC):
 157         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_APIC) >> FEATB_APIC); break;
 158     case(GCIT_SupportsCMOV):
 159         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_CMOV) >> FEATB_CMOV); break;
 160     case(GCIT_SupportsPSE36):
 161         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_PSE36) >> FEATB_PSE36); break;
 162     case(GCIT_SupportsCLFSH):
 163         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_CLFSH) >> FEATB_CLFSH); break;
 164     case(GCIT_SupportsACPI):
 165         if (info->Vendor == VENDOR_INTEL)
 166             *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_ACPI) >> FEATB_ACPI);
 167         else
 168             *((BOOL *)tag->ti_Data) = FALSE; /* TODO: IMPLEMENT FOR AMD */
 169         break;
 170     case(GCIT_SupportsFXSR):
 171         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_FXSR) >> FEATB_FXSR); break;
 172     case(GCIT_SupportsHTT):
 173         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_HTT) >> FEATB_HTT); break;
 174     case(GCIT_SupportsCX16):
 175         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features2 & FEATF_CX16) >> FEATB_CX16); break;
 176     case(GCIT_SupportsVirtualization):
 177         switch(info->Vendor)
 178         {
 179         case(VENDOR_INTEL):
 180             *((BOOL *)tag->ti_Data) = (BOOL)((info->Features2 & FEATF_VMX) >> FEATB_VMX); break;
 181         case(VENDOR_AMD):
 182             *((BOOL *)tag->ti_Data) = (BOOL)((info->Features4 & FEATF_SVM) >> FEATB_SVM); break;
 183         default:
 184             *((BOOL *)tag->ti_Data) = FALSE; break;
 185         };
 186         break;
 187     case(GCIT_SupportsNoExecutionBit):
 188         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features3 & FEATF_XDNX) >> FEATB_XDNX); break;
 189     case(GCIT_Supports64BitMode):
 190         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features3 & FEATF_AMD64) >> FEATB_AMD64); break;
 191     case(GCIT_SupportsMSR):
 192         *((BOOL *)tag->ti_Data) = (BOOL)((info->Features1 & FEATF_MSR) >> FEATB_MSR); break;
 193     default:
 194         *((BOOL *)tag->ti_Data) = FALSE; break;
 195     }
 196 }