rom/usb/pciusbhc/ohci/dev.h

   1 /*
   2    Copyright © 2002-2009, Chris Hodges. All rights reserved.
   3    Copyright © 2009-2012, The AROS Development Team. All rights reserved.
   4    $Id$
   5  */
   6
   7 #ifndef DEV_H
   8 #define DEV_H
   9
  10 #include LC_LIBDEFS_FILE
  11
  12 #include <aros/libcall.h>
  13 #include <aros/asmcall.h>
  14 #include <aros/symbolsets.h>
  15
  16 #include <exec/types.h>
  17 #include <exec/lists.h>
  18 #include <exec/memory.h>
  19 #include <exec/libraries.h>
  20 #include <exec/interrupts.h>
  21 #include <exec/semaphores.h>
  22 #include <exec/execbase.h>
  23 #include <exec/devices.h>
  24 #include <exec/io.h>
  25 #include <exec/ports.h>
  26 #include <exec/errors.h>
  27 #include <exec/resident.h>
  28 #include <exec/initializers.h>
  29 #include <dos/dos.h>
  30
  31 #include <devices/timer.h>
  32 #include <utility/utility.h>
  33
  34 #include <devices/usbhardware.h>
  35 #include <devices/newstyle.h>
  36
  37 #include <oop/oop.h>
  38
  39 /* Reply the iorequest with success */
  40 #define RC_OK         0
  41
  42 /* Magic cookie, don't set error fields & don't reply the ioreq */
  43 #define RC_DONTREPLY  -1
  44
  45 #define MAX_ROOT_PORTS   16
  46
  47 enum
  48 {
  49     CTRL_XFER,
  50     BULK_XFER,
  51     ISO_XFER,
  52     INT_XFER,
  53     XFER_COUNT
  54 };
  55
  56 #define INT_LIST_COUNT 6
  57
  58 extern CONST_STRPTR xfer_names[];
  59
  60 #define PCI_CLASS_SERIAL_USB 0x0c03
  61
  62 /* The unit node - private */
  63 struct PCIUnit
  64 {
  65     struct Unit hu_Unit;
  66     LONG hu_UnitNo;
  67
  68     struct PCIDevice *hu_Device;        /* Uplink */
  69
  70     struct MsgPort *hu_MsgPort;
  71     struct timerequest *hu_TimerReq;    /* Timer I/O Request */
  72
  73     struct timerequest hu_LateIOReq;    /* Timer I/O Request */
  74     struct MsgPort hu_LateMsgPort;
  75
  76     struct timerequest hu_NakTimeoutReq;
  77     struct MsgPort hu_NakTimeoutMsgPort;
  78     struct Interrupt hu_NakTimeoutInt;
  79
  80     BOOL hu_UnitAllocated;      /* Unit opened */
  81
  82     ULONG hu_DevID;             /* Device ID (BusID+DevNo) */
  83     struct List hu_Controllers; /* List of controllers */
  84     UWORD hu_RootHub11Ports;
  85     UWORD hu_RootHub20Ports;
  86     UWORD hu_RootHubPorts;
  87     UWORD hu_RootHubAddr;       /* Root Hub Address */
  88     UWORD hu_RootPortChanges;   /* Merged root hub changes */
  89     ULONG hu_FrameCounter;      /* Common frame counter */
  90     struct List hu_RHIOQueue;   /* Root Hub Pending IO Requests */
  91
  92     struct PCIController *hu_PortMap11[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 1.1 controller */
  93     struct PCIController *hu_PortMap20[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 2.0 controller */
  94     UBYTE hu_PortNum11[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 1.1 companion controller port */
  95     UBYTE hu_EhciOwned[MAX_ROOT_PORTS]; /* TRUE, if currently owned by EHCI */
  96     UBYTE hu_ProductName[80];   /* for Query device */
  97     struct PCIController *hu_DevControllers[128];       /* maps from Device address to controller */
  98     struct IOUsbHWReq *hu_DevBusyReq[128 * 16 * 2];     /* pointer to io assigned to the Endpoint */
  99     ULONG hu_NakTimeoutFrame[128 * 16 * 2];     /* Nak Timeout framenumber */
 100     UBYTE hu_DevDataToggle[128 * 16 * 2];       /* Data toggle bit for endpoints */
 101 };
 102
 103 struct PCIController
 104 {
 105     struct Node hc_Node;
 106     struct PCIDevice *hc_Device;        /* Uplink */
 107     struct PCIUnit *hc_Unit;    /* Uplink */
 108
 109     OOP_Object *hc_PCIDeviceObject;
 110     OOP_Object *hc_PCIDriverObject;
 111     ULONG hc_DevID;
 112     UWORD hc_FunctionNum;
 113     UWORD hc_HCIType;
 114     UWORD hc_NumPorts;
 115     UWORD hc_Flags;             /* See below */
 116
 117     volatile APTR hc_RegBase;
 118
 119     APTR hc_PCIMem;
 120     ULONG hc_PCIMemSize;
 121     IPTR hc_PCIVirtualAdjust;
 122     IPTR hc_PCIIntLine;
 123     struct Interrupt hc_PCIIntHandler;
 124     ULONG hc_PCIIntEnMask;
 125
 126     struct MinList hc_EDLists[XFER_COUNT + INT_LIST_COUNT - 1];
 127     struct EDNode *hc_TermED;
 128     struct TDNode *hc_TermTD;
 129     struct HCCA *hc_HCCA;
 130     struct MinList hc_FreeEDList;
 131     struct MinList hc_FreeTDList;
 132     struct EDNode *hc_AsyncFreeED;
 133     ULONG hc_DoneQueue;
 134     struct List hc_RetireQueue;
 135
 136     ULONG hc_FrameCounter;
 137     struct List hc_TDQueue;
 138     struct List hc_AbortQueue;
 139     struct List hc_PeriodicTDQueue;
 140     struct List hc_XferQueues[XFER_COUNT];
 141
 142     struct Interrupt hc_CompleteInt;
 143     struct Interrupt hc_ResetInt;
 144
 145     UBYTE hc_PortNum20[MAX_ROOT_PORTS]; /* Global Port number the local controller port corresponds with */
 146
 147     UWORD hc_PortChangeMap[MAX_ROOT_PORTS];     /* Port Change Map */
 148
 149     BOOL hc_complexrouting;
 150     ULONG hc_portroute;
 151
 152 };
 153
 154 /* hc_Flags */
 155 #define HCF_ALLOCATED   0x0001  /* PCI board allocated           */
 156 #define HCF_ONLINE      0x0002  /* Online                        */
 157 #define HCF_STOP_BULK   0x0004  /* Bulk transfers stopped        */
 158 #define HCF_STOP_CTRL   0x0008  /* Control transfers stopped     */
 159 #define HCF_ABORT       0x0010  /* Aborted requests available    */
 160
 161 /* The device node - private
 162  */
 163 struct PCIDevice
 164 {
 165     struct Library hd_Library;  /* standard */
 166     UWORD hd_Flags;             /* various flags */
 167
 168     struct UtilityBase *hd_UtilityBase; /* for tags etc */
 169
 170     struct List hd_TempHCIList;
 171     OOP_Object *hd_PCIHidd;
 172     OOP_AttrBase hd_HiddAB;
 173     OOP_AttrBase hd_HiddPCIDeviceAB;
 174
 175     BOOL hd_ScanDone;           /* PCI scan done? */
 176     APTR hd_MemPool;            /* Memory Pool */
 177
 178     struct List hd_Units;       /* List of units */
 179 };
 180
 181 /* hd_Flags */
 182 #define HDF_FORCEPOWER  0x01
 183
 184 #endif /* DEV_H */