rom/usb/pciusbhc/uhci/pciuhci.h

   1 #ifndef PCIUHCI_H
   2 #define PCIUHCI_H
   3
   4 /*
   5  *----------------------------------------------------------------------------
   6  *                         Includes for pciuhci.device
   7  *----------------------------------------------------------------------------
   8  *                   By Chris Hodges <chrisly@platon42.de>
   9  */
  10
  11 #include LC_LIBDEFS_FILE
  12
  13 #include <aros/libcall.h>
  14 #include <aros/asmcall.h>
  15 #include <aros/symbolsets.h>
  16
  17 #include <exec/types.h>
  18 #include <exec/lists.h>
  19 #include <exec/memory.h>
  20 #include <exec/libraries.h>
  21 #include <exec/interrupts.h>
  22 #include <exec/semaphores.h>
  23 #include <exec/execbase.h>
  24 #include <exec/devices.h>
  25 #include <exec/io.h>
  26 #include <exec/ports.h>
  27 #include <exec/errors.h>
  28 #include <exec/resident.h>
  29 #include <exec/initializers.h>
  30 #include <dos/dos.h>
  31
  32 #include <devices/timer.h>
  33 #include <utility/utility.h>
  34
  35 #include <devices/usbhardware.h>
  36 #include <devices/newstyle.h>
  37
  38 #include <oop/oop.h>
  39
  40 #include "debug.h"
  41
  42 /* Reply the iorequest with success */
  43 #define RC_OK         0
  44
  45 /* Magic cookie, don't set error fields & don't reply the ioreq */
  46 #define RC_DONTREPLY  -1
  47
  48 #define MAX_ROOT_PORTS   16
  49
  50 /* The unit node - private */
  51 struct PCIUnit {
  52     struct Unit           hu_Unit;
  53     LONG                  hu_UnitNo;
  54
  55     struct PCIDevice     *hu_Device;         /* Uplink */
  56
  57     struct MsgPort       *hu_MsgPort;
  58     struct timerequest   *hu_TimerReq;       /* Timer I/O Request */
  59
  60     struct timerequest    hu_LateIOReq;      /* Timer I/O Request */
  61     struct MsgPort        hu_LateMsgPort;
  62
  63     struct timerequest    hu_NakTimeoutReq;
  64     struct MsgPort        hu_NakTimeoutMsgPort;
  65     struct Interrupt      hu_NakTimeoutInt;
  66
  67     BOOL                  hu_UnitAllocated;  /* Unit opened */
  68
  69     ULONG                 hu_DevID;          /* Device ID (BusID+DevNo) */
  70     struct List           hu_Controllers;    /* List of controllers */
  71
  72     UWORD                 hu_RootHubPorts;
  73     UWORD                 hu_RootHubAddr;    /* Root Hub Address */
  74     UWORD                 hu_RootPortChanges; /* Merged root hub changes */
  75
  76     struct List           hu_RHIOQueue;      /* Root Hub Pending IO Requests */
  77
  78     struct PCIController *hu_PortMap11[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 1.1 controller */
  79     UBYTE                 hu_PortNum11[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 1.1 companion controller port */
  80
  81     struct PCIController *hu_DevControllers[128]; /* maps from Device address to controller */
  82     struct IOUsbHWReq    *hu_DevBusyReq[128*16*2]; /* pointer to io assigned to the Endpoint */
  83     ULONG                 hu_NakTimeoutFrame[128*16*2]; /* Nak Timeout framenumber */
  84     UBYTE                 hu_DevDataToggle[128*16*2]; /* Data toggle bit for endpoints */
  85 };
  86
  87 #define HCITYPE_UHCI     0x00
  88
  89 struct PCIController {
  90     struct Node           hc_Node;
  91     struct PCIDevice     *hc_Device;        /* Uplink */
  92     struct PCIUnit       *hc_Unit;          /* Uplink */
  93
  94     OOP_Object           *hc_PCIDeviceObject;
  95     OOP_Object           *hc_PCIDriverObject;
  96     ULONG                 hc_DevID;
  97     UWORD                 hc_FunctionNum;
  98     UWORD                 hc_HCIType;
  99     UWORD                 hc_NumPorts;
 100     UWORD                 hc_Flags;         /* See below */
 101
 102     volatile APTR         hc_RegBase;
 103
 104     APTR                  hc_PCIMem;
 105     ULONG                 hc_PCIMemSize;
 106     ULONG                 hc_PCIVirtualAdjust;
 107     IPTR                  hc_PCIIntLine;
 108     struct Interrupt      hc_PCIIntHandler;
 109     ULONG                 hc_PCIIntEnMask;
 110
 111     ULONG                *hc_UhciFrameList;
 112     struct UhciQH        *hc_UhciQHPool;
 113     struct UhciTD        *hc_UhciTDPool;
 114
 115     struct UhciQH        *hc_UhciCtrlQH;
 116     struct UhciQH        *hc_UhciBulkQH;
 117     struct UhciQH        *hc_UhciIntQH[9];
 118     struct UhciTD        *hc_UhciIsoTD;
 119     struct UhciQH        *hc_UhciTermQH;
 120
 121
 122     volatile BOOL         hc_AsyncAdvanced;
 123
 124     struct EhciTD        *hc_ShortPktEndTD;
 125
 126     ULONG                 hc_FrameCounter;
 127     struct List           hc_TDQueue;
 128     struct List           hc_AbortQueue;
 129     struct List           hc_PeriodicTDQueue;
 130     struct List           hc_CtrlXFerQueue;
 131     struct List           hc_IntXFerQueue;
 132     struct List           hc_IsoXFerQueue;
 133     struct List           hc_BulkXFerQueue;
 134
 135     struct Interrupt      hc_CompleteInt;
 136     struct Interrupt      hc_ResetInt;
 137
 138     UBYTE                 hc_PortNumGlobal[MAX_ROOT_PORTS]; /* Contains per unit assigned port number, HC has local ports 0 to 1  */
 139     UWORD                 hc_PortChangeMap[MAX_ROOT_PORTS]; /* Port Change Map */
 140
 141     BOOL                  hc_complexrouting;
 142     UQUAD                 hc_portroute;
 143
 144 };
 145
 146 /* hc_Flags */
 147 #define HCF_ALLOCATED   0x0001  /* PCI board allocated */
 148 #define HCF_ONLINE      0x0002  /* Online */
 149 #define HCF_STOP_BULK   0x0004  /* Bulk transfers stopped */
 150 #define HCF_STOP_CTRL   0x0008  /* Control transfers stopped */
 151 #define HCF_ABORT       0x0010  /* Aborted requests available */
 152
 153 /* The device node - private
 154 */
 155 struct PCIDevice {
 156     struct Library      hd_Library;       /* standard */
 157     UWORD               hd_Flags;         /* various flags */
 158
 159     struct List         hd_TempHCIList;
 160     OOP_Object         *hd_PCIHidd;
 161     OOP_AttrBase        hd_HiddAB;
 162     OOP_AttrBase        hd_HiddPCIDeviceAB;
 163
 164     BOOL                hd_ScanDone;      /* PCI scan done? */
 165     APTR                hd_MemPool;       /* Memory Pool */
 166
 167         struct List         hd_Units;         /* List of units */
 168 };
 169
 170 /* hd_Flags */
 171 #define HDF_FORCEPOWER  0x01
 172
 173 #endif /* PCIUHCI_H */