rom/usb/pciusbhc/xhci/pcixhci_intern.h

   1 /*
   2     Copyright © 2014, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc:
   6     Lang: English
   7 */
   8 #ifndef PCIXHCI_INTERN_H
   9 #define PCIXHCI_INTERN_H
  10
  11 #include <aros/io.h>
  12 #include <aros/debug.h>
  13 #include <aros/macros.h>
  14 #include <aros/asmcall.h>
  15 #include <aros/symbolsets.h>
  16
  17 #include <proto/oop.h>
  18 #include <proto/exec.h>
  19 #include <proto/stdc.h>
  20 #include <proto/arossupport.h>
  21
  22 #include <devices/usb.h>
  23 #include <devices/usb_hub.h>
  24 #include <devices/newstyle.h>
  25 #include <devices/usbhardware.h>
  26 #include <devices/timer.h>
  27
  28 #include <asm/io.h>
  29 #include <inttypes.h>
  30
  31 #include <hidd/pci.h>
  32 #include <hidd/hidd.h>
  33
  34 #include LC_LIBDEFS_FILE
  35
  36 #define RC_OK         0
  37 #define RC_DONTREPLY -1
  38
  39 #define MYBUG_LEVEL 1
  40 #define mybug(l, x) D(if ((l>=MYBUG_LEVEL)||(l==-1)) { do { { bug x; } } while (0); } )
  41 #define mybug_unit(l, x) D(if ((l>=MYBUG_LEVEL)||(l==-1)) { do { { bug("%s %s: ", unit->name, __FUNCTION__); bug x; } } while (0); } )
  42
  43 #define PCI_BASE_CLASS_SERIAL 0x0c
  44 #define PCI_SUB_CLASS_USB     0x03
  45 #define PCI_INTERFACE_XHCI    0x30
  46
  47 struct PCIXHCIPort {
  48     struct Node                  node;
  49     char                         name[256];
  50     ULONG                        number;
  51     ULONG                        status;
  52 };
  53
  54 struct PCIXHCIRootHub {
  55     struct List                  port_list;
  56
  57     struct List                  intxferqueue_list;
  58
  59     UWORD                        addr;
  60
  61     struct UsbStdDevDesc         devdesc;
  62
  63     struct UsbStdBOSDesc         bosdesc;
  64
  65     struct RHConfig {
  66         struct UsbStdCfgDesc     cfgdesc;
  67         struct UsbStdIfDesc      ifdesc;
  68         struct UsbStdEPDesc      epdesc;
  69     }                            config;
  70
  71     struct UsbSSHubDesc          hubdesc;
  72
  73 };
  74
  75 struct PCIXHCIHostController {
  76     OOP_Object                   *pcidevice;
  77     OOP_Object                   *pcidriver;
  78
  79     volatile APTR                 capability_base;
  80     volatile APTR                 operational_base;
  81     volatile APTR                 doorbell_base;
  82     volatile APTR                 runtime_base;
  83
  84     IPTR                          bus;
  85     IPTR                          dev;
  86     IPTR                          sub;
  87     IPTR                          intline;
  88
  89     ULONG                         pagesize;
  90     ULONG                         maxslots;
  91     ULONG                         maxintrs;
  92     ULONG                         maxscratchpads;
  93     ULONG                         maxeventringsegments;
  94
  95     UQUAD                        *dcbaa;     /* Device Context Base Address Array */
  96     UQUAD                        *spbaba;    /* Scratch Pad Buffer Address Base Array */
  97
  98     volatile struct xhci_erste   *erstbl;
  99
 100     char                          intname[256];
 101     struct Interrupt              inthandler;
 102 };
 103
 104 struct PCIXHCIUnit {
 105     struct Node                  node;
 106     char                         name[256];
 107     ULONG                        number;
 108     ULONG                        state;
 109
 110     struct PCIXHCIBase          *pcixhcibase;
 111     struct PCIXHCIRootHub        roothub;
 112     struct PCIXHCIHostController hc;
 113
 114     struct timerequest          *tr;
 115
 116 };
 117
 118 struct PCIXHCIBase {
 119
 120     struct Library               library;
 121     struct List                  unit_list;
 122
 123     OOP_Object                  *pci;
 124     OOP_AttrBase                 HiddAB;
 125     OOP_AttrBase                 HiddPCIDeviceAB;
 126
 127 };
 128
 129 #undef HiddAttrBase
 130 #undef HiddPCIDeviceAttrBase
 131 #define HiddAttrBase (LIBBASE->HiddAB)
 132 #define HiddPCIDeviceAttrBase (LIBBASE->HiddPCIDeviceAB)
 133
 134 VOID PCIXHCI_PCIE(struct PCIXHCIUnit *unit);
 135
 136 BOOL PCIXHCI_Discover(struct PCIXHCIBase *PCIXHCIBase);
 137 BOOL PCIXHCI_HCReset(struct PCIXHCIUnit *unit);
 138 BOOL PCIXHCI_HCHalt(struct PCIXHCIUnit *unit);
 139 BOOL PCIXHCI_GetFromBIOS(struct PCIXHCIUnit *unit);
 140 BOOL PCIXHCI_HCInit(struct PCIXHCIUnit *unit);
 141 BOOL PCIXHCI_FindPorts(struct PCIXHCIUnit *unit);
 142 BOOL PCIXHCI_PortPower(struct PCIXHCIUnit *unit, ULONG portnum, BOOL poweron);
 143 IPTR PCIXHCI_SearchExtendedCap(struct PCIXHCIUnit *unit, ULONG id, IPTR extcapoff);
 144 void PCIXHCI_Delay(struct PCIXHCIUnit *unit, ULONG msec);
 145
 146 void FreeVecOnBoundary(APTR onboundary);
 147 APTR AllocVecOnBoundary(ULONG size, ULONG boundary, STRPTR description);
 148 BOOL PCIXHCI_CreateTimer(struct PCIXHCIUnit *unit);
 149 void PCIXHCI_DeleteTimer(struct PCIXHCIUnit *unit);
 150
 151 VOID PCIXHCI_AllocaterInit(struct PCIXHCIUnit *unit);
 152 struct PCIXHCIAlloc *PCIXHCI_AllocateMemory(struct PCIXHCIUnit *unit, IPTR bytesize, ULONG alignmentmin, IPTR boundary, STRPTR allocname);
 153
 154 BOOL cmdAbortIO(struct IOUsbHWReq *ioreq);
 155 WORD cmdReset(struct IOUsbHWReq *ioreq);
 156 WORD cmdUsbReset(struct IOUsbHWReq *ioreq);
 157 WORD cmdNSDeviceQuery(struct IOStdReq *ioreq);
 158 WORD cmdQueryDevice(struct IOUsbHWReq *ioreq);
 159 WORD cmdControlXFer(struct IOUsbHWReq *ioreq);
 160 WORD cmdControlXFerRootHub(struct IOUsbHWReq *ioreq);
 161 WORD cmdIntXFer(struct IOUsbHWReq *ioreq);
 162 WORD cmdIntXFerRootHub(struct IOUsbHWReq *ioreq);
 163 WORD cmdGetString(struct IOUsbHWReq *ioreq, char *cstring);
 164
 165 #endif /* PCIXHCI_INTERN_H */