Check for SYS/GL during library init. Reason is that
[AROS.git] / workbench / devs / AHI / Drivers / EMU10kx / pci_aos4.c
blobdf33dfa11a5d9edfb49a53ddfade9224e7f46fb9
2 #include <config.h>
4 #include <utility/hooks.h>
5 #include <exec/interrupts.h>
7 #include <proto/expansion.h>
8 #define __NOLIBBASE__
9 #include <proto/ahi_sub.h>
10 #include <proto/utility.h>
12 #include "DriverData.h"
13 #include "pci_wrapper.h"
14 #include "library.h"
16 struct ExpansionBase* ExpansionBase = NULL;
17 struct ExpansionIFace* IExpansion = NULL;
18 struct PCIIFace* IPCI = NULL;
20 BOOL ahi_pci_init(struct DriverBase* AHIsubBase)
22 struct EMU10kxBase* EMU10kxBase = (struct EMU10kxBase*) AHIsubBase;
24 ExpansionBase = (struct ExpansionBase*) OpenLibrary( "expansion.library", 1 );
25 if( ExpansionBase == NULL )
27 Req( "Unable to open 'expansion.library' version 1.\n" );
28 return FALSE;
30 if ((IExpansion = (struct ExpansionIFace *) GetInterface((struct Library *) ExpansionBase, "main", 1, NULL)) == NULL)
32 Req("Couldn't open IExpansion interface!\n");
33 return FALSE;
36 if ((IPCI = (struct PCIIFace *) GetInterface((struct Library *) ExpansionBase, "pci", 1, NULL)) == NULL)
38 Req("Couldn't open IPCI interface!\n");
39 return FALSE;
42 EMU10kxBase->flush_caches = TRUE;
44 return TRUE;
47 void ahi_pci_exit(void)
49 DropInterface( (struct Interface *) IExpansion);
50 DropInterface( (struct Interface *) IPCI);
51 CloseLibrary( (struct Library*) ExpansionBase );
55 APTR ahi_pci_find_device(ULONG vendorid, ULONG deviceid, APTR dev)
57 if (dev) return NULL;
59 return IPCI->FindDeviceTags( FDT_VendorID, vendorid,
60 FDT_DeviceID, deviceid,
61 TAG_DONE );
64 ULONG ahi_pci_inl(ULONG addr, APTR dev)
66 return ((struct PCIDevice * )dev)->InLong(addr);
69 UWORD ahi_pci_inw(ULONG addr, APTR dev)
71 return ((struct PCIDevice * )dev)->InWord(addr);
74 UBYTE ahi_pci_inb(ULONG addr, APTR dev)
76 return ((struct PCIDevice * )dev)->InByte(addr);
79 void ahi_pci_outl(ULONG value, ULONG addr, APTR dev)
81 ((struct PCIDevice * )dev)->OutLong(addr, value);
84 void ahi_pci_outw(UWORD value, ULONG addr, APTR dev)
86 ((struct PCIDevice * )dev)->OutWord(addr, value);
89 void ahi_pci_outb(UBYTE value, ULONG addr, APTR dev)
91 ((struct PCIDevice * )dev)->OutByte(addr, value);
94 ULONG ahi_pci_read_config_long(UBYTE reg, APTR dev)
96 return ((struct PCIDevice * )dev)->ReadConfigLong(reg);
99 UWORD ahi_pci_read_config_word(UBYTE reg, APTR dev)
101 return ((struct PCIDevice * )dev)->ReadConfigWord(reg);
104 UBYTE ahi_pci_read_config_byte(UBYTE reg, APTR dev)
106 return ((struct PCIDevice * )dev)->ReadConfigByte(reg);
109 void ahi_pci_write_config_long(UBYTE reg, ULONG val, APTR dev)
111 ((struct PCIDevice * )dev)->WriteConfigLong(reg, val);
114 void ahi_pci_write_config_word(UBYTE reg, UWORD val, APTR dev)
116 ((struct PCIDevice * )dev)->WriteConfigWord(reg, val);
119 void ahi_pci_write_config_byte(UBYTE reg, UBYTE val, APTR dev)
121 ((struct PCIDevice * )dev)->WriteConfigByte(reg, val);
124 ULONG ahi_pci_get_irq(APTR dev)
126 return ((struct PCIDevice * )dev)->MapInterrupt();
129 BOOL ahi_pci_add_intserver(struct Interrupt *i, APTR dev)
131 AddIntServer(((struct PCIDevice * )dev)->MapInterrupt(), i);
133 return TRUE;
136 void ahi_pci_rem_intserver(struct Interrupt *i, APTR dev)
138 RemIntServer(((struct PCIDevice * )dev)->MapInterrupt(), i);
141 APTR ahi_pci_logic_to_physic_addr(APTR addr, APTR dev)
143 return addr;
146 APTR ahi_pci_get_base_address(WORD which, APTR dev)
148 return (APTR) ((struct PCIDevice * )dev)->GetResourceRange(which)->BaseAddress;
151 ULONG ahi_pci_get_base_size(WORD which, APTR dev)
153 return ((struct PCIDevice * )dev)->GetResourceRange(which)->Size;