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[AROS.git] / workbench / devs / AHI / Drivers / EMU10kx / pci_wrapper.h
bloba41395df21bb364862a915c35ab0e9afaa5a52a0
1 #ifndef PCI_WRAPPER_H
2 #define PCI_WRAPPER_H
4 #ifndef EXEC_TYPES_H
5 # include <exec/types.h>
6 #endif
8 #include "DriverData.h"
10 #undef PCI_COMMAND
11 #undef PCI_COMMAND_IO
12 #undef PCI_COMMAND_MEMORY
13 #undef PCI_COMMAND_MASTER
14 #undef PCI_BASE_ADDRESS_IO_MASK
15 #undef PCI_REVISION_ID
16 #undef PCI_SUBSYSTEM_ID
17 #undef PCI_DEVICE_ID
18 #undef PCI_SUBSYSTEM_VENDOR_ID
21 #define PCI_COMMAND 4
22 #define PCI_COMMAND_IO 1
23 #define PCI_COMMAND_MEMORY 2
24 #define PCI_COMMAND_MASTER 4
26 #define PCI_BASE_ADDRESS_IO_MASK (~0x3UL)
28 #define PCI_REVISION_ID 8
29 #define PCI_SUBSYSTEM_ID 0x2e
30 #define PCI_DEVICE_ID 2
31 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c
33 BOOL ahi_pci_init(struct DriverBase* AHIsubBase);
34 void ahi_pci_exit(void);
36 APTR ahi_pci_find_device(ULONG vendorid, ULONG deviceid, APTR dev);
38 ULONG ahi_pci_inl(ULONG addr, APTR dev);
39 UWORD ahi_pci_inw(ULONG addr, APTR dev);
40 UBYTE ahi_pci_inb(ULONG addr, APTR dev);
42 void ahi_pci_outl(ULONG value, ULONG addr, APTR dev);
43 void ahi_pci_outw(UWORD value, ULONG addr, APTR dev);
44 void ahi_pci_outb(UBYTE value, ULONG addr, APTR dev);
46 ULONG ahi_pci_read_config_long(UBYTE reg, APTR dev);
47 UWORD ahi_pci_read_config_word(UBYTE reg, APTR dev);
48 UBYTE ahi_pci_read_config_byte(UBYTE reg, APTR dev);
50 void ahi_pci_write_config_long(UBYTE reg, ULONG val, APTR dev);
51 void ahi_pci_write_config_word(UBYTE reg, UWORD val, APTR dev);
52 void ahi_pci_write_config_byte(UBYTE reg, UBYTE val, APTR dev);
54 ULONG ahi_pci_get_irq(APTR dev);
56 BOOL ahi_pci_add_intserver(struct Interrupt *i, APTR dev);
57 void ahi_pci_rem_intserver(struct Interrupt *i, APTR dev);
59 APTR ahi_pci_logic_to_physic_addr(APTR addr, APTR dev);
61 APTR ahi_pci_get_base_address(WORD which, APTR dev);
62 ULONG ahi_pci_get_base_size(WORD which, APTR dev);
64 #endif