Check for SYS/GL during library init. Reason is that
[AROS.git] / workbench / devs / monitors / IntelGMA / i915_reg.h
blob746a4131cd1a2c3089a6584c24561ca076462c35
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #ifndef _I915_REG_H_
29 #define _I915_REG_H_
31 #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
33 #define CMD_3D (0x3<<29)
35 #define PRIM3D (CMD_3D | (0x1f<<24))
36 #define PRIM3D_INDIRECT_SEQUENTIAL ((1<<23) | (0<<17))
37 #define PRIM3D_TRILIST (PRIM3D | (0x0<<18))
38 #define PRIM3D_TRISTRIP (PRIM3D | (0x1<<18))
39 #define PRIM3D_TRISTRIP_RVRSE (PRIM3D | (0x2<<18))
40 #define PRIM3D_TRIFAN (PRIM3D | (0x3<<18))
41 #define PRIM3D_POLY (PRIM3D | (0x4<<18))
42 #define PRIM3D_LINELIST (PRIM3D | (0x5<<18))
43 #define PRIM3D_LINESTRIP (PRIM3D | (0x6<<18))
44 #define PRIM3D_RECTLIST (PRIM3D | (0x7<<18))
45 #define PRIM3D_POINTLIST (PRIM3D | (0x8<<18))
46 #define PRIM3D_DIB (PRIM3D | (0x9<<18))
47 #define PRIM3D_CLEAR_RECT (PRIM3D | (0xa<<18))
48 #define PRIM3D_ZONE_INIT (PRIM3D | (0xd<<18))
49 #define PRIM3D_MASK (0x1f<<18)
51 /* p137 */
52 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
53 #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16)
54 #define AA_LINE_ECAAR_WIDTH_0_5 0
55 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14)
56 #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14)
57 #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14)
58 #define AA_LINE_REGION_WIDTH_ENABLE (1<<8)
59 #define AA_LINE_REGION_WIDTH_0_5 0
60 #define AA_LINE_REGION_WIDTH_1_0 (1<<6)
61 #define AA_LINE_REGION_WIDTH_2_0 (2<<6)
62 #define AA_LINE_REGION_WIDTH_4_0 (3<<6)
64 /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/
65 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
66 #define BFO_ENABLE_STENCIL_REF (1<<23)
67 #define BFO_STENCIL_REF_SHIFT 15
68 #define BFO_STENCIL_REF_MASK (0xff<<15)
69 #define BFO_ENABLE_STENCIL_FUNCS (1<<14)
70 #define BFO_STENCIL_TEST_SHIFT 11
71 #define BFO_STENCIL_TEST_MASK (0x7<<11)
72 #define BFO_STENCIL_FAIL_SHIFT 8
73 #define BFO_STENCIL_FAIL_MASK (0x7<<8)
74 #define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5
75 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5)
76 #define BFO_STENCIL_PASS_Z_PASS_SHIFT 2
77 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2)
78 #define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1)
79 #define BFO_STENCIL_TWO_SIDE (1<<0)
81 /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
82 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
83 #define BFM_ENABLE_STENCIL_TEST_MASK (1<<17)
84 #define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16)
85 #define BFM_STENCIL_TEST_MASK_SHIFT 8
86 #define BFM_STENCIL_TEST_MASK_MASK (0xff<<8)
87 #define BFM_STENCIL_WRITE_MASK_SHIFT 0
88 #define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0)
90 /* 3DSTATE_BIN_CONTROL p141 */
92 /* p143 */
93 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
94 /* Dword 1 */
95 #define BUF_3D_ID_COLOR_BACK (0x3<<24)
96 #define BUF_3D_ID_DEPTH (0x7<<24)
97 #define BUF_3D_USE_FENCE (1<<23)
98 #define BUF_3D_TILED_SURFACE (1<<22)
99 #define BUF_3D_TILE_WALK_X 0
100 #define BUF_3D_TILE_WALK_Y (1<<21)
101 #define BUF_3D_PITCH(x) (((x)/4)<<2)
102 /* Dword 2 */
103 #define BUF_3D_ADDR(x) ((x) & ~0x3)
105 /* 3DSTATE_CHROMA_KEY */
107 /* 3DSTATE_CLEAR_PARAMETERS, p150 */
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
109 /* Dword 1 */
110 #define CLEARPARAM_CLEAR_RECT (1 << 16)
111 #define CLEARPARAM_ZONE_INIT (0 << 16)
112 #define CLEARPARAM_WRITE_COLOR (1 << 2)
113 #define CLEARPARAM_WRITE_DEPTH (1 << 1)
114 #define CLEARPARAM_WRITE_STENCIL (1 << 0)
116 /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
119 /* 3DSTATE_COORD_SET_BINDINGS, p154 */
120 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
121 #define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3))
123 /* p156 */
124 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
126 /* p157 */
127 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
129 /* p158 */
130 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
132 /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
133 #define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16))
134 /* scale in dword 1 */
136 /* The depth subrectangle is not supported, but must be disabled. */
137 /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */
138 #define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0))
140 /* p161 */
141 #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
142 /* Dword 1 */
143 #define TEX_DEFAULT_COLOR_OGL (0<<30)
144 #define TEX_DEFAULT_COLOR_D3D (1<<30)
145 #define ZR_EARLY_DEPTH (1<<29)
146 #define LOD_PRECLAMP_OGL (1<<28)
147 #define LOD_PRECLAMP_D3D (0<<28)
148 #define DITHER_FULL_ALWAYS (0<<26)
149 #define DITHER_FULL_ON_FB_BLEND (1<<26)
150 #define DITHER_CLAMPED_ALWAYS (2<<26)
151 #define LINEAR_GAMMA_BLEND_32BPP (1<<25)
152 #define DEBUG_DISABLE_ENH_DITHER (1<<24)
153 #define DSTORG_HORT_BIAS(x) ((x)<<20)
154 #define DSTORG_VERT_BIAS(x) ((x)<<16)
155 #define COLOR_4_2_2_CHNL_WRT_ALL 0
156 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12)
157 #define COLOR_4_2_2_CHNL_WRT_CR (2<<12)
158 #define COLOR_4_2_2_CHNL_WRT_CB (3<<12)
159 #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12)
160 #define COLR_BUF_8BIT 0
161 #define COLR_BUF_RGB555 (1<<8)
162 #define COLR_BUF_RGB565 (2<<8)
163 #define COLR_BUF_ARGB8888 (3<<8)
164 #define COLR_BUF_ARGB4444 (8<<8)
165 #define COLR_BUF_ARGB1555 (9<<8)
166 #define COLR_BUF_ARGB2AAA (0xa<<8)
167 #define DEPTH_FRMT_16_FIXED 0
168 #define DEPTH_FRMT_16_FLOAT (1<<2)
169 #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2)
170 #define VERT_LINE_STRIDE_1 (1<<1)
171 #define VERT_LINE_STRIDE_0 (0<<1)
172 #define VERT_LINE_STRIDE_OFS_1 1
173 #define VERT_LINE_STRIDE_OFS_0 0
175 /* p166 */
176 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
177 /* Dword 1 */
178 #define DRAW_RECT_DIS_DEPTH_OFS (1<<30)
179 #define DRAW_DITHER_OFS_X(x) ((x)<<26)
180 #define DRAW_DITHER_OFS_Y(x) ((x)<<24)
181 /* Dword 2 */
182 #define DRAW_YMIN(x) ((x)<<16)
183 #define DRAW_XMIN(x) (x)
184 /* Dword 3 */
185 #define DRAW_YMAX(x) ((x)<<16)
186 #define DRAW_XMAX(x) (x)
187 /* Dword 4 */
188 #define DRAW_YORG(x) ((x)<<16)
189 #define DRAW_XORG(x) (x)
191 /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
193 /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
195 /* _3DSTATE_FOG_COLOR, p173 */
196 #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24))
197 #define FOG_COLOR_RED(x) ((x)<<16)
198 #define FOG_COLOR_GREEN(x) ((x)<<8)
199 #define FOG_COLOR_BLUE(x) (x)
201 /* _3DSTATE_FOG_MODE, p174 */
202 #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2)
203 /* Dword 1 */
204 #define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31)
205 #define FMC1_FOGFUNC_VERTEX (0<<28)
206 #define FMC1_FOGFUNC_PIXEL_EXP (1<<28)
207 #define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28)
208 #define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28)
209 #define FMC1_FOGFUNC_MASK (3<<28)
210 #define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27)
211 #define FMC1_FOGINDEX_Z (0<<25)
212 #define FMC1_FOGINDEX_W (1<<25)
213 #define FMC1_C1_C2_MODIFY_ENABLE (1<<24)
214 #define FMC1_DENSITY_MODIFY_ENABLE (1<<23)
215 #define FMC1_C1_ONE (1<<13)
216 #define FMC1_C1_MASK (0xffff<<4)
217 /* Dword 2 */
218 #define FMC2_C2_ONE (1<<16)
219 /* Dword 3 */
220 #define FMC3_D_ONE (1<<16)
222 /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
223 #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24))
224 #define IAB_MODIFY_ENABLE (1<<23)
225 #define IAB_ENABLE (1<<22)
226 #define IAB_MODIFY_FUNC (1<<21)
227 #define IAB_FUNC_SHIFT 16
228 #define IAB_MODIFY_SRC_FACTOR (1<<11)
229 #define IAB_SRC_FACTOR_SHIFT 6
230 #define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6)
231 #define IAB_MODIFY_DST_FACTOR (1<<5)
232 #define IAB_DST_FACTOR_SHIFT 0
233 #define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0)
235 #define BLENDFACT_ZERO 0x01
236 #define BLENDFACT_ONE 0x02
237 #define BLENDFACT_SRC_COLR 0x03
238 #define BLENDFACT_INV_SRC_COLR 0x04
239 #define BLENDFACT_SRC_ALPHA 0x05
240 #define BLENDFACT_INV_SRC_ALPHA 0x06
241 #define BLENDFACT_DST_ALPHA 0x07
242 #define BLENDFACT_INV_DST_ALPHA 0x08
243 #define BLENDFACT_DST_COLR 0x09
244 #define BLENDFACT_INV_DST_COLR 0x0a
245 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
246 #define BLENDFACT_CONST_COLOR 0x0c
247 #define BLENDFACT_INV_CONST_COLOR 0x0d
248 #define BLENDFACT_CONST_ALPHA 0x0e
249 #define BLENDFACT_INV_CONST_ALPHA 0x0f
250 #define BLENDFACT_MASK 0x0f
252 #define BLENDFUNC_ADD 0x0
253 #define BLENDFUNC_SUBTRACT 0x1
254 #define BLENDFUNC_REVERSE_SUBTRACT 0x2
255 #define BLENDFUNC_MIN 0x3
256 #define BLENDFUNC_MAX 0x4
257 #define BLENDFUNC_MASK 0x7
259 /* 3DSTATE_LOAD_INDIRECT, p180 */
261 #define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16))
262 #define LI0_STATE_STATIC_INDIRECT (0x01<<8)
263 #define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8)
264 #define LI0_STATE_SAMPLER (0x04<<8)
265 #define LI0_STATE_MAP (0x08<<8)
266 #define LI0_STATE_PROGRAM (0x10<<8)
267 #define LI0_STATE_CONSTANTS (0x20<<8)
269 #define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
270 #define SIS0_FORCE_LOAD (1<<1)
271 #define SIS0_BUFFER_VALID (1<<0)
272 #define SIS1_BUFFER_LENGTH(x) ((x)&0xff)
274 #define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
275 #define DIS0_BUFFER_RESET (1<<1)
276 #define DIS0_BUFFER_VALID (1<<0)
278 #define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
279 #define SSB0_FORCE_LOAD (1<<1)
280 #define SSB0_BUFFER_VALID (1<<0)
281 #define SSB1_BUFFER_LENGTH(x) ((x)&0xff)
283 #define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
284 #define MSB0_FORCE_LOAD (1<<1)
285 #define MSB0_BUFFER_VALID (1<<0)
286 #define MSB1_BUFFER_LENGTH(x) ((x)&0xff)
288 #define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3)
289 #define PSP0_FORCE_LOAD (1<<1)
290 #define PSP0_BUFFER_VALID (1<<0)
291 #define PSP1_BUFFER_LENGTH(x) ((x)&0xff)
293 #define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3)
294 #define PSC0_FORCE_LOAD (1<<1)
295 #define PSC0_BUFFER_VALID (1<<0)
296 #define PSC1_BUFFER_LENGTH(x) ((x)&0xff)
298 /* _3DSTATE_RASTERIZATION_RULES */
299 #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24))
300 #define ENABLE_POINT_RASTER_RULE (1<<15)
301 #define OGL_POINT_RASTER_RULE (1<<13)
302 #define ENABLE_TEXKILL_3D_4D (1<<10)
303 #define TEXKILL_3D (0<<9)
304 #define TEXKILL_4D (1<<9)
305 #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8)
306 #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5)
307 #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6)
308 #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3)
310 /* _3DSTATE_SCISSOR_ENABLE, p256 */
311 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19))
312 #define ENABLE_SCISSOR_RECT ((1<<1) | 1)
313 #define DISABLE_SCISSOR_RECT (1<<1)
315 /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */
316 #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1)
317 /* Dword 1 */
318 #define SCISSOR_RECT_0_YMIN(x) ((x)<<16)
319 #define SCISSOR_RECT_0_XMIN(x) (x)
320 /* Dword 2 */
321 #define SCISSOR_RECT_0_YMAX(x) ((x)<<16)
322 #define SCISSOR_RECT_0_XMAX(x) (x)
324 /* p189 */
325 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16))
326 #define I1_LOAD_S(n) (1<<(4+n))
328 #define S0_VB_OFFSET_MASK 0xffffffc
329 #define S0_AUTO_CACHE_INV_DISABLE (1<<0)
331 #define S1_VERTEX_WIDTH_SHIFT 24
332 #define S1_VERTEX_WIDTH_MASK (0x3f<<24)
333 #define S1_VERTEX_PITCH_SHIFT 16
334 #define S1_VERTEX_PITCH_MASK (0x3f<<16)
336 #define TEXCOORDFMT_2D 0x0
337 #define TEXCOORDFMT_3D 0x1
338 #define TEXCOORDFMT_4D 0x2
339 #define TEXCOORDFMT_1D 0x3
340 #define TEXCOORDFMT_2D_16 0x4
341 #define TEXCOORDFMT_4D_16 0x5
342 #define TEXCOORDFMT_NOT_PRESENT 0xf
343 #define S2_TEXCOORD_FMT0_MASK 0xf
344 #define S2_TEXCOORD_FMT1_SHIFT 4
345 #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4))
346 #define S2_TEXCOORD_NONE (~0)
348 #define TEXCOORD_WRAP_SHORTEST_TCX 8
349 #define TEXCOORD_WRAP_SHORTEST_TCY 4
350 #define TEXCOORD_WRAP_SHORTEST_TCZ 2
351 #define TEXCOORD_PERSPECTIVE_DISABLE 1
353 #define S3_WRAP_SHORTEST_TCX(unit) (TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4))
354 #define S3_WRAP_SHORTEST_TCY(unit) (TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4))
355 #define S3_WRAP_SHORTEST_TCZ(unit) (TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4))
356 #define S3_PERSPECTIVE_DISABLE(unit) (TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4))
358 /* S3 not interesting */
360 #define S4_POINT_WIDTH_SHIFT 23
361 #define S4_POINT_WIDTH_MASK (0x1ff<<23)
362 #define S4_LINE_WIDTH_SHIFT 19
363 #define S4_LINE_WIDTH_ONE (0x2<<19)
364 #define S4_LINE_WIDTH_MASK (0xf<<19)
365 #define S4_FLATSHADE_ALPHA (1<<18)
366 #define S4_FLATSHADE_FOG (1<<17)
367 #define S4_FLATSHADE_SPECULAR (1<<16)
368 #define S4_FLATSHADE_COLOR (1<<15)
369 #define S4_CULLMODE_BOTH (0<<13)
370 #define S4_CULLMODE_NONE (1<<13)
371 #define S4_CULLMODE_CW (2<<13)
372 #define S4_CULLMODE_CCW (3<<13)
373 #define S4_CULLMODE_MASK (3<<13)
374 #define S4_VFMT_POINT_WIDTH (1<<12)
375 #define S4_VFMT_SPEC_FOG (1<<11)
376 #define S4_VFMT_COLOR (1<<10)
377 #define S4_VFMT_DEPTH_OFFSET (1<<9)
378 #define S4_VFMT_XYZ (1<<6)
379 #define S4_VFMT_XYZW (2<<6)
380 #define S4_VFMT_XY (3<<6)
381 #define S4_VFMT_XYW (4<<6)
382 #define S4_VFMT_XYZW_MASK (7<<6)
383 #define S4_FORCE_DEFAULT_DIFFUSE (1<<5)
384 #define S4_FORCE_DEFAULT_SPECULAR (1<<4)
385 #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3)
386 #define S4_VFMT_FOG_PARAM (1<<2)
387 #define S4_SPRITE_POINT_ENABLE (1<<1)
388 #define S4_LINE_ANTIALIAS_ENABLE (1<<0)
390 #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \
391 S4_VFMT_SPEC_FOG | \
392 S4_VFMT_COLOR | \
393 S4_VFMT_DEPTH_OFFSET | \
394 S4_VFMT_XYZW_MASK | \
395 S4_VFMT_FOG_PARAM)
397 #define S5_WRITEDISABLE_ALPHA (1<<31)
398 #define S5_WRITEDISABLE_RED (1<<30)
399 #define S5_WRITEDISABLE_GREEN (1<<29)
400 #define S5_WRITEDISABLE_BLUE (1<<28)
401 #define S5_WRITEDISABLE_MASK (0xf<<28)
402 #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27)
403 #define S5_LAST_PIXEL_ENABLE (1<<26)
404 #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25)
405 #define S5_FOG_ENABLE (1<<24)
406 #define S5_STENCIL_REF_SHIFT 16
407 #define S5_STENCIL_REF_MASK (0xff<<16)
408 #define S5_STENCIL_TEST_FUNC_SHIFT 13
409 #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13)
410 #define S5_STENCIL_FAIL_SHIFT 10
411 #define S5_STENCIL_FAIL_MASK (0x7<<10)
412 #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7
413 #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7)
414 #define S5_STENCIL_PASS_Z_PASS_SHIFT 4
415 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4)
416 #define S5_STENCIL_WRITE_ENABLE (1<<3)
417 #define S5_STENCIL_TEST_ENABLE (1<<2)
418 #define S5_COLOR_DITHER_ENABLE (1<<1)
419 #define S5_LOGICOP_ENABLE (1<<0)
421 #define S6_ALPHA_TEST_ENABLE (1<<31)
422 #define S6_ALPHA_TEST_FUNC_SHIFT 28
423 #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28)
424 #define S6_ALPHA_REF_SHIFT 20
425 #define S6_ALPHA_REF_MASK (0xff<<20)
426 #define S6_DEPTH_TEST_ENABLE (1<<19)
427 #define S6_DEPTH_TEST_FUNC_SHIFT 16
428 #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16)
429 #define S6_CBUF_BLEND_ENABLE (1<<15)
430 #define S6_CBUF_BLEND_FUNC_SHIFT 12
431 #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12)
432 #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
433 #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8)
434 #define S6_CBUF_DST_BLEND_FACT_SHIFT 4
435 #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4)
436 #define S6_DEPTH_WRITE_ENABLE (1<<3)
437 #define S6_COLOR_WRITE_ENABLE (1<<2)
438 #define S6_TRISTRIP_PV_SHIFT 0
439 #define S6_TRISTRIP_PV_MASK (0x3<<0)
441 #define S7_DEPTH_OFFSET_CONST_MASK ~0
443 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
444 /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
446 /* _3DSTATE_MODES_4, p218 */
447 #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24))
448 #define ENABLE_LOGIC_OP_FUNC (1<<23)
449 #define LOGIC_OP_FUNC(x) ((x)<<18)
450 #define LOGICOP_MASK (0xf<<18)
451 #define LOGICOP_COPY 0xc
452 #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00))
453 #define ENABLE_STENCIL_TEST_MASK (1<<17)
454 #define STENCIL_TEST_MASK(x) ((x)<<8)
455 #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff))
456 #define ENABLE_STENCIL_WRITE_MASK (1<<16)
457 #define STENCIL_WRITE_MASK(x) ((x)&0xff)
459 /* _3DSTATE_MODES_5, p220 */
460 #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24))
461 #define PIPELINE_FLUSH_RENDER_CACHE (1<<18)
462 #define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16)
464 /* p221 */
465 #define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16))
466 #define PS1_REG(n) (1<<(n))
467 #define PS2_CONST_X(n) (n)
468 #define PS3_CONST_Y(n) (n)
469 #define PS4_CONST_Z(n) (n)
470 #define PS5_CONST_W(n) (n)
472 /* p222 */
474 #define I915_MAX_TEX_INDIRECT 4
475 #define I915_MAX_TEX_INSN 32
476 #define I915_MAX_ALU_INSN 64
477 #define I915_MAX_DECL_INSN 27
478 #define I915_MAX_TEMPORARY 16
480 /* Each instruction is 3 dwords long, though most don't require all
481 * this space. Maximum of 123 instructions. Smaller maxes per insn
482 * type.
484 #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16))
486 #define REG_TYPE_R 0 /* temporary regs, no need to
487 * dcl, must be written before
488 * read -- Preserved between
489 * phases.
491 #define REG_TYPE_T 1 /* Interpolated values, must be
492 * dcl'ed before use.
494 * 0..7: texture coord,
495 * 8: diffuse spec,
496 * 9: specular color,
497 * 10: fog parameter in w.
499 #define REG_TYPE_CONST 2 /* Restriction: only one const
500 * can be referenced per
501 * instruction, though it may be
502 * selected for multiple inputs.
503 * Constants not initialized
504 * default to zero.
506 #define REG_TYPE_S 3 /* sampler */
507 #define REG_TYPE_OC 4 /* output color (rgba) */
508 #define REG_TYPE_OD 5 /* output depth (w), xyz are
509 * temporaries. If not written,
510 * interpolated depth is used?
512 #define REG_TYPE_U 6 /* unpreserved temporaries */
513 #define REG_TYPE_MASK 0x7
514 #define REG_NR_MASK 0xf
516 /* REG_TYPE_T:
518 #define T_TEX0 0
519 #define T_TEX1 1
520 #define T_TEX2 2
521 #define T_TEX3 3
522 #define T_TEX4 4
523 #define T_TEX5 5
524 #define T_TEX6 6
525 #define T_TEX7 7
526 #define T_DIFFUSE 8
527 #define T_SPECULAR 9
528 #define T_FOG_W 10 /* interpolated fog is in W coord */
530 /* Arithmetic instructions */
532 /* .replicate_swizzle == selection and replication of a particular
533 * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
535 #define A0_NOP (0x0<<24) /* no operation */
536 #define A0_ADD (0x1<<24) /* dst = src0 + src1 */
537 #define A0_MOV (0x2<<24) /* dst = src0 */
538 #define A0_MUL (0x3<<24) /* dst = src0 * src1 */
539 #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */
540 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
541 #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */
542 #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */
543 #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */
544 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */
545 #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
546 #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */
547 #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
548 #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */
549 #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */
550 #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */
551 #define A0_FLR (0x10<<24) /* dst = floor(src0) */
552 #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */
553 #define A0_TRC (0x12<<24) /* dst = int(src0) */
554 #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */
555 #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */
556 #define A0_DEST_SATURATE (1<<22)
557 #define A0_DEST_TYPE_SHIFT 19
558 /* Allow: R, OC, OD, U */
559 #define A0_DEST_NR_SHIFT 14
560 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
561 #define A0_DEST_CHANNEL_X (1<<10)
562 #define A0_DEST_CHANNEL_Y (2<<10)
563 #define A0_DEST_CHANNEL_Z (4<<10)
564 #define A0_DEST_CHANNEL_W (8<<10)
565 #define A0_DEST_CHANNEL_ALL (0xf<<10)
566 #define A0_DEST_CHANNEL_SHIFT 10
567 #define A0_SRC0_TYPE_SHIFT 7
568 #define A0_SRC0_NR_SHIFT 2
570 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
571 #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
573 #define SRC_X 0
574 #define SRC_Y 1
575 #define SRC_Z 2
576 #define SRC_W 3
577 #define SRC_ZERO 4
578 #define SRC_ONE 5
580 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31)
581 #define A1_SRC0_CHANNEL_X_SHIFT 28
582 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27)
583 #define A1_SRC0_CHANNEL_Y_SHIFT 24
584 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23)
585 #define A1_SRC0_CHANNEL_Z_SHIFT 20
586 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19)
587 #define A1_SRC0_CHANNEL_W_SHIFT 16
588 #define A1_SRC1_TYPE_SHIFT 13
589 #define A1_SRC1_NR_SHIFT 8
590 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7)
591 #define A1_SRC1_CHANNEL_X_SHIFT 4
592 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3)
593 #define A1_SRC1_CHANNEL_Y_SHIFT 0
595 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31)
596 #define A2_SRC1_CHANNEL_Z_SHIFT 28
597 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27)
598 #define A2_SRC1_CHANNEL_W_SHIFT 24
599 #define A2_SRC2_TYPE_SHIFT 21
600 #define A2_SRC2_NR_SHIFT 16
601 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15)
602 #define A2_SRC2_CHANNEL_X_SHIFT 12
603 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11)
604 #define A2_SRC2_CHANNEL_Y_SHIFT 8
605 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7)
606 #define A2_SRC2_CHANNEL_Z_SHIFT 4
607 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3)
608 #define A2_SRC2_CHANNEL_W_SHIFT 0
610 /* Texture instructions */
611 #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared
612 * sampler and address, and output
613 * filtered texel data to destination
614 * register */
615 #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a
616 * perspective divide of the texture
617 * coordinate .xyz values by .w before
618 * sampling. */
619 #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the
620 * computed LOD by w. Only S4.6 two's
621 * comp is used. This implies that a
622 * float to fixed conversion is
623 * done. */
624 #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling
625 * operation. Simply kills the pixel
626 * if any channel of the address
627 * register is < 0.0. */
628 #define T0_DEST_TYPE_SHIFT 19
629 /* Allow: R, OC, OD, U */
630 /* Note: U (unpreserved) regs do not retain their values between
631 * phases (cannot be used for feedback)
633 * Note: oC and OD registers can only be used as the destination of a
634 * texture instruction once per phase (this is an implementation
635 * restriction).
637 #define T0_DEST_NR_SHIFT 14
638 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
639 #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */
640 #define T0_SAMPLER_NR_MASK (0xf<<0)
642 #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */
643 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
644 #define T1_ADDRESS_REG_NR_SHIFT 17
645 #define T2_MBZ 0
647 /* Declaration instructions */
648 #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib)
649 * register or an s (sampler)
650 * register. */
651 #define D0_SAMPLE_TYPE_SHIFT 22
652 #define D0_SAMPLE_TYPE_2D (0x0<<22)
653 #define D0_SAMPLE_TYPE_CUBE (0x1<<22)
654 #define D0_SAMPLE_TYPE_VOLUME (0x2<<22)
655 #define D0_SAMPLE_TYPE_MASK (0x3<<22)
657 #define D0_TYPE_SHIFT 19
658 /* Allow: T, S */
659 #define D0_NR_SHIFT 14
660 /* Allow T: 0..10, S: 0..15 */
661 #define D0_CHANNEL_X (1<<10)
662 #define D0_CHANNEL_Y (2<<10)
663 #define D0_CHANNEL_Z (4<<10)
664 #define D0_CHANNEL_W (8<<10)
665 #define D0_CHANNEL_ALL (0xf<<10)
666 #define D0_CHANNEL_NONE (0<<10)
668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
669 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
671 /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
672 * or specular declarations.
674 * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
676 * Must be zero for S (sampler) dcls
678 #define D1_MBZ 0
679 #define D2_MBZ 0
681 /* p207.
682 * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK
684 #define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16))
686 #define MS1_MAPMASK_SHIFT 0
687 #define MS1_MAPMASK_MASK (0x8fff<<0)
689 #define MS2_UNTRUSTED_SURFACE (1<<31)
690 #define MS2_ADDRESS_MASK 0xfffffffc
691 #define MS2_VERTICAL_LINE_STRIDE (1<<1)
692 #define MS2_VERTICAL_OFFSET (1<<1)
694 #define MS3_HEIGHT_SHIFT 21
695 #define MS3_WIDTH_SHIFT 10
696 #define MS3_PALETTE_SELECT (1<<9)
697 #define MS3_MAPSURF_FORMAT_SHIFT 7
698 #define MS3_MAPSURF_FORMAT_MASK (0x7<<7)
699 #define MAPSURF_8BIT (1<<7)
700 #define MAPSURF_16BIT (2<<7)
701 #define MAPSURF_32BIT (3<<7)
702 #define MAPSURF_422 (5<<7)
703 #define MAPSURF_COMPRESSED (6<<7)
704 #define MAPSURF_4BIT_INDEXED (7<<7)
705 #define MS3_MT_FORMAT_MASK (0x7 << 3)
706 #define MS3_MT_FORMAT_SHIFT 3
707 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */
708 #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */
709 #define MT_8BIT_L8 (1<<3)
710 #define MT_8BIT_A8 (4<<3)
711 #define MT_8BIT_MONO8 (5<<3)
712 #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */
713 #define MT_16BIT_ARGB1555 (1<<3)
714 #define MT_16BIT_ARGB4444 (2<<3)
715 #define MT_16BIT_AY88 (3<<3)
716 #define MT_16BIT_88DVDU (5<<3)
717 #define MT_16BIT_BUMP_655LDVDU (6<<3)
718 #define MT_16BIT_I16 (7<<3)
719 #define MT_16BIT_L16 (8<<3)
720 #define MT_16BIT_A16 (9<<3)
721 #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */
722 #define MT_32BIT_ABGR8888 (1<<3)
723 #define MT_32BIT_XRGB8888 (2<<3)
724 #define MT_32BIT_XBGR8888 (3<<3)
725 #define MT_32BIT_QWVU8888 (4<<3)
726 #define MT_32BIT_AXVU8888 (5<<3)
727 #define MT_32BIT_LXVU8888 (6<<3)
728 #define MT_32BIT_XLVU8888 (7<<3)
729 #define MT_32BIT_ARGB2101010 (8<<3)
730 #define MT_32BIT_ABGR2101010 (9<<3)
731 #define MT_32BIT_AWVU2101010 (0xA<<3)
732 #define MT_32BIT_GR1616 (0xB<<3)
733 #define MT_32BIT_VU1616 (0xC<<3)
734 #define MT_32BIT_xI824 (0xD<<3)
735 #define MT_32BIT_xA824 (0xE<<3)
736 #define MT_32BIT_xL824 (0xF<<3)
737 #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */
738 #define MT_422_YCRCB_NORMAL (1<<3)
739 #define MT_422_YCRCB_SWAPUV (2<<3)
740 #define MT_422_YCRCB_SWAPUVY (3<<3)
741 #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */
742 #define MT_COMPRESS_DXT2_3 (1<<3)
743 #define MT_COMPRESS_DXT4_5 (2<<3)
744 #define MT_COMPRESS_FXT1 (3<<3)
745 #define MT_COMPRESS_DXT1_RGB (4<<3)
746 #define MS3_USE_FENCE_REGS (1<<2)
747 #define MS3_TILED_SURFACE (1<<1)
748 #define MS3_TILE_WALK (1<<0)
750 /* The pitch is the pitch measured in DWORDS, minus 1 */
751 #define MS4_PITCH_SHIFT 21
752 #define MS4_CUBE_FACE_ENA_NEGX (1<<20)
753 #define MS4_CUBE_FACE_ENA_POSX (1<<19)
754 #define MS4_CUBE_FACE_ENA_NEGY (1<<18)
755 #define MS4_CUBE_FACE_ENA_POSY (1<<17)
756 #define MS4_CUBE_FACE_ENA_NEGZ (1<<16)
757 #define MS4_CUBE_FACE_ENA_POSZ (1<<15)
758 #define MS4_CUBE_FACE_ENA_MASK (0x3f<<15)
759 #define MS4_MAX_LOD_SHIFT 9
760 #define MS4_MAX_LOD_MASK (0x3f<<9)
761 #define MS4_MIP_LAYOUT_LEGACY (0<<8)
762 #define MS4_MIP_LAYOUT_BELOW_LPT (0<<8)
763 #define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8)
764 #define MS4_VOLUME_DEPTH_SHIFT 0
765 #define MS4_VOLUME_DEPTH_MASK (0xff<<0)
767 /* p244.
768 * The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK.
770 #define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16))
772 #define SS1_MAPMASK_SHIFT 0
773 #define SS1_MAPMASK_MASK (0x8fff<<0)
775 #define SS2_REVERSE_GAMMA_ENABLE (1<<31)
776 #define SS2_PACKED_TO_PLANAR_ENABLE (1<<30)
777 #define SS2_COLORSPACE_CONVERSION (1<<29)
778 #define SS2_CHROMAKEY_SHIFT 27
779 #define SS2_BASE_MIP_LEVEL_SHIFT 22
780 #define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22)
781 #define SS2_MIP_FILTER_SHIFT 20
782 #define SS2_MIP_FILTER_MASK (0x3<<20)
783 #define MIPFILTER_NONE 0
784 #define MIPFILTER_NEAREST 1
785 #define MIPFILTER_LINEAR 3
786 #define SS2_MAG_FILTER_SHIFT 17
787 #define SS2_MAG_FILTER_MASK (0x7<<17)
788 #define FILTER_NEAREST 0
789 #define FILTER_LINEAR 1
790 #define FILTER_ANISOTROPIC 2
791 #define FILTER_4X4_1 3
792 #define FILTER_4X4_2 4
793 #define FILTER_4X4_FLAT 5
794 #define FILTER_6X5_MONO 6 /* XXX - check */
795 #define SS2_MIN_FILTER_SHIFT 14
796 #define SS2_MIN_FILTER_MASK (0x7<<14)
797 #define SS2_LOD_BIAS_SHIFT 5
798 #define SS2_LOD_BIAS_ONE (0x10<<5)
799 #define SS2_LOD_BIAS_MASK (0x1ff<<5)
800 /* Shadow requires:
801 * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format
802 * FILTER_4X4_x MIN and MAG filters
804 #define SS2_SHADOW_ENABLE (1<<4)
805 #define SS2_MAX_ANISO_MASK (1<<3)
806 #define SS2_MAX_ANISO_2 (0<<3)
807 #define SS2_MAX_ANISO_4 (1<<3)
808 #define SS2_SHADOW_FUNC_SHIFT 0
809 #define SS2_SHADOW_FUNC_MASK (0x7<<0)
810 /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */
812 #define SS3_MIN_LOD_SHIFT 24
813 #define SS3_MIN_LOD_ONE (0x10<<24)
814 #define SS3_MIN_LOD_MASK (0xff<<24)
815 #define SS3_KILL_PIXEL_ENABLE (1<<17)
816 #define SS3_TCX_ADDR_MODE_SHIFT 12
817 #define SS3_TCX_ADDR_MODE_MASK (0x7<<12)
818 #define TEXCOORDMODE_WRAP 0
819 #define TEXCOORDMODE_MIRROR 1
820 #define TEXCOORDMODE_CLAMP_EDGE 2
821 #define TEXCOORDMODE_CUBE 3
822 #define TEXCOORDMODE_CLAMP_BORDER 4
823 #define TEXCOORDMODE_MIRROR_ONCE 5
824 #define SS3_TCY_ADDR_MODE_SHIFT 9
825 #define SS3_TCY_ADDR_MODE_MASK (0x7<<9)
826 #define SS3_TCZ_ADDR_MODE_SHIFT 6
827 #define SS3_TCZ_ADDR_MODE_MASK (0x7<<6)
828 #define SS3_NORMALIZED_COORDS (1<<5)
829 #define SS3_TEXTUREMAP_INDEX_SHIFT 1
830 #define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1)
831 #define SS3_DEINTERLACER_ENABLE (1<<0)
833 #define SS4_BORDER_COLOR_MASK (~0)
835 /* 3DSTATE_SPAN_STIPPLE, p258
837 #define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
838 #define ST1_ENABLE (1<<16)
839 #define ST1_MASK (0xffff)
841 #define FLUSH_MAP_CACHE (1<<0)
842 #define FLUSH_RENDER_CACHE (1<<1)
844 #endif