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[AROS.git] / workbench / devs / monitors / IntelGMA / intelG45_intern.h
bloba3110cf0dfb299bf50aecf63b55296ce1ecb691c
1 /*
2 Copyright © 2010-2015, The AROS Development Team. All rights reserved.
3 $Id$
4 */
6 #ifndef INTELG45_INTERN_H_
7 #define INTELG45_INTERN_H_
9 #include <exec/nodes.h>
10 #include <exec/semaphores.h>
11 #include <exec/libraries.h>
12 #include <exec/ports.h>
13 #include <exec/memory.h>
14 #include <devices/timer.h>
15 #include <oop/oop.h>
16 #include <hidd/graphics.h>
17 #include <hidd/pci.h>
18 #include <hidd/i2c.h>
20 #include <stdint.h>
22 #define CLID_Hidd_Gfx_IntelGMA "hidd.gfx.intelgma"
23 #define IID_Hidd_Gfx_IntelGMA "hidd.gfx.intelgma"
24 #define CLID_Hidd_BitMap_IntelGMA "hidd.bitmap.intelgma"
25 #define IID_Hidd_BitMap_IntelGMA "hidd.bitmap.intelgma"
27 extern OOP_AttrBase HiddGMABitMapAttrBase;
29 #define KBYTES 1024
30 #define MBYTES (1024 * 1024)
32 struct Sync{
33 uint16_t width;
34 uint16_t height;
35 uint8_t depth;
36 uint32_t pixelclock;
37 intptr_t framebuffer;
38 uint16_t hdisp;
39 uint16_t vdisp;
40 uint16_t hstart;
41 uint16_t hend;
42 uint16_t htotal;
43 uint16_t vstart;
44 uint16_t vend;
45 uint16_t vtotal;
46 uint32_t flags;
49 typedef struct {
50 uint32_t fp; // G45_FPA0
51 uint32_t dpll; // G45_DPLL_A
52 uint32_t dpll_md_reg; // G45_DPLL_A_MD
53 uint32_t pipeconf; // G45_PIPEACONF
54 uint32_t pipesrc; // G45_PIPEASRC
55 uint32_t dspcntr; // G45_DSPACNTR
56 uint32_t dspsurf; // G45_DSPASURF
57 uint32_t dsplinoff; // G45_DSPALINOFF
58 uint32_t dspstride; // G45_DSPASTRIDE
59 uint32_t htotal; // G45_HTOTAL_A
60 uint32_t hblank; // G45_HBLANK_A
61 uint32_t hsync; // G45_HSYNC_A
62 uint32_t vtotal; // G45_VTOTAL_A
63 uint32_t vblank; // G45_VBLANK_A
64 uint32_t vsync; // G45_VSYNC_A
65 uint32_t adpa; // G45_ADPA
66 } GMAState_t;
69 typedef struct {
70 struct SignalSemaphore bmLock;
72 OOP_Object *bitmap; // BitMap OOP Object
73 intptr_t framebuffer; // Points to pixel data
74 uint16_t width; // Bitmap width
75 uint16_t height; // Bitmap height
76 uint16_t pitch; // BytesPerRow aligned
77 uint8_t depth; // Bitmap depth
78 uint8_t bpp; // BytesPerPixel
79 uint8_t onbm; // is onbitmap?
80 uint8_t fbgfx; // is framebuffer in gfx memory
81 uint64_t usecount; // counts BitMap accesses
83 GMAState_t *state;
85 BOOL displayable; /* Can bitmap be displayed on screen */
87 /* Information connected with display */
88 OOP_Object *compositing; /* Compositing object used by bitmap */
89 LONG xoffset; /* Offset to bitmap point that is displayed as (0,0) on screen */
90 LONG yoffset; /* Offset to bitmap point that is displayed as (0,0) on screen */
91 ULONG fbid; /* Contains ID under which bitmap
92 is registered as framebuffer or
93 0 otherwise */
94 } GMABitMap_t;
96 typedef struct {
97 uint8_t h_min; /* Minimal horizontal frequency in kHz */
98 uint8_t h_max; /* Maximal horizontal frequency in kHz */
99 uint8_t v_min; /* Minimal vertical frequency in Hz */
100 uint8_t v_max; /* Maximal vertical frequency in Hz */
101 uint8_t pixel_max; /* Maximal pixelclock/10 in MHz (multiply by 10 to get MHz value) */
102 } GMA_MonitorSpec_t;
104 struct g45chip {
105 char * Framebuffer;
106 uint32_t Framebuffer_size;
107 char * MMIO;
108 uint32_t * GATT;
109 uint32_t GATT_size;
110 uint32_t Stolen_size;
113 struct g45data
115 /* TODO: Move object data here from staticdata */
116 ULONG empty;
119 struct i2cdata
121 ULONG empty;
124 struct g45staticdata
126 void *MemPool;
127 BOOL forced;
128 BOOL force_gallium;
130 /* The rest should be moved to object data */
131 struct SignalSemaphore HWLock;
132 struct SignalSemaphore MultiBMLock;
133 struct MsgPort MsgPort;
134 struct timerequest *tr;
136 struct MinList CardMem;
138 struct g45chip Card;
139 uint16_t ProductID;
141 HIDDT_DPMSLevel dpms;
143 GMABitMap_t * Engine2DOwner;
145 GMABitMap_t * VisibleBitmap;
147 GMAState_t * initialState;
148 intptr_t initialBitMap;
150 intptr_t RingBuffer;
151 uint32_t RingBufferSize;
152 uint32_t RingBufferTail;
153 char * RingBufferPhys;
154 char RingActive;
156 uint32_t DDCPort;
158 OOP_Class *basegc; /* baseclass for CreateObject */
159 OOP_Class *basebm; /* baseclass for CreateObject */
160 OOP_Class *basegallium; /* baseclass for CreateObject */
162 OOP_Class * IntelG45Class;
163 OOP_Class * IntelI2C;
164 OOP_Class * BMClass;
165 OOP_Class * compositingclass;
166 OOP_Class * galliumclass;
168 OOP_Object *compositing;
170 OOP_Object * PCIObject;
171 OOP_Object * PCIDevice;
172 OOP_Object * GMAObject;
174 intptr_t ScratchArea;
175 intptr_t AttachedMemory;
176 intptr_t AttachedSize;
178 volatile uint32_t * HardwareStatusPage;
180 intptr_t CursorImage;
181 intptr_t CursorBase;
182 BOOL CursorVisible;
184 OOP_MethodID mid_ReadLong;
185 OOP_MethodID mid_CopyMemBox8;
186 OOP_MethodID mid_CopyMemBox16;
187 OOP_MethodID mid_CopyMemBox32;
188 OOP_MethodID mid_PutMem32Image8;
189 OOP_MethodID mid_PutMem32Image16;
190 OOP_MethodID mid_GetMem32Image8;
191 OOP_MethodID mid_GetMem32Image16;
192 OOP_MethodID mid_GetImage;
193 OOP_MethodID mid_Clear;
194 OOP_MethodID mid_PutMemTemplate8;
195 OOP_MethodID mid_PutMemTemplate16;
196 OOP_MethodID mid_PutMemTemplate32;
197 OOP_MethodID mid_PutMemPattern8;
198 OOP_MethodID mid_PutMemPattern16;
199 OOP_MethodID mid_PutMemPattern32;
200 OOP_MethodID mid_CopyLUTMemBox16;
201 OOP_MethodID mid_CopyLUTMemBox32;
203 OOP_MethodID mid_BitMapPositionChanged;
204 OOP_MethodID mid_BitMapRectChanged;
205 OOP_MethodID mid_ValidateBitMapPositionChange;
207 ULONG pipe;
208 struct Sync lvds_fixed;
209 LONG pointerx;
210 LONG pointery;
213 enum {
214 aoHidd_GMABitMap_Drawable,
215 aoHidd_BitMap_IntelG45_CompositingHidd,
216 num_Hidd_GMABitMap_Attrs
219 #define aHidd_GMABitMap_Drawable (HiddGMABitMapAttrBase + aoHidd_GMABitMap_Drawable)
220 #define aHidd_BitMap_IntelG45_CompositingHidd (HiddGMABitMapAttrBase + aoHidd_BitMap_IntelG45_CompositingHidd)
222 #define IS_BM_ATTR(attr, idx) (((idx)=(attr)-HiddBitMapAttrBase) < num_Hidd_BitMap_Attrs)
223 #define IS_GMABM_ATTR(attr, idx) (((idx)=(attr)-HiddGMABitMapAttrBase) < num_Hidd_GMABitMap_Attrs)
225 #define SD(cl) ((struct g45staticdata *)cl->UserData)
227 #define METHOD(base, id, name) \
228 base ## __ ## id ## __ ## name (OOP_Class *cl, OOP_Object *o, struct p ## id ## _ ## name *msg)
230 #define METHOD_NAME(base, id, name) \
231 base ## __ ## id ## __ ## name
233 #define METHOD_NAME_S(base, id, name) \
234 # base "__" # id "__" # name
236 #define LOCK_HW { ObtainSemaphore(&sd->HWLock); }
237 #define UNLOCK_HW { ReleaseSemaphore(&sd->HWLock); }
239 #define LOCK_BITMAP { ObtainSemaphore(&bm->bmLock); }
240 #define UNLOCK_BITMAP { ReleaseSemaphore(&bm->bmLock); }
242 #define LOCK_BITMAP_BM(bm) { ObtainSemaphore(&(bm)->bmLock); }
243 #define UNLOCK_BITMAP_BM(bm) { ReleaseSemaphore(&(bm)->bmLock); }
245 #define LOCK_MULTI_BITMAP { ObtainSemaphore(&sd->MultiBMLock); }
246 #define UNLOCK_MULTI_BITMAP { ReleaseSemaphore(&sd->MultiBMLock); }
248 extern const struct OOP_InterfaceDescr INTELG45_ifdescr[];
249 extern const struct OOP_InterfaceDescr GMABM_ifdescr[];
250 extern const struct OOP_InterfaceDescr INTELI2C_ifdescr[];
252 int G45_Init(struct g45staticdata *sd);
254 APTR AllocGfxMem(struct g45staticdata *sd, ULONG size);
255 VOID FreeGfxMem(struct g45staticdata *sd, APTR ptr, ULONG size);
256 intptr_t G45_VirtualToPhysical(struct g45staticdata *sd, intptr_t virtual);
257 struct MemHeader *ObtainGfxMemory(struct g45staticdata *sd, intptr_t virtual,
258 intptr_t length, BOOL stolen);
259 void ReleaseGfxMemory(struct g45staticdata *sd, struct MemHeader *header);
260 void G45_AttachCacheableMemory(struct g45staticdata *sd, intptr_t physical, intptr_t virtual, intptr_t length);
262 void G45_InitMode(struct g45staticdata *sd, GMAState_t *state,
263 uint16_t width, uint16_t height, uint8_t depth, uint32_t pixelclock, intptr_t framebuffer,
264 uint16_t hdisp, uint16_t vdisp, uint16_t hstart, uint16_t hend, uint16_t htotal,
265 uint16_t vstart, uint16_t vend, uint16_t vtotal, uint32_t flags);
266 void G45_LoadState(struct g45staticdata *sd, GMAState_t *state);
267 IPTR AllocBitmapArea(struct g45staticdata *sd, ULONG width, ULONG height, ULONG bpp);
268 VOID FreeBitmapArea(struct g45staticdata *sd, IPTR bmp, ULONG width, ULONG height, ULONG bpp);
269 VOID delay_ms(struct g45staticdata *sd, uint32_t msec);
270 VOID delay_us(struct g45staticdata *sd, uint32_t usec);
272 BOOL adpa_Enabled(struct g45staticdata *sd);
273 BOOL lvds_Enabled(struct g45staticdata *sd);
274 void GetSync(struct g45staticdata *sd,struct Sync *sync,ULONG pipe);
275 void UpdateCursor(struct g45staticdata *sd);
276 void SetCursorPosition(struct g45staticdata *sd,LONG x,LONG y);
278 BOOL HIDD_INTELG45_SetFramebuffer(OOP_Object * bm);
279 BOOL HIDD_INTELG45_SwitchToVideoMode(OOP_Object * bm);
280 BOOL copybox3d_supported();
281 BOOL copybox3d( GMABitMap_t *bm_dst, GMABitMap_t *bm_src,
282 ULONG dst_x,ULONG dst_y,ULONG dst_width, ULONG dst_height,
283 ULONG src_x,ULONG src_y,ULONG src_width, ULONG src_height );
285 //#define GALLIUM_SIMULATION
286 #endif /* INTELG45_INTERN_H_ */