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[AROS.git] / workbench / devs / networks / atheros5000 / hal / ar5212 / ar2317.c
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1 /*
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $Id$
19 #include "opt_ah.h"
21 #ifdef AH_SUPPORT_2317
23 #include "ah.h"
24 #include "ah_internal.h"
26 #include "ar5212/ar5212.h"
27 #include "ar5212/ar5212reg.h"
28 #include "ar5212/ar5212phy.h"
30 #include "ah_eeprom_v3.h"
32 #define AH_5212_2317
33 #include "ar5212/ar5212.ini"
35 #define N(a) (sizeof(a)/sizeof(a[0]))
37 typedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2317;
38 typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2317;
39 #define PWR_TABLE_SIZE_2317 PWR_TABLE_SIZE_2413
41 struct ar2317State {
42 RF_HAL_FUNCS base; /* public state, must be first */
43 uint16_t pcdacTable[PWR_TABLE_SIZE_2317];
45 uint32_t Bank1Data[N(ar5212Bank1_2317)];
46 uint32_t Bank2Data[N(ar5212Bank2_2317)];
47 uint32_t Bank3Data[N(ar5212Bank3_2317)];
48 uint32_t Bank6Data[N(ar5212Bank6_2317)];
49 uint32_t Bank7Data[N(ar5212Bank7_2317)];
52 * Private state for reduced stack usage.
54 /* filled out Vpd table for all pdGains (chanL) */
55 uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
56 [MAX_PWR_RANGE_IN_HALF_DB];
57 /* filled out Vpd table for all pdGains (chanR) */
58 uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
59 [MAX_PWR_RANGE_IN_HALF_DB];
60 /* filled out Vpd table for all pdGains (interpolated) */
61 uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
62 [MAX_PWR_RANGE_IN_HALF_DB];
64 #define AR2317(ah) ((struct ar2317State *) AH5212(ah)->ah_rfHal)
66 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
67 uint32_t numBits, uint32_t firstBit, uint32_t column);
69 static void
70 ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
71 int writes)
73 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2317, modesIndex, writes);
74 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2317, 1, writes);
75 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2317, freqIndex, writes);
79 * Take the MHz channel value and set the Channel value
81 * ASSUMES: Writes enabled to analog bus
83 static HAL_BOOL
84 ar2317SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan)
86 uint32_t channelSel = 0;
87 uint32_t bModeSynth = 0;
88 uint32_t aModeRefSel = 0;
89 uint32_t reg32 = 0;
91 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel);
93 if (chan->channel < 4800) {
94 uint32_t txctl;
95 channelSel = chan->channel - 2272 ;
96 channelSel = ath_hal_reverseBits(channelSel, 8);
98 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
99 if (chan->channel == 2484) {
100 /* Enable channel spreading for channel 14 */
101 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
102 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
103 } else {
104 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
105 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
107 } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) {
108 channelSel = ath_hal_reverseBits(
109 ((chan->channel - 4800) / 20 << 2), 8);
110 aModeRefSel = ath_hal_reverseBits(3, 2);
111 } else if ((chan->channel % 10) == 0) {
112 channelSel = ath_hal_reverseBits(
113 ((chan->channel - 4800) / 10 << 1), 8);
114 aModeRefSel = ath_hal_reverseBits(2, 2);
115 } else if ((chan->channel % 5) == 0) {
116 channelSel = ath_hal_reverseBits(
117 (chan->channel - 4800) / 5, 8);
118 aModeRefSel = ath_hal_reverseBits(1, 2);
119 } else {
120 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
121 __func__, chan->channel);
122 return AH_FALSE;
125 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
126 (1 << 12) | 0x1;
127 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
129 reg32 >>= 8;
130 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
132 AH_PRIVATE(ah)->ah_curchan = chan;
133 return AH_TRUE;
137 * Reads EEPROM header info from device structure and programs
138 * all rf registers
140 * REQUIRES: Access to the analog rf device
142 static HAL_BOOL
143 ar2317SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
145 #define RF_BANK_SETUP(_priv, _ix, _col) do { \
146 int i; \
147 for (i = 0; i < N(ar5212Bank##_ix##_2317); i++) \
148 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2317[i][_col];\
149 } while (0)
150 struct ath_hal_5212 *ahp = AH5212(ah);
151 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
152 uint16_t ob2GHz = 0, db2GHz = 0;
153 struct ar2317State *priv = AR2317(ah);
154 int regWrites = 0;
156 HALDEBUG(ah, HAL_DEBUG_RFPARAM,
157 "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
158 __func__, chan->channel, chan->channelFlags, modesIndex);
160 HALASSERT(priv);
162 /* Setup rf parameters */
163 switch (chan->channelFlags & CHANNEL_ALL) {
164 case CHANNEL_B:
165 ob2GHz = ee->ee_obFor24;
166 db2GHz = ee->ee_dbFor24;
167 break;
168 case CHANNEL_G:
169 case CHANNEL_108G:
170 ob2GHz = ee->ee_obFor24g;
171 db2GHz = ee->ee_dbFor24g;
172 break;
173 default:
174 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
175 __func__, chan->channelFlags);
176 return AH_FALSE;
179 /* Bank 1 Write */
180 RF_BANK_SETUP(priv, 1, 1);
182 /* Bank 2 Write */
183 RF_BANK_SETUP(priv, 2, modesIndex);
185 /* Bank 3 Write */
186 RF_BANK_SETUP(priv, 3, modesIndex);
188 /* Bank 6 Write */
189 RF_BANK_SETUP(priv, 6, modesIndex);
191 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0);
192 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0);
194 /* Bank 7 Setup */
195 RF_BANK_SETUP(priv, 7, modesIndex);
197 /* Write Analog registers */
198 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2317, priv->Bank1Data, regWrites);
199 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2317, priv->Bank2Data, regWrites);
200 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2317, priv->Bank3Data, regWrites);
201 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2317, priv->Bank6Data, regWrites);
202 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2317, priv->Bank7Data, regWrites);
203 /* Now that we have reprogrammed rfgain value, clear the flag. */
204 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
206 return AH_TRUE;
207 #undef RF_BANK_SETUP
211 * Return a reference to the requested RF Bank.
213 static uint32_t *
214 ar2317GetRfBank(struct ath_hal *ah, int bank)
216 struct ar2317State *priv = AR2317(ah);
218 HALASSERT(priv != AH_NULL);
219 switch (bank) {
220 case 1: return priv->Bank1Data;
221 case 2: return priv->Bank2Data;
222 case 3: return priv->Bank3Data;
223 case 6: return priv->Bank6Data;
224 case 7: return priv->Bank7Data;
226 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
227 __func__, bank);
228 return AH_NULL;
232 * Return indices surrounding the value in sorted integer lists.
234 * NB: the input list is assumed to be sorted in ascending order
236 static void
237 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
238 uint32_t *vlo, uint32_t *vhi)
240 int16_t target = v;
241 const int16_t *ep = lp+listSize;
242 const int16_t *tp;
245 * Check first and last elements for out-of-bounds conditions.
247 if (target < lp[0]) {
248 *vlo = *vhi = 0;
249 return;
251 if (target >= ep[-1]) {
252 *vlo = *vhi = listSize - 1;
253 return;
256 /* look for value being near or between 2 values in list */
257 for (tp = lp; tp < ep; tp++) {
259 * If value is close to the current value of the list
260 * then target is not between values, it is one of the values
262 if (*tp == target) {
263 *vlo = *vhi = tp - (const int16_t *) lp;
264 return;
267 * Look for value being between current value and next value
268 * if so return these 2 values
270 if (target < tp[1]) {
271 *vlo = tp - (const int16_t *) lp;
272 *vhi = *vlo + 1;
273 return;
279 * Fill the Vpdlist for indices Pmax-Pmin
281 static HAL_BOOL
282 ar2317FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
283 const int16_t *pwrList, const int16_t *VpdList,
284 uint16_t numIntercepts, uint16_t retVpdList[][64])
286 uint16_t ii, jj, kk;
287 int16_t currPwr = (int16_t)(2*Pmin);
288 /* since Pmin is pwr*2 and pwrList is 4*pwr */
289 uint32_t idxL, idxR;
291 ii = 0;
292 jj = 0;
294 if (numIntercepts < 2)
295 return AH_FALSE;
297 while (ii <= (uint16_t)(Pmax - Pmin)) {
298 GetLowerUpperIndex(currPwr, pwrList, numIntercepts,
299 &(idxL), &(idxR));
300 if (idxR < 1)
301 idxR = 1; /* extrapolate below */
302 if (idxL == (uint32_t)(numIntercepts - 1))
303 idxL = numIntercepts - 2; /* extrapolate above */
304 if (pwrList[idxL] == pwrList[idxR])
305 kk = VpdList[idxL];
306 else
307 kk = (uint16_t)
308 (((currPwr - pwrList[idxL])*VpdList[idxR]+
309 (pwrList[idxR] - currPwr)*VpdList[idxL])/
310 (pwrList[idxR] - pwrList[idxL]));
311 retVpdList[pdGainIdx][ii] = kk;
312 ii++;
313 currPwr += 2; /* half dB steps */
316 return AH_TRUE;
320 * Returns interpolated or the scaled up interpolated value
322 static int16_t
323 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
324 int16_t targetLeft, int16_t targetRight)
326 int16_t rv;
328 if (srcRight != srcLeft) {
329 rv = ((target - srcLeft)*targetRight +
330 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
331 } else {
332 rv = targetLeft;
334 return rv;
338 * Uses the data points read from EEPROM to reconstruct the pdadc power table
339 * Called by ar2317SetPowerTable()
341 static int
342 ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
343 const RAW_DATA_STRUCT_2317 *pRawDataset,
344 uint16_t pdGainOverlap_t2,
345 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
346 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
348 struct ar2317State *priv = AR2317(ah);
349 #define VpdTable_L priv->vpdTable_L
350 #define VpdTable_R priv->vpdTable_R
351 #define VpdTable_I priv->vpdTable_I
352 /* XXX excessive stack usage? */
353 uint32_t ii, jj, kk;
354 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
355 uint32_t idxL, idxR;
356 uint32_t numPdGainsUsed = 0;
358 * If desired to support -ve power levels in future, just
359 * change pwr_I_0 to signed 5-bits.
361 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
362 /* to accomodate -ve power levels later on. */
363 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
364 /* to accomodate -ve power levels later on */
365 uint16_t numVpd = 0;
366 uint16_t Vpd_step;
367 int16_t tmpVal ;
368 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
370 /* Get upper lower index */
371 GetLowerUpperIndex(channel, pRawDataset->pChannels,
372 pRawDataset->numChannels, &(idxL), &(idxR));
374 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
375 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
376 /* work backwards 'cause highest pdGain for lowest power */
377 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
378 if (numVpd > 0) {
379 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
380 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
381 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
382 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
384 Pmin_t2[numPdGainsUsed] = (int16_t)
385 (Pmin_t2[numPdGainsUsed] / 2);
386 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
387 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
388 Pmax_t2[numPdGainsUsed] =
389 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
390 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
391 ar2317FillVpdTable(
392 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
393 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
394 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
396 ar2317FillVpdTable(
397 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
398 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
399 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
401 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
402 VpdTable_I[numPdGainsUsed][kk] =
403 interpolate_signed(
404 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
405 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
407 /* fill VpdTable_I for this pdGain */
408 numPdGainsUsed++;
410 /* if this pdGain is used */
413 *pMinCalPower = Pmin_t2[0];
414 kk = 0; /* index for the final table */
415 for (ii = 0; ii < numPdGainsUsed; ii++) {
416 if (ii == (numPdGainsUsed - 1))
417 pPdGainBoundaries[ii] = Pmax_t2[ii] +
418 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
419 else
420 pPdGainBoundaries[ii] = (uint16_t)
421 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
422 if (pPdGainBoundaries[ii] > 63) {
423 HALDEBUG(ah, HAL_DEBUG_ANY,
424 "%s: clamp pPdGainBoundaries[%d] %d\n",
425 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
426 pPdGainBoundaries[ii] = 63;
429 /* Find starting index for this pdGain */
430 if (ii == 0)
431 ss = 0; /* for the first pdGain, start from index 0 */
432 else
433 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
434 pdGainOverlap_t2;
435 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
436 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
438 *-ve ss indicates need to extrapolate data below for this pdGain
440 while (ss < 0) {
441 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
442 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
443 ss++;
446 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
447 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
448 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
450 while (ss < (int16_t)maxIndex)
451 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
453 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
454 VpdTable_I[ii][sizeCurrVpdTable-2]);
455 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
457 * for last gain, pdGainBoundary == Pmax_t2, so will
458 * have to extrapolate
460 if (tgtIndex > maxIndex) { /* need to extrapolate above */
461 while(ss < (int16_t)tgtIndex) {
462 tmpVal = (uint16_t)
463 (VpdTable_I[ii][sizeCurrVpdTable-1] +
464 (ss-maxIndex)*Vpd_step);
465 pPDADCValues[kk++] = (tmpVal > 127) ?
466 127 : tmpVal;
467 ss++;
469 } /* extrapolated above */
470 } /* for all pdGainUsed */
472 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
473 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
474 ii++;
476 while (kk < 128) {
477 pPDADCValues[kk] = pPDADCValues[kk-1];
478 kk++;
481 return numPdGainsUsed;
482 #undef VpdTable_L
483 #undef VpdTable_R
484 #undef VpdTable_I
487 static HAL_BOOL
488 ar2317SetPowerTable(struct ath_hal *ah,
489 int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan,
490 uint16_t *rfXpdGain)
492 struct ath_hal_5212 *ahp = AH5212(ah);
493 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
494 const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL;
495 uint16_t pdGainOverlap_t2;
496 int16_t minCalPower2317_t2;
497 uint16_t *pdadcValues = ahp->ah_pcdacTable;
498 uint16_t gainBoundaries[4];
499 uint32_t i, reg32, regoffset, tpcrg1;
500 int numPdGainsUsed;
502 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
503 __func__, chan->channel,chan->channelFlags);
505 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
506 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
507 else if (IS_CHAN_B(chan))
508 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
509 else {
510 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);
511 return AH_FALSE;
514 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
515 AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
517 numPdGainsUsed = ar2317getGainBoundariesAndPdadcsForPowers(ah,
518 chan->channel, pRawDataset, pdGainOverlap_t2,
519 &minCalPower2317_t2,gainBoundaries, rfXpdGain, pdadcValues);
520 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
523 * Use pd_gains curve from eeprom; Atheros always uses
524 * the default curve from the ini file but some vendors
525 * (e.g. Zcomax) want to override this curve and not
526 * honoring their settings results in tx power 5dBm low.
528 #if 0
529 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
530 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
531 #endif
532 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
533 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
534 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
535 switch (numPdGainsUsed) {
536 case 3:
537 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
538 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
539 /* fall thru... */
540 case 2:
541 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
542 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
543 /* fall thru... */
544 case 1:
545 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
546 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
547 break;
549 #ifdef AH_DEBUG
550 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
551 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
552 "pd_gains (default 0x%x, calculated 0x%x)\n",
553 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
554 #endif
555 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
558 * Note the pdadc table may not start at 0 dBm power, could be
559 * negative or greater than 0. Need to offset the power
560 * values by the amount of minPower for griffin
562 if (minCalPower2317_t2 != 0)
563 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2317_t2);
564 else
565 ahp->ah_txPowerIndexOffset = 0;
567 /* Finally, write the power values into the baseband power table */
568 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
569 for (i = 0; i < 32; i++) {
570 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
571 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
572 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
573 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
574 OS_REG_WRITE(ah, regoffset, reg32);
575 regoffset += 4;
578 OS_REG_WRITE(ah, AR_PHY_TPCRG5,
579 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
580 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
581 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
582 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
583 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
585 return AH_TRUE;
588 static int16_t
589 ar2317GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data)
591 uint32_t ii,jj;
592 uint16_t Pmin=0,numVpd;
594 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
595 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
596 /* work backwards 'cause highest pdGain for lowest power */
597 numVpd = data->pDataPerPDGain[jj].numVpd;
598 if (numVpd > 0) {
599 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
600 return(Pmin);
603 return(Pmin);
606 static int16_t
607 ar2317GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data)
609 uint32_t ii;
610 uint16_t Pmax=0,numVpd;
611 uint16_t vpdmax;
613 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
614 /* work forwards cuase lowest pdGain for highest power */
615 numVpd = data->pDataPerPDGain[ii].numVpd;
616 if (numVpd > 0) {
617 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
618 vpdmax = data->pDataPerPDGain[ii].Vpd[numVpd-1];
619 return(Pmax);
622 return(Pmax);
625 static HAL_BOOL
626 ar2317GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan,
627 int16_t *maxPow, int16_t *minPow)
629 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
630 const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL;
631 const RAW_DATA_PER_CHANNEL_2317 *data=AH_NULL;
632 uint16_t numChannels;
633 int totalD,totalF, totalMin,last, i;
635 *maxPow = 0;
637 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
638 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
639 else if (IS_CHAN_B(chan))
640 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
641 else
642 return(AH_FALSE);
644 numChannels = pRawDataset->numChannels;
645 data = pRawDataset->pDataPerChannel;
647 /* Make sure the channel is in the range of the TP values
648 * (freq piers)
650 if (numChannels < 1)
651 return(AH_FALSE);
653 if ((chan->channel < data[0].channelValue) ||
654 (chan->channel > data[numChannels-1].channelValue)) {
655 if (chan->channel < data[0].channelValue) {
656 *maxPow = ar2317GetMaxPower(ah, &data[0]);
657 *minPow = ar2317GetMinPower(ah, &data[0]);
658 return(AH_TRUE);
659 } else {
660 *maxPow = ar2317GetMaxPower(ah, &data[numChannels - 1]);
661 *minPow = ar2317GetMinPower(ah, &data[numChannels - 1]);
662 return(AH_TRUE);
666 /* Linearly interpolate the power value now */
667 for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue);
668 last = i++);
669 totalD = data[i].channelValue - data[last].channelValue;
670 if (totalD > 0) {
671 totalF = ar2317GetMaxPower(ah, &data[i]) - ar2317GetMaxPower(ah, &data[last]);
672 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) +
673 ar2317GetMaxPower(ah, &data[last])*totalD)/totalD);
674 totalMin = ar2317GetMinPower(ah, &data[i]) - ar2317GetMinPower(ah, &data[last]);
675 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) +
676 ar2317GetMinPower(ah, &data[last])*totalD)/totalD);
677 return(AH_TRUE);
678 } else {
679 if (chan->channel == data[i].channelValue) {
680 *maxPow = ar2317GetMaxPower(ah, &data[i]);
681 *minPow = ar2317GetMinPower(ah, &data[i]);
682 return(AH_TRUE);
683 } else
684 return(AH_FALSE);
689 * Free memory for analog bank scratch buffers
691 static void
692 ar2317RfDetach(struct ath_hal *ah)
694 struct ath_hal_5212 *ahp = AH5212(ah);
696 HALASSERT(ahp->ah_rfHal != AH_NULL);
697 ath_hal_free(ahp->ah_rfHal);
698 ahp->ah_rfHal = AH_NULL;
702 * Allocate memory for analog bank scratch buffers
703 * Scratch Buffer will be reinitialized every reset so no need to zero now
705 HAL_BOOL
706 ar2317RfAttach(struct ath_hal *ah, HAL_STATUS *status)
708 struct ath_hal_5212 *ahp = AH5212(ah);
709 struct ar2317State *priv;
711 HALASSERT(ah->ah_magic == AR5212_MAGIC);
713 HALASSERT(ahp->ah_rfHal == AH_NULL);
714 priv = ath_hal_malloc(sizeof(struct ar2317State));
715 if (priv == AH_NULL) {
716 HALDEBUG(ah, HAL_DEBUG_ANY,
717 "%s: cannot allocate private state\n", __func__);
718 *status = HAL_ENOMEM; /* XXX */
719 return AH_FALSE;
721 priv->base.rfDetach = ar2317RfDetach;
722 priv->base.writeRegs = ar2317WriteRegs;
723 priv->base.getRfBank = ar2317GetRfBank;
724 priv->base.setChannel = ar2317SetChannel;
725 priv->base.setRfRegs = ar2317SetRfRegs;
726 priv->base.setPowerTable = ar2317SetPowerTable;
727 priv->base.getChannelMaxMinPower = ar2317GetChannelMaxMinPower;
728 priv->base.getNfAdjust = ar5212GetNfAdjust;
730 ahp->ah_pcdacTable = priv->pcdacTable;
731 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
732 ahp->ah_rfHal = &priv->base;
734 return AH_TRUE;
736 #endif /* AH_SUPPORT_2317 */