workbench/devs/networks/rtl8169/rtl8169.c

   1 /*
   2  * $Id$
   3  */
   4
   5 /*
   6         This program is free software; you can redistribute it and/or modify
   7         it under the terms of the GNU General Public License as published by
   8         the Free Software Foundation; either version 2 of the License, or
   9         (at your option) any later version.
  10
  11         This program is distributed in the hope that it will be useful, but
  12         WITHOUT ANY WARRANTY; without even the implied warranty of
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14         General Public License for more details.
  15
  16         You should have received a copy of the GNU General Public License
  17         along with this program; if not, write to the Free Software
  18         Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  19         MA 02111-1307, USA.
  20 */
  21
  22 #include "rtl8169.h"
  23
  24 #include <exec/types.h>
  25 #include <exec/resident.h>
  26 #include <exec/io.h>
  27 #include <exec/ports.h>
  28
  29 #include <aros/libcall.h>
  30 #include <aros/macros.h>
  31 #include <aros/io.h>
  32
  33 #include <oop/oop.h>
  34
  35 #include <devices/sana2.h>
  36 #include <devices/sana2specialstats.h>
  37
  38 #include <utility/utility.h>
  39 #include <utility/tagitem.h>
  40 #include <utility/hooks.h>
  41
  42 #include <hidd/pci.h>
  43
  44 #include <proto/oop.h>
  45 #include <proto/exec.h>
  46 #include <proto/dos.h>
  47 #include <proto/battclock.h>
  48
  49 #include <hardware/intbits.h>
  50
  51 #include <stdlib.h>
  52
  53 #include "unit.h"
  54 #include LC_LIBDEFS_FILE
  55
  56 #include "rtl8169_hw.h"
  57 #include "rtl8168_hw.h"
  58 #include "rtl8101_hw.h"
  59
  60 #undef LIBBASE
  61 #define LIBBASE (unit->rtl8169u_device)
  62
  63 #define _R(NAME, MAC, MASK) \
  64     { .name = NAME, .mcfg = MAC, .RxConfigMask = MASK }
  65
  66 static const struct
  67 {
  68     const char *name;
  69     UBYTE      mcfg;
  70     ULONG      RxConfigMask;    /* Clears the bits supported by this chip */
  71 } rtl_chip_info[] =
  72 {
  73         _R("RTL8169",
  74            RTL_GIGA_MAC_VER_01,
  75            0xff7e1880),
  76
  77         _R("RTL8169s",
  78            RTL_GIGA_MAC_VER_02,
  79            0xff7e1880),
  80
  81         _R("RTL8110s",
  82        RTL_GIGA_MAC_VER_03,
  83            0xff7e1880),
  84
  85         _R("RTL8169sb/8110sb",
  86        RTL_GIGA_MAC_VER_04,
  87            0xff7e1880),
  88
  89         _R("RTL8169sc/8110sc",
  90        RTL_GIGA_MAC_VER_05,
  91            0xff7e1880),
  92
  93         _R("RTL8169sc/8110sc",
  94        RTL_GIGA_MAC_VER_06,
  95            0xff7e1880),
  96
  97         _R("RTL8168b/8111b",
  98        RTL_GIGA_MAC_VER_11,
  99            0xff7e1880),
 100
 101         _R("RTL8168b/8111b",
 102        RTL_GIGA_MAC_VER_12,
 103            0xff7e1880),
 104
 105         _R("RTL8101e",
 106        RTL_GIGA_MAC_VER_13,
 107            0xff7e1880),
 108
 109         _R("RTL8100e",
 110        RTL_GIGA_MAC_VER_14,
 111            0xff7e1880),
 112
 113         _R("RTL8100e",
 114        RTL_GIGA_MAC_VER_15,
 115            0xff7e1880),
 116
 117         _R("RTL8168b/8111b",
 118        RTL_GIGA_MAC_VER_17,
 119            0xff7e1880),
 120
 121         _R("RTL8101e",
 122        RTL_GIGA_MAC_VER_16,
 123            0xff7e1880),
 124
 125         _R("RTL8168cp/8111cp",
 126        RTL_GIGA_MAC_VER_18,
 127            0xff7e1880),
 128
 129         _R("RTL8168c/8111c",
 130        RTL_GIGA_MAC_VER_19,
 131            0xff7e1880),
 132
 133         _R("RTL8168c/8111c",
 134        RTL_GIGA_MAC_VER_20,
 135            0xff7e1880),
 136
 137 /*
 138         _R("RTL8168B/8111B",
 139            CFG_METHOD_1,
 140            (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
 141            0xff7e1880,
 142            Jumbo_Frame_4k),
 143
 144         _R("RTL8168B/8111B",
 145            CFG_METHOD_2,
 146            (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
 147            0xff7e1880,
 148            Jumbo_Frame_4k),
 149
 150         _R("RTL8168B/8111B",
 151            CFG_METHOD_3,
 152            (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
 153            0xff7e1880,
 154            Jumbo_Frame_4k),
 155
 156         _R("RTL8168C/8111C",
 157            CFG_METHOD_4,
 158            RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
 159            0xff7e1880,
 160            Jumbo_Frame_6k),
 161
 162         _R("RTL8168C/8111C",
 163            CFG_METHOD_5,
 164            RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
 165            0xff7e1880,
 166            Jumbo_Frame_6k),
 167
 168         _R("RTL8168C/8111C",
 169            CFG_METHOD_6,
 170            RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
 171            0xff7e1880,
 172            Jumbo_Frame_6k),
 173
 174         _R("RTL8168CP/8111CP",
 175            CFG_METHOD_7,
 176            RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
 177            0xff7e1880,
 178            Jumbo_Frame_6k),
 179
 180         _R("RTL8168CP/8111CP",
 181            CFG_METHOD_8,
 182            RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
 183            0xff7e1880,
 184            Jumbo_Frame_6k),
 185
 186         _R("RTL8168D/8111D",
 187            CFG_METHOD_9,
 188            RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
 189            0xff7e1880,
 190            Jumbo_Frame_9k),
 191
 192         _R("RTL8168D/8111D",
 193            CFG_METHOD_10,
 194            RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
 195            0xff7e1880,
 196            Jumbo_Frame_9k),
 197
 198         _R("RTL8168D/8111D",
 199            CFG_METHOD_11,
 200            RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
 201            0xff7e1880,
 202            Jumbo_Frame_9k),*/
 203 };
 204 #undef _R
 205
 206 static const unsigned int rtl8169_rx_config =
 207         (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
 208
 209 void rtl8169_USecDelay(struct net_device *unit, ULONG usec)
 210 {
 211     if (unit != NULL)
 212     {
 213         unit->rtl8169u_DelayPort.mp_SigTask = FindTask(NULL);
 214         unit->rtl8169u_DelayReq.tr_node.io_Command = TR_ADDREQUEST;
 215         unit->rtl8169u_DelayReq.tr_time.tv_micro = usec % 1000000;
 216         unit->rtl8169u_DelayReq.tr_time.tv_secs = usec / 1000000;
 217
 218         DoIO((struct IORequest *) &unit->rtl8169u_DelayReq);
 219     }
 220 }
 221
 222 struct rtl8169_priv *get_pcnpriv(struct net_device *unit)
 223 {
 224     return unit->rtl8169u_priv;
 225 }
 226
 227 UBYTE *get_hwbase(struct net_device *unit)
 228 {
 229     return (UBYTE *) unit->rtl8169u_BaseMem;
 230 }
 231
 232 void MMIO_W8(APTR addr, UBYTE val8)
 233 {
 234     *((volatile UBYTE *)(addr)) = (val8);
 235     RTL_R8(addr);
 236 }
 237
 238 void MMIO_W16(APTR addr, UWORD val16)
 239 {
 240     *((volatile UWORD *)(addr)) = (val16);
 241     RTL_R16(addr);
 242 }
 243
 244 void MMIO_W32(APTR addr, ULONG val32)
 245 {
 246     *((volatile ULONG *)(addr)) = (val32);
 247     RTL_R32(addr);
 248 }
 249
 250 void mdio_write(struct net_device *unit, int RegAddr, UWORD value)
 251 {
 252     APTR base = get_hwbase(unit);
 253     int i;
 254
 255     RTL_W32(base + (PHYAR), PHYAR_Write |
 256                                                 (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift |
 257                                                         (value & PHYAR_Data_Mask));
 258
 259     for (i = 20; i > 0; i--)
 260     {
 261             /* Check if the RTL8169 has completed writing to the specified MDIO register */
 262             if (!(RTL_R32(base + (PHYAR)) & PHYAR_Flag))
 263             {
 264                 break;
 265                 }
 266             udelay(25);
 267     }
 268 }
 269
 270 ULONG mdio_read(struct net_device *unit, int RegAddr)
 271 {
 272     APTR                base = get_hwbase(unit);
 273     UWORD value = 0xffff;
 274     int i;
 275
 276     RTL_W32(base + (PHYAR), PHYAR_Read | (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift);
 277
 278     for (i = 20; i > 0; i--)
 279     {
 280             /* Check if the RTL8169 has completed retrieving data from the specified MDIO register */
 281             if (RTL_R32(base + (PHYAR)) & PHYAR_Flag)
 282             {
 283                 value = (UWORD)(RTL_R32(base + (PHYAR)) & PHYAR_Data_Mask);
 284                 break;
 285             }
 286             udelay(25);
 287     }
 288     return value;
 289 }
 290
 291 void rtl_phy_write(struct net_device *unit, struct phy_reg *regs, int len)
 292 {
 293         while (len-- > 0)
 294         {
 295                 mdio_write(unit, regs->reg, regs->val);
 296                 regs++;
 297         }
 298 }
 299
 300 #if 0
 301 static void rtl8169_PHYPowerUP(struct net_device *unit)
 302 {
 303         RTLD(bug("[%s] rtl8169_PHYPowerUP()\n", unit->rtl8169u_name))
 304
 305     mdio_write(unit, 0x1F, 0x0000);
 306     mdio_write(unit, 0x0E, 0x0000);
 307 }
 308 #endif
 309
 310 void rtl8169_write_gmii_reg_bit(struct net_device *unit, int reg,
 311                                                        int bitnum, int bitval)
 312 {
 313         int val;
 314
 315         val = mdio_read(unit, reg);
 316         val = (bitval == 1) ? val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
 317         mdio_write(unit, reg, val & 0xffff);
 318 }
 319
 320 static void rtl8169_GetMACVersion(struct net_device *unit)
 321 {
 322     struct rtl8169_priv *np = get_pcnpriv(unit);
 323     APTR base = get_hwbase(unit);
 324
 325         /*
 326          * The driver currently handles the 8168Bf and the 8168Be identically
 327          * but they can be identified more specifically through the test below
 328          * if needed:
 329          *
 330          * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
 331          *
 332          * Same thing for the 8101Eb and the 8101Ec:
 333          *
 334          * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
 335          */
 336         const struct
 337         {
 338                 ULONG mask;
 339                 ULONG val;
 340                 int mac_version;
 341         } mac_info[] =
 342         {
 343                 /* 8168B family. */
 344                 { 0x7c800000, 0x3c800000,       RTL_GIGA_MAC_VER_18 },
 345                 { 0x7cf00000, 0x3c000000,       RTL_GIGA_MAC_VER_19 },
 346                 { 0x7cf00000, 0x3c200000,       RTL_GIGA_MAC_VER_20 },
 347                 { 0x7c800000, 0x3c000000,       RTL_GIGA_MAC_VER_20 },
 348
 349                 /* 8168B family. */
 350                 { 0x7cf00000, 0x38000000,       RTL_GIGA_MAC_VER_12 },
 351                 { 0x7cf00000, 0x38500000,       RTL_GIGA_MAC_VER_17 },
 352                 { 0x7c800000, 0x38000000,       RTL_GIGA_MAC_VER_17 },
 353                 { 0x7c800000, 0x30000000,       RTL_GIGA_MAC_VER_11 },
 354
 355                 /* 8101 family. */
 356                 { 0x7cf00000, 0x34000000,       RTL_GIGA_MAC_VER_13 },
 357                 { 0x7cf00000, 0x34200000,       RTL_GIGA_MAC_VER_16 },
 358                 { 0x7c800000, 0x34000000,       RTL_GIGA_MAC_VER_16 },
 359                 /* FIXME: where did these entries come from ? -- FR */
 360                 { 0xfc800000, 0x38800000,       RTL_GIGA_MAC_VER_15 },
 361                 { 0xfc800000, 0x30800000,       RTL_GIGA_MAC_VER_14 },
 362
 363                 /* 8110 family. */
 364                 { 0xfc800000, 0x98000000,       RTL_GIGA_MAC_VER_06 },
 365                 { 0xfc800000, 0x18000000,       RTL_GIGA_MAC_VER_05 },
 366                 { 0xfc800000, 0x10000000,       RTL_GIGA_MAC_VER_04 },
 367                 { 0xfc800000, 0x04000000,       RTL_GIGA_MAC_VER_03 },
 368                 { 0xfc800000, 0x00800000,       RTL_GIGA_MAC_VER_02 },
 369                 { 0xfc800000, 0x00000000,       RTL_GIGA_MAC_VER_01 },
 370
 371                 { 0x00000000, 0x00000000,       RTL_GIGA_MAC_VER_01 }   /* Catch-all */
 372         }, *p = mac_info;
 373         ULONG reg;
 374
 375         reg = RTL_R32(base + (TxConfig));
 376         while ((reg & p->mask) != p->val)
 377         {
 378                 p++;
 379     }
 380         np->mcfg = p->mac_version;
 381
 382         if (p->mask == 0x00000000)
 383         {
 384         RTLD(bug("[%s] unknown MAC (%08x)\n", unit->rtl8169u_name, reg))
 385         }
 386 }
 387
 388 static void rtl8169_PrintMACVersion(struct net_device *unit)
 389 {
 390     struct rtl8169_priv *np = get_pcnpriv(unit);
 391     int i;
 392
 393     RTLD(bug("[%s] rtl8169_PrintMACVersion()\n", unit->rtl8169u_name))
 394
 395     for (i = (sizeof(rtl_chip_info) / sizeof(rtl_chip_info[0])) - 1; i >= 0; i--)
 396     {
 397         if (np->mcfg == rtl_chip_info[i].mcfg)
 398         {
 399             RTLD(bug("[%s] rtl8169_PrintMACVersion: mcfg == %s (%04d)\n", unit->rtl8169u_name,
 400                                                                              rtl_chip_info[i].name,
 401                                                                              rtl_chip_info[i].mcfg))
 402             return;
 403         }
 404     }
 405
 406     RTLD(bug("[%s] rtl8169_PrintMACVersion: mac_version == Unknown\n", unit->rtl8169u_name))
 407 }
 408
 409 static void rtl_hw_phy_config(struct net_device *unit)
 410 {
 411     struct rtl8169_priv *np = get_pcnpriv(unit);
 412
 413         rtl8169_PrintMACVersion(unit);
 414
 415         switch (np->mcfg)
 416         {
 417             case RTL_GIGA_MAC_VER_01:
 418                     break;
 419             case RTL_GIGA_MAC_VER_02:
 420             case RTL_GIGA_MAC_VER_03:
 421                     rtl8169s_hw_phy_config(unit);
 422                     break;
 423             case RTL_GIGA_MAC_VER_04:
 424                     rtl8169sb_hw_phy_config(unit);
 425                     break;
 426             case RTL_GIGA_MAC_VER_18:
 427                     rtl8168cp_hw_phy_config(unit);
 428                     break;
 429             case RTL_GIGA_MAC_VER_19:
 430                     rtl8168c_hw_phy_config(unit);
 431                     break;
 432             case RTL_GIGA_MAC_VER_20:
 433                     rtl8168cx_hw_phy_config(unit);
 434                     break;
 435             default:
 436                     break;
 437         }
 438 }
 439
 440 /*static void rtl8169_DSM(struct net_device *unit, int dev_state)
 441 {
 442     struct rtl8169_priv *np = get_pcnpriv(unit);
 443     APTR base = get_hwbase(unit);
 444
 445     switch (dev_state)
 446     {
 447         case DSM_MAC_INIT:
 448             if ((np->mcfg == CFG_METHOD_5) || (np->mcfg == CFG_METHOD_6))
 449             {
 450                 if (RTL_R8(base + (MACDBG)) & 0x80)
 451                 {
 452                         RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) | GPIO_en);
 453                 }
 454                 else
 455                 {
 456                         RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) & ~GPIO_en);
 457                 }
 458             }
 459                 break;
 460
 461         case DSM_NIC_GOTO_D3:
 462         case DSM_IF_DOWN:
 463                 if ((np->mcfg == CFG_METHOD_5) || (np->mcfg == CFG_METHOD_6))
 464                 {
 465                     if (RTL_R8(base + (MACDBG)) & 0x80)
 466                     {
 467                             RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) & ~GPIO_en);
 468                                 }
 469                         }
 470                 break;
 471
 472         case DSM_NIC_RESUME_D3:
 473         case DSM_IF_UP:
 474                 if ((np->mcfg == CFG_METHOD_5) || (np->mcfg == CFG_METHOD_6))
 475                         {
 476                     if (RTL_R8(base + (MACDBG)) & 0x80)
 477                     {
 478                             RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) | GPIO_en);
 479                                 }
 480                         }
 481                 break;
 482     }
 483 }
 484 */
 485
 486 static int rtl8169_set_speed_tbi(struct net_device *unit,
 487                                  UBYTE autoneg, UWORD speed, UBYTE duplex)
 488 {
 489     // struct rtl8169_priv *np = get_pcnpriv(unit);
 490     APTR base = get_hwbase(unit);
 491         ULONG reg;
 492
 493         reg = RTL_R32(base + TBICSR);
 494         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
 495             (duplex == DUPLEX_FULL))
 496         {
 497                 RTL_W32(base + TBICSR, reg & ~(TBINwEnable | TBINwRestart));
 498         }
 499         else if (autoneg == AUTONEG_ENABLE)
 500     {
 501                 RTL_W32(base + TBICSR, reg | TBINwEnable | TBINwRestart);
 502         }
 503         else
 504         {
 505         RTLD(bug("[%s] incorrect speed setting refused in TBI mode\n", unit->rtl8169u_name))
 506         }
 507
 508         return 0;
 509 }
 510
 511 static int rtl8169_set_speed_xmii(struct net_device *unit,
 512                                   UBYTE autoneg, UWORD speed, UBYTE duplex)
 513 {
 514     struct rtl8169_priv *np = get_pcnpriv(unit);
 515     // APTR base = get_hwbase(unit);
 516     int auto_nego = 0;
 517     int giga_ctrl = 0;
 518     // int bmcr_true_force = 0;
 519     // unsigned long flags;
 520
 521         auto_nego = mdio_read(unit, MII_ADVERTISE);
 522         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
 523                            ADVERTISE_100HALF | ADVERTISE_100FULL);
 524         giga_ctrl = mdio_read(unit, MII_CTRL1000);
 525         giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 526
 527         if (autoneg == AUTONEG_ENABLE)
 528         {
 529                 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
 530                                   ADVERTISE_100HALF | ADVERTISE_100FULL);
 531                 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 532         }
 533         else
 534         {
 535                 if (speed == SPEED_10)
 536                 {
 537                         auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 538         }
 539                 else if (speed == SPEED_100)
 540                 {
 541                         auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 542         }
 543                 else if (speed == SPEED_1000)
 544                 {
 545                         giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 546         }
 547                 if (duplex == DUPLEX_HALF)
 548                 {
 549                         auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
 550         }
 551                 if (duplex == DUPLEX_FULL)
 552                 {
 553                         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
 554         }
 555
 556                 /* This tweak comes straight from Realtek's driver. */
 557                 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
 558                    ((np->mcfg == RTL_GIGA_MAC_VER_13) ||
 559                 (np->mcfg == RTL_GIGA_MAC_VER_16)))
 560                 {
 561                         auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
 562                 }
 563         }
 564
 565         /* The 8100e/8101e do Fast Ethernet only. */
 566         if ((np->mcfg == RTL_GIGA_MAC_VER_13) ||
 567             (np->mcfg == RTL_GIGA_MAC_VER_14) ||
 568             (np->mcfg == RTL_GIGA_MAC_VER_15) ||
 569             (np->mcfg == RTL_GIGA_MAC_VER_16))
 570         {
 571                 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)))
 572                 {
 573             RTLD(bug("[%s] PHY does not support 1000Mbps.\n", unit->rtl8169u_name))
 574                 }
 575                 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 576         }
 577
 578         auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
 579
 580         if ((np->mcfg == RTL_GIGA_MAC_VER_12) ||
 581             (np->mcfg == RTL_GIGA_MAC_VER_17))
 582         {
 583                 /* Vendor specific (0x1f) and reserved (0x0e) MII registers. */
 584                 mdio_write(unit, 0x1f, 0x0000);
 585                 mdio_write(unit, 0x0e, 0x0000);
 586         }
 587
 588         np->phy_auto_nego_reg = auto_nego;
 589         np->phy_1000_ctrl_reg = giga_ctrl;
 590
 591         mdio_write(unit, MII_ADVERTISE, auto_nego);
 592         mdio_write(unit, MII_CTRL1000, giga_ctrl);
 593         mdio_write(unit, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
 594         return 0;
 595 }
 596
 597 #if 0
 598 static void rtl8169_start_rx(struct net_device *unit)
 599 {
 600     RTLD(bug("[%s] rtl8169_start_rx\n", unit->rtl8169u_name))
 601     // Already running? Stop it.
 602     /* TODO: Handle starting/stopping Rx */
 603 }
 604
 605 static void rtl8169_stop_rx(struct net_device *unit)
 606 {
 607     RTLD(bug("[%s] rtl8169_stop_rx\n", unit->rtl8169u_name))
 608     /* TODO: Handle starting/stopping Rx */
 609 }
 610
 611 static void rtl8169_start_tx(struct net_device *unit)
 612 {
 613     RTLD(bug("[%s] rtl8169_start_tx()\n", unit->rtl8169u_name))
 614     /* TODO: Handle starting/stopping Tx */
 615 }
 616
 617 static void rtl8169_stop_tx(struct net_device *unit)
 618 {
 619     RTLD(bug("[%s] rtl8169_stop_tx()\n", unit->rtl8169u_name))
 620     /* TODO: Handle starting/stopping Tx */
 621 }
 622
 623 static void rtl8169_txrx_reset(struct net_device *unit)
 624 {
 625     RTLD(bug("[%s] rtl8169_txrx_reset()\n", unit->rtl8169u_name))
 626 }
 627 #endif
 628
 629 /*
 630  * rtl8169_SetMulticast: unit->set_multicast function
 631  * Called with unit->xmit_lock held.
 632  */
 633 static void rtl8169_SetMulticast(struct net_device *unit)
 634 {
 635     ULONG addr[2];
 636     ULONG mask[2];
 637
 638     RTLD(bug("[%s] rtl8169_SetMulticast()\n", unit->rtl8169u_name))
 639
 640     memset(addr, 0, sizeof(addr));
 641     memset(mask, 0, sizeof(mask));
 642 }
 643
 644 static void rtl8169_irq_mask_and_ack(struct net_device *unit)
 645 {
 646     APTR base = get_hwbase(unit);
 647         RTL_W16(base + IntrMask, 0x0000);
 648         RTL_W16(base + IntrStatus, 0xffff);
 649 }
 650
 651 static void rtl8169_asic_down(struct net_device *unit)
 652 {
 653     APTR base = get_hwbase(unit);
 654         RTL_W8(base + ChipCmd, 0x00);
 655         rtl8169_irq_mask_and_ack(unit);
 656         RTL_R16(base + CPlusCmd);
 657 }
 658
 659 static void rtl8169_DeInit(struct net_device *unit)
 660 {
 661     APTR base = get_hwbase(unit);
 662         rtl8169_asic_down(unit);
 663
 664         /* Update the error counts. */
 665         RTL_W32(base + RxMissed, 0);
 666 }
 667
 668 static void rtl8169_GetMACAddr(struct net_device *unit, char *addr, BOOL fromROM)
 669 {
 670     APTR base = get_hwbase(unit);
 671     int i;
 672
 673     RTLD(bug("[%s] rtl8169_GetMACAddr()\n",unit->rtl8169u_name))
 674     /* Get MAC address.  FIXME: read EEPROM */
 675     for (i = 0; i < MAC_ADDR_LEN; i++)
 676     {
 677         addr[i] = RTL_R8(base + MAC0 + i);
 678     }
 679 }
 680
 681 static void rtl8169_SetMACAddr(struct net_device *unit)
 682 {
 683     APTR base = get_hwbase(unit);
 684
 685     RTLD(bug("[%s] rtl8169_SetMACAddr()\n", unit->rtl8169u_name))
 686
 687     RTL_W8(base + (Cfg9346), Cfg9346_Unlock);
 688
 689     RTL_W32(base + (MAC0),
 690             unit->rtl8169u_dev_addr[0] |
 691             (unit->rtl8169u_dev_addr[1] << 8) |
 692             (unit->rtl8169u_dev_addr[2] << 16) |
 693             (unit->rtl8169u_dev_addr[3] << 24));
 694     RTL_W32(base + (MAC4),
 695             unit->rtl8169u_dev_addr[4] |
 696             (unit->rtl8169u_dev_addr[5] << 8));
 697
 698     RTL_W8(base + (Cfg9346), Cfg9346_Lock);
 699
 700     RTLD(
 701             /* Read it back to be certain! */
 702             TEXT        newmac[6];
 703             rtl8169_GetMACAddr(unit, newmac, FALSE);
 704
 705             bug("[%s] rtl8169_SetMACAddr: New MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", unit->rtl8169u_name,
 706                         newmac[0], newmac[1], newmac[2],
 707                         newmac[3], newmac[4], newmac[5])
 708     )
 709 }
 710
 711 static void rtl8169_LinkOption(struct net_device *unit, UBYTE *aut, UWORD *spd, UBYTE *dup)
 712 {
 713     unsigned char opt_speed;
 714     unsigned char opt_duplex;
 715     unsigned char opt_autoneg;
 716
 717     opt_speed =   ((unit->rtl8169u_UnitNum < MAX_UNITS) && (unit->rtl8169u_UnitNum >= 0)) ? unit->rtl8169u_device->speed[unit->rtl8169u_UnitNum] : 0xff;
 718     opt_duplex =  ((unit->rtl8169u_UnitNum < MAX_UNITS) && (unit->rtl8169u_UnitNum >= 0)) ? unit->rtl8169u_device->duplex[unit->rtl8169u_UnitNum] : 0xff;
 719     opt_autoneg = ((unit->rtl8169u_UnitNum < MAX_UNITS) && (unit->rtl8169u_UnitNum >= 0)) ? unit->rtl8169u_device->autoneg[unit->rtl8169u_UnitNum] : 0xff;
 720
 721     if ((opt_speed == 0xff) |
 722       (opt_duplex == 0xff) |
 723       (opt_autoneg == 0xff))
 724     {
 725             *spd = SPEED_1000;
 726             *dup = DUPLEX_FULL;
 727             *aut = AUTONEG_ENABLE;
 728     }
 729     else
 730     {
 731             *spd = unit->rtl8169u_device->speed[unit->rtl8169u_UnitNum];
 732             *dup = unit->rtl8169u_device->duplex[unit->rtl8169u_UnitNum];
 733             *aut = unit->rtl8169u_device->autoneg[unit->rtl8169u_UnitNum];
 734     }
 735 }
 736
 737 static void rtl8169_phy_reset(struct net_device *unit)
 738 {
 739     struct rtl8169_priv *np = get_pcnpriv(unit);
 740     APTR base = get_hwbase(unit);
 741         unsigned int i;
 742
 743         if ((np->mcfg <= RTL_GIGA_MAC_VER_06) &&
 744             (RTL_R8(base + PHYstatus) & TBI_Enable))
 745         {
 746         rtl8169_tbi_reset_enable(unit);
 747     }
 748     else
 749     {
 750         rtl8169_xmii_reset_enable(unit);
 751     }
 752
 753         if ((np->mcfg <= RTL_GIGA_MAC_VER_06) &&
 754             (RTL_R8(base + PHYstatus) & TBI_Enable))
 755         {
 756         for (i = 0; i < 100; i++)
 757         {
 758                 if (!rtl8169_tbi_reset_pending(unit))
 759                 {
 760                         return;
 761             }
 762                 rtl8169_USecDelay(unit, 100);
 763         }
 764     }
 765     else
 766     {
 767         for (i = 0; i < 100; i++)
 768         {
 769                 if (!rtl8169_xmii_reset_pending(unit))
 770                 {
 771                         return;
 772             }
 773                 rtl8169_USecDelay(unit, 100);
 774         }
 775     }
 776 }
 777
 778 static void rtl8169_Init(struct net_device *unit)
 779 {
 780     struct rtl8169_priv *np = get_pcnpriv(unit);
 781     APTR base = get_hwbase(unit);
 782     UBYTE autoneg, duplex;
 783     UWORD speed;
 784     int i;
 785     // int config1;
 786
 787     RTLD(bug("[%s] rtl8169_Init(unit @ %p)\n", unit->rtl8169u_name, unit))
 788
 789         np->intr_mask = 0xffff;
 790         np->intr_event = unit->rtl8169u_intr_event;
 791         np->napi_event = unit->rtl8169u_napi_event;
 792
 793         /* Unneeded ? Don't mess with Mrs. Murphy. */
 794         rtl8169_irq_mask_and_ack(unit);
 795
 796         /* Soft reset the chip. */
 797         RTL_W8(base + ChipCmd, CmdReset);
 798
 799         /* Check that the chip has finished the reset. */
 800         for (i = 0; i < 100; i++)
 801     {
 802                 if ((RTL_R8(base + ChipCmd) & CmdReset) == 0)
 803                 {
 804                         break;
 805         }
 806                 rtl8169_USecDelay(unit, 100);
 807         }
 808
 809     /* Identify chip attached to board */
 810     rtl8169_GetMACVersion(unit);
 811     rtl8169_PrintMACVersion(unit);
 812
 813     for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++)
 814     {
 815                 if (np->mcfg == rtl_chip_info[i].mcfg)
 816                 {
 817                         break;
 818         }
 819         }
 820
 821         if (i == ARRAY_SIZE(rtl_chip_info))
 822         {
 823                 i = 0;
 824         }
 825     np->chipset = i;
 826
 827     unit->rtl8169u_rtl_chipname = rtl_chip_info[np->chipset].name;
 828
 829     RTL_W8(base + (Cfg9346), Cfg9346_Unlock);
 830     RTL_W8(base + (Config1), RTL_R8(base + Config1) | PMEnable);
 831     RTL_W8(base + (Config5), RTL_R8(base + Config5) & PMEStatus);
 832
 833     RTLD(bug("[%s] rtl8169_Init: Power Management enabled\n", unit->rtl8169u_name))
 834
 835 /*    RTL_W8(base + (Cfg9346), Cfg9346_Unlock);
 836     np->features |= rtl8169_try_msi(pdev, base);
 837     RTL_W8(base + (Cfg9346), Cfg9346_Lock);
 838     */
 839
 840     RTL_W8(base + (Cfg9346), Cfg9346_Lock);
 841
 842     rtl8169_GetMACAddr(unit, &np->orig_mac[0], TRUE);
 843
 844     unit->rtl8169u_dev_addr[0] = unit->rtl8169u_org_addr[0] = np->orig_mac[0];
 845     unit->rtl8169u_dev_addr[1] = unit->rtl8169u_org_addr[1] = np->orig_mac[1];
 846     unit->rtl8169u_dev_addr[2] = unit->rtl8169u_org_addr[2] = np->orig_mac[2];
 847     unit->rtl8169u_dev_addr[3] = unit->rtl8169u_org_addr[3] = np->orig_mac[3];
 848     unit->rtl8169u_dev_addr[4] = unit->rtl8169u_org_addr[4] = np->orig_mac[4];
 849     unit->rtl8169u_dev_addr[5] = unit->rtl8169u_org_addr[5] = np->orig_mac[5];
 850
 851     RTLD(bug("[%s] rtl8169_Init: MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", unit->rtl8169u_name,
 852                      unit->rtl8169u_dev_addr[0], unit->rtl8169u_dev_addr[1], unit->rtl8169u_dev_addr[2],
 853                      unit->rtl8169u_dev_addr[3], unit->rtl8169u_dev_addr[4], unit->rtl8169u_dev_addr[5]))
 854
 855     bug("[%s] rtl8169_Init: This product is covered by one or more of the following patents:\n", unit->rtl8169u_name);
 856     bug("[%s] rtl8169_Init: US5,307,459, US5,434,872, US5,732,094, US6,570,884, US6,115,776, and US6,327,625.\n", unit->rtl8169u_name);
 857
 858 /*
 859     unit->features |= NETIF_F_IP_CSUM;
 860 */
 861     np->cp_cmd |= RxChkSum;
 862     np->cp_cmd |= RTL_R16(base + (CPlusCmd));
 863
 864     //np->intr_mask = unit->rtl8169u_intr_mask;
 865
 866     // rtl8169_init_phy
 867     rtl_hw_phy_config(unit);
 868
 869         if (np->mcfg <= RTL_GIGA_MAC_VER_06)
 870     {
 871                 RTL_W8(base +  0x82, 0x01);
 872         }
 873
 874     RTLD(bug("[%s] rtl8169_Init: PHY Configured\n", unit->rtl8169u_name))
 875
 876     HIDD_PCIDevice_WriteConfigByte(unit->rtl8169u_PCIDevice, PCI_LATENCY_TIMER, 0x40);
 877
 878     if (np->mcfg <= RTL_GIGA_MAC_VER_06)
 879     {
 880         HIDD_PCIDevice_WriteConfigByte(unit->rtl8169u_PCIDevice, PCI_CACHE_LINE_SIZE, 0x08);
 881     }
 882
 883         if (np->mcfg == RTL_GIGA_MAC_VER_02)
 884         {
 885                 RTL_W8(base + 0x82, 0x01);
 886                 mdio_write(unit, 0x0b, 0x0000); //w 0x0b 15 0 0
 887         }
 888
 889         rtl8169_phy_reset(unit);
 890
 891     rtl8169_LinkOption(unit, &autoneg, &speed, &duplex);
 892
 893         if ((np->mcfg <= RTL_GIGA_MAC_VER_06) &&
 894             (RTL_R8(base + PHYstatus) & TBI_Enable))
 895         {
 896         rtl8169_set_speed_tbi(unit, autoneg, speed, duplex);
 897         }
 898         else
 899         {
 900         rtl8169_set_speed_xmii(unit, autoneg, speed, duplex);
 901         }
 902
 903     RTLD(bug("[%s] rtl8169_Init: Link Speed %dbps %s duplex %s\n", unit->rtl8169u_name, speed, (duplex == DUPLEX_HALF) ? "half" :"full", (autoneg == AUTONEG_ENABLE) ? "(autoneg)" :""))
 904 }
 905
 906 static void rtl8169_drain_tx(struct net_device *unit)
 907 {
 908     // struct rtl8169_priv *np = get_pcnpriv(unit);
 909     // int i;
 910 //    for (i = 0; i < NUM_TX_DESC; i++) {
 911     /* TODO: rtl8169_drain_tx does nothing atm. */
 912 //    }
 913 }
 914
 915 static void rtl8169_drain_rx(struct net_device *unit)
 916 {
 917     // struct rtl8169_priv *np = get_pcnpriv(unit);
 918     // int i;
 919 //    for (i = 0; i < RX_RING_SIZE; i++) {
 920     /* TODO: rtl8169_drain_rx does nothing atm. */
 921 //    }
 922 }
 923
 924 static void drain_ring(struct net_device *unit)
 925 {
 926     rtl8169_drain_tx(unit);
 927     rtl8169_drain_rx(unit);
 928 }
 929
 930 static int request_irq(struct net_device *unit)
 931 {
 932     RTLD(bug("[%s] request_irq()\n", unit->rtl8169u_name))
 933
 934     if (!unit->rtl8169u_IntsAdded)
 935     {
 936         if (!HIDD_PCIDevice_AddInterrupt(unit->rtl8169u_PCIDevice, &unit->rtl8169u_irqhandler))
 937             return 1;
 938         AddIntServer(INTB_VERTB, &unit->rtl8169u_touthandler);
 939         unit->rtl8169u_IntsAdded = TRUE;
 940     }
 941
 942     return 0;
 943 }
 944
 945 static void free_irq(struct net_device *unit)
 946 {
 947     if (unit->rtl8169u_IntsAdded)
 948     {
 949         HIDD_PCIDevice_RemoveInterrupt(unit->rtl8169u_PCIDevice, &unit->rtl8169u_irqhandler);
 950         RemIntServer(INTB_VERTB, &unit->rtl8169u_touthandler);
 951         unit->rtl8169u_IntsAdded = FALSE;
 952     }
 953 }
 954
 955 void rtl_set_rx_max_size(struct net_device *unit)
 956 {
 957     struct rtl8169_priv *np = get_pcnpriv(unit);
 958     APTR base = get_hwbase(unit);
 959     unsigned int mtu = unit->rtl8169u_mtu;
 960
 961     RTLD(bug("[%s] rtl_set_rx_max_size()\n", unit->rtl8169u_name))
 962
 963     np->rx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
 964
 965     RTLD(bug("[%s] %d\n", unit->rtl8169u_name, np->rx_buf_sz + 1))
 966
 967     RTL_W16(base + (RxMaxSize), np->rx_buf_sz + 1);
 968 }
 969
 970 /*void rtl_set_tx_max_size(struct net_device *unit)
 971 {
 972     struct rtl8169_priv *np = get_pcnpriv(unit);
 973     APTR base = get_hwbase(unit);
 974     unsigned int mtu = unit->rtl8169u_mtu;
 975
 976     RTLD(bug("[%s] rtl_set_tx_max_size()\n", unit->rtl8169u_name))
 977
 978     np->tx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 : TX_BUF_SIZE;
 979
 980     RTL_W16(base + (TxMaxSize), np->tx_buf_sz + 1);
 981 }*/
 982
 983
 984 /*static void rtl8169_NICReset(struct net_device *unit)
 985 {
 986     struct rtl8169_priv *np = get_pcnpriv(unit);
 987     APTR base = get_hwbase(unit);
 988     int i;
 989
 990     RTLD(bug("[%s] rtl8169_NICReset()\n", unit->rtl8169u_name))
 991
 992     if ((np->mcfg != CFG_METHOD_1) &&
 993         (np->mcfg != CFG_METHOD_2) &&
 994         (np->mcfg != CFG_METHOD_3))
 995     {
 996             RTL_W8(base + (ChipCmd), StopReq | CmdRxEnb | CmdTxEnb);
 997             udelay(100);
 998     }
 999
1000     // Soft reset the chip.
1001     RTL_W8(base + (ChipCmd), CmdReset);
1002
1003     // Check that the chip has finished the reset.
1004     for (i = 1000; i > 0; i--)
1005     {
1006             if ((RTL_R8(base + (ChipCmd)) & CmdReset) == 0)
1007             {
1008                 break;
1009             }
1010             udelay(100);
1011     }
1012 }*/
1013
1014 UWORD rtl_rw_cpluscmd(struct net_device *unit)
1015 {
1016     APTR base = get_hwbase(unit);
1017         UWORD cmd;
1018
1019         cmd = RTL_R16(base + CPlusCmd);
1020         RTL_W16(base + CPlusCmd, cmd);
1021         return cmd;
1022 }
1023
1024 void rtl_set_rx_tx_desc_registers(struct net_device *unit)
1025 {
1026     struct rtl8169_priv *np = get_pcnpriv(unit);
1027     APTR base = get_hwbase(unit);
1028         /*
1029          * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1030          * register to be written before TxDescAddrLow to work.
1031          * Switching from MMIO to I/O access fixes the issue as well.
1032          */
1033     RTL_W32(base + (TxDescStartAddrHigh), ((UQUAD) (IPTR)np->TxPhyAddr >> 32));
1034     RTL_W32(base + (TxDescStartAddrLow), ((UQUAD) (IPTR)np->TxPhyAddr & DMA_32BIT_MASK));
1035     RTL_W32(base + (RxDescAddrHigh), ((UQUAD) (IPTR)np->RxPhyAddr >> 32));
1036     RTL_W32(base + (RxDescAddrLow), ((UQUAD) (IPTR)np->RxPhyAddr & DMA_32BIT_MASK));
1037 }
1038
1039 void rtl_set_rx_tx_config_registers(struct net_device *unit)
1040 {
1041     struct rtl8169_priv *np = get_pcnpriv(unit);
1042     APTR base = get_hwbase(unit);
1043
1044         ULONG cfg = rtl8169_rx_config;
1045
1046         cfg |= (RTL_R32(base + RxConfig) & rtl_chip_info[np->chipset].RxConfigMask);
1047         RTL_W32(base + RxConfig, cfg);
1048
1049         /* Set DMA burst size and Interframe Gap Time */
1050         RTL_W32(base + TxConfig, (TX_DMA_BURST << TxDMAShift) |
1051                                      (InterFrameGap << TxInterFrameGapShift));
1052 }
1053
1054 void rtl_set_rx_mode(struct net_device *unit)
1055 {
1056     struct rtl8169_priv *np = get_pcnpriv(unit);
1057     APTR base = get_hwbase(unit);
1058
1059         // unsigned long flags;
1060         ULONG mc_filter[2];     /* Multicast hash filter */
1061         int rx_mode;
1062         ULONG tmp = 0;
1063
1064     if (unit->rtl8169u_flags & IFF_PROMISC)
1065     {
1066             /* Unconditionally log net taps. */
1067             RTLD(bug("[%s] rtl8169_SetRxMode: Promiscuous mode enabled\n", unit->rtl8169u_name))
1068                 rx_mode = AcceptBroadcast |
1069                           AcceptMulticast |
1070                           AcceptMyPhys |
1071                           AcceptAllPhys;
1072                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1073         }
1074         else if ((unit->rtl8169u_mc_count > unit->rtl8169u_device->rtl8169b_MulticastFilterLimit) ||
1075                      (unit->rtl8169u_flags))
1076     {
1077                 /* Too many to filter perfectly -- accept all multicasts. */
1078                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1079                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1080         }
1081         else
1082         {
1083                 struct dev_mc_list *mclist;
1084                 unsigned int i;
1085
1086                 rx_mode = AcceptBroadcast | AcceptMyPhys;
1087                 mc_filter[1] = mc_filter[0] = 0;
1088                 for (i = 0, mclist = unit->rtl8169u_mc_list; mclist && i < unit->rtl8169u_mc_count;
1089                      i++, mclist = mclist->next)
1090                 {
1091 //                      int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1092 //                      mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1093                         rx_mode |= AcceptMulticast;
1094                 }
1095         }
1096
1097         tmp = rtl8169_rx_config | rx_mode |
1098               (RTL_R32(base + RxConfig) & rtl_chip_info[np->chipset].RxConfigMask);
1099
1100         if (np->mcfg > RTL_GIGA_MAC_VER_06)
1101         {
1102                 ULONG data = mc_filter[0];
1103
1104                 mc_filter[0] = swab32(mc_filter[1]);
1105                 mc_filter[1] = swab32(data);
1106         }
1107
1108         RTL_W32(base + MAR0 + 0, mc_filter[0]);
1109         RTL_W32(base + MAR0 + 4, mc_filter[1]);
1110
1111         RTL_W32(base + RxConfig, tmp);
1112 }
1113
1114 #if 0
1115 static unsigned int rtl8169_XMIILinkOK(struct net_device *unit)
1116 {
1117     // struct rtl8169_priv *np = get_pcnpriv(unit);
1118     APTR base = get_hwbase(unit);
1119
1120     mdio_write(unit, 0x1f, 0x0000);
1121
1122     return RTL_R8(base + (PHYstatus)) & LinkStatus;
1123 }
1124 #endif
1125
1126 void rtl8169_CheckLinkStatus(struct net_device *unit)
1127 {
1128     struct rtl8169_priv *np = get_pcnpriv(unit);
1129     APTR base = get_hwbase(unit);
1130     // unsigned long flags;
1131     int result;
1132
1133         if ((np->mcfg <= RTL_GIGA_MAC_VER_06) &&
1134             (RTL_R8(base + PHYstatus) & TBI_Enable))
1135         {
1136         result = rtl8169_tbi_link_ok(unit);
1137     }
1138     else
1139     {
1140         result = rtl8169_xmii_link_ok(unit);
1141     }
1142
1143     if (result)
1144     {
1145             netif_carrier_on(unit);
1146             RTLD(bug("[%s] rtl8169_CheckLinkStatus: Link Up\n", unit->rtl8169u_name))
1147     }
1148     else
1149     {
1150             RTLD(bug("[%s] rtl8169_CheckLinkStatus: Link Down\n", unit->rtl8169u_name))
1151             netif_carrier_off(unit);
1152     }
1153 }
1154
1155 static void rtl8169_InitRingIndexes(struct rtl8169_priv *np)
1156 {
1157     np->dirty_tx = 0;
1158     np->dirty_rx = 0;
1159     np->cur_tx = 0;
1160     np->cur_rx = 0;
1161 }
1162
1163 static void rtl8169_TxDescInit(struct rtl8169_priv *np)
1164 {
1165     int i = 0;
1166
1167     memset(np->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc));
1168
1169     for (i = 0; i < NUM_TX_DESC; i++)
1170     {
1171                 if(i == (NUM_TX_DESC - 1))
1172                 {
1173                     np->TxDescArray[i].opts1 = AROS_LONG2LE(RingEnd);
1174             }
1175         }
1176 }
1177
1178 static ULONG rtl8169_TxFill(struct net_device *unit, ULONG start, ULONG end)
1179 {
1180     struct rtl8169_priv *np = get_pcnpriv(unit);
1181     ULONG cur;
1182
1183     for (cur = start; end - cur > 0; cur++)
1184     {
1185         int i = cur % NUM_TX_DESC;
1186
1187         if (np->TxDescArray[i].addr)
1188         {
1189             continue;
1190         }
1191
1192         if ((np->TxDescArray[i].addr = (IPTR)HIDD_PCIDriver_AllocPCIMem(unit->rtl8169u_PCIDriver, TX_BUF_SIZE)) == 0)
1193         {
1194             break;
1195         }
1196     }
1197     return cur - start;
1198 }
1199
1200 static void rtl8169_RxDescInit(struct rtl8169_priv *np)
1201 {
1202     int i = 0;
1203
1204     memset(np->RxDescArray, 0x0, NUM_RX_DESC * sizeof(struct RxDesc));
1205
1206     for (i = 0; i < NUM_RX_DESC; i++)
1207     {
1208         if(i == (NUM_RX_DESC - 1))
1209         {
1210             np->RxDescArray[i].opts1 = AROS_LONG2LE((DescOwn | RingEnd | (ULONG) np->rx_buf_sz));
1211         }
1212         else
1213         {
1214             np->RxDescArray[i].opts1 = AROS_LONG2LE(DescOwn | (ULONG) np->rx_buf_sz);
1215         }
1216     }
1217 }
1218
1219 static ULONG rtl8169_RxFill(struct net_device *unit, ULONG start, ULONG end)
1220 {
1221     struct rtl8169_priv *np = get_pcnpriv(unit);
1222     ULONG cur;
1223
1224     for (cur = start; end - cur > 0; cur++)
1225     {
1226         int i = cur % NUM_RX_DESC;
1227
1228         if (np->RxDescArray[i].addr)
1229         {
1230             continue;
1231         }
1232
1233         if ((np->RxDescArray[i].addr = (IPTR)HIDD_PCIDriver_AllocPCIMem(unit->rtl8169u_PCIDriver, np->rx_buf_sz)) == 0)
1234         {
1235             break;
1236         }
1237     }
1238     return cur - start;
1239 }
1240
1241 static inline void rtl8169_MarkAsLastDescriptor(struct RxDesc *desc)
1242 {
1243         desc->opts1 |= AROS_LONG2LE(RingEnd);
1244 }
1245
1246 static int rtl8169_InitRings(struct net_device *unit)
1247 {
1248     struct rtl8169_priv *np = get_pcnpriv(unit);
1249
1250     RTLD(bug("[%s] rtl8169_InitRings(unit @ %p)\n", unit->rtl8169u_name, unit))
1251
1252     rtl8169_InitRingIndexes(np);
1253
1254     rtl8169_TxDescInit(np);
1255     rtl8169_RxDescInit(np);
1256
1257     if (rtl8169_RxFill(unit, 0, NUM_RX_DESC) != NUM_RX_DESC)
1258     {
1259             goto err_out;
1260     }
1261
1262     if (rtl8169_TxFill(unit, 0, NUM_TX_DESC) != NUM_TX_DESC)
1263     {
1264             goto err_out;
1265     }
1266
1267 //    rtl8169_MarkAsLastDescriptor(np->RxDescArray + (NUM_RX_DESC - 1));
1268
1269     return 0;
1270
1271 err_out:
1272 //    rtl8169_rx_clear(np);
1273     return -1;
1274 }
1275
1276 static void rtl8169_HWStart(struct net_device *unit)
1277 {
1278     int i;
1279     APTR base = get_hwbase(unit);
1280
1281         /* Soft reset the chip. */
1282     RTL_W8(base + ChipCmd, CmdReset);
1283
1284         /* Check that the chip has finished the reset. */
1285         for (i = 0; i < 100; i++)
1286         {
1287                 if ((RTL_R8(base + ChipCmd) & CmdReset) == 0)
1288                 {
1289                         break;
1290         }
1291             udelay(100);
1292         }
1293
1294     switch(unit->rtl8169u_config)
1295     {
1296         case RTL_CFG_0:
1297             rtl_hw_start_8169(unit);
1298             break;
1299         case RTL_CFG_1:
1300                 case UNKNOWN_CFG:
1301             rtl_hw_start_8168(unit);
1302             break;
1303         case RTL_CFG_2:
1304             rtl_hw_start_8101(unit);
1305             break;
1306     }
1307
1308         netif_start_queue(unit);
1309 }
1310
1311 static int rtl8169_Open(struct net_device *unit)
1312 {
1313     struct rtl8169_priv *np = get_pcnpriv(unit);
1314     // APTR base = get_hwbase(unit);
1315     int ret;
1316
1317     RTLD(bug("[%s] rtl8169_Open(unit @ %p)\n", unit->rtl8169u_name, unit))
1318
1319     rtl_set_rx_max_size(unit);
1320
1321     ret = request_irq(unit);
1322     if (ret)
1323     {
1324         goto out_drain;
1325     }
1326
1327     np->TxDescArray = HIDD_PCIDriver_AllocPCIMem(unit->rtl8169u_PCIDriver, R8169_TX_RING_BYTES);
1328     np->TxPhyAddr = np->TxDescArray;
1329
1330     np->RxDescArray = HIDD_PCIDriver_AllocPCIMem(unit->rtl8169u_PCIDriver, R8169_RX_RING_BYTES);
1331     np->RxPhyAddr = np->RxDescArray;
1332
1333     if ((np->TxDescArray) && (np->RxDescArray))
1334     {
1335         RTLD(bug("[%s] rtl8169_Open: Allocated Descriptor Arrays - Tx @ %p (%d bytes), Rx @ %p (%d bytes)\n", unit->rtl8169u_name,
1336                                  np->TxDescArray, R8169_TX_RING_BYTES,
1337                                  np->RxDescArray, R8169_RX_RING_BYTES))
1338                 if (rtl8169_InitRings(unit) == 0)
1339                 {
1340                     rtl8169_HWStart(unit);
1341
1342 //                  if (np->esd_flag == 0)
1343 //                      {
1344 //                              rtl8169_request_esd_timer(unit);
1345 //                  }
1346
1347 //                  rtl8169_request_link_timer(unit);
1348
1349                     //rtl8169_DSM(unit, DSM_IF_UP);
1350
1351                     rtl8169_CheckLinkStatus(unit);
1352                 }
1353                 else
1354                 {
1355                         RTLD(bug("[%s] rtl8169_Open: Failed to initialise Descriptor Arrays!\n",unit->rtl8169u_name))
1356                 }
1357     }
1358     else
1359     {
1360         RTLD(bug("[%s] rtl8169_Open: Failed to Allocate Descriptor Arrays!\n",unit->rtl8169u_name))
1361     }
1362
1363         unit->rtl8169u_flags |= IFF_UP;
1364     return 0;
1365
1366 out_drain:
1367     drain_ring(unit);
1368     return ret;
1369 }
1370
1371 static int rtl8169_Close(struct net_device *unit)
1372 {
1373     struct rtl8169_priv *np = get_pcnpriv(unit);
1374     // UBYTE *base;
1375
1376     RTLD(bug("[%s] rtl8169_Close()\n", unit->rtl8169u_name))
1377
1378     unit->rtl8169u_flags &= ~IFF_UP;
1379
1380     ObtainSemaphore(&np->lock);
1381 //    np->in_shutdown = 1;
1382     ReleaseSemaphore(&np->lock);
1383
1384     unit->rtl8169u_toutNEED = FALSE;
1385
1386     netif_stop_queue(unit);
1387     ObtainSemaphore(&np->lock);
1388
1389     rtl8169_DeInit(unit);
1390
1391     ReleaseSemaphore(&np->lock);
1392
1393     free_irq(unit);
1394
1395     drain_ring(unit);
1396
1397 //    HIDD_PCIDriver_FreePCIMem(unit->rtl8169u_PCIDriver, np->rx_buffer);
1398 //    HIDD_PCIDriver_FreePCIMem(unit->rtl8169u_PCIDriver, np->tx_buffer);
1399
1400     ReportEvents(LIBBASE, unit, S2EVENT_OFFLINE);
1401
1402     return 0;
1403 }
1404
1405 void rtl8169_get_functions(struct net_device *Unit)
1406 {
1407     Unit->initialize = rtl8169_Init;
1408     Unit->deinitialize = rtl8169_DeInit;
1409     Unit->start = rtl8169_Open;
1410     Unit->stop = rtl8169_Close;
1411     Unit->set_mac_address = rtl8169_SetMACAddr;
1412     Unit->set_multicast = rtl8169_SetMulticast;
1413 }