1 #ifndef __NVC0_ACCEL_H__
2 #define __NVC0_ACCEL_H__
4 #include "nvc0_pushbuf.h"
6 /* scratch buffer offsets */
7 #define CODE_OFFSET 0x00000 /* Code */
8 #define TIC_OFFSET 0x02000 /* Texture Image Control */
9 #define TSC_OFFSET 0x03000 /* Texture Sampler Control */
10 #define NTFY_OFFSET 0x08000
11 #define MISC_OFFSET 0x10000
13 /* fragment programs */
14 #define PFP_S 0x0000 /* (src) */
15 #define PFP_C 0x0100 /* (src IN mask) */
16 #define PFP_CCA 0x0200 /* (src IN mask) component-alpha */
17 #define PFP_CCASA 0x0300 /* (src IN mask) component-alpha src-alpha */
18 #define PFP_S_A8 0x0400 /* (src) a8 rt */
19 #define PFP_C_A8 0x0500 /* (src IN mask) a8 rt - same for CA and CA_SA */
20 #define PFP_NV12 0x0600 /* NV12 YUV->RGB */
23 #define PVP_PASS 0x0700 /* vertex pass-through shader */
25 /* shader constants */
26 #define CB_OFFSET 0x1000
28 #define VTX_ATTR(a, c, t, s) \
29 ((NVC0_3D_VTX_ATTR_DEFINE_TYPE_##t) | \
30 ((a) << NVC0_3D_VTX_ATTR_DEFINE_ATTR__SHIFT) | \
31 ((c) << NVC0_3D_VTX_ATTR_DEFINE_COMP__SHIFT) | \
32 ((s) << NVC0_3D_VTX_ATTR_DEFINE_SIZE__SHIFT))
34 static __inline__
void
35 VTX1s(NVPtr pNv
, float sx
, float sy
, unsigned dx
, unsigned dy
)
37 struct nouveau_channel
*chan
= pNv
->chan
;
38 struct nouveau_grobj
*fermi
= pNv
->Nv3D
;
40 BEGIN_RING(chan
, fermi
, NVC0_3D_VTX_ATTR_DEFINE
, 3);
41 OUT_RING (chan
, VTX_ATTR(1, 2, FLOAT
, 4));
45 BEGIN_RING(chan
, fermi
, NVC0_3D_VTX_ATTR_DEFINE
, 2);
46 OUT_RING (chan
, VTX_ATTR(0, 2, USCALED
, 2));
47 OUT_RING (chan
, (dy
<< 16) | dx
);
49 BEGIN_RING(chan
, fermi
, NVC0_3D_VTX_ATTR_DEFINE
, 3);
50 OUT_RING (chan
, VTX_ATTR(0, 2, FLOAT
, 4));
51 OUT_RINGf (chan
, (float)dx
);
52 OUT_RINGf (chan
, (float)dy
);
56 static __inline__
void
57 VTX2s(NVPtr pNv
, float s1x
, float s1y
, float s2x
, float s2y
,
58 unsigned dx
, unsigned dy
)
60 struct nouveau_channel
*chan
= pNv
->chan
;
61 struct nouveau_grobj
*fermi
= pNv
->Nv3D
;
63 BEGIN_RING(chan
, fermi
, NVC0_3D_VTX_ATTR_DEFINE
, 3);
64 OUT_RING (chan
, VTX_ATTR(1, 2, FLOAT
, 4));
65 OUT_RINGf (chan
, s1x
);
66 OUT_RINGf (chan
, s1y
);
67 BEGIN_RING(chan
, fermi
, NVC0_3D_VTX_ATTR_DEFINE
, 3);
68 OUT_RING (chan
, VTX_ATTR(2, 2, FLOAT
, 4));
69 OUT_RINGf (chan
, s2x
);
70 OUT_RINGf (chan
, s2y
);
72 BEGIN_RING(chan
, fermi
, NVC0_3D_VTX_ATTR_DEFINE
, 2);
73 OUT_RING (chan
, VTX_ATTR(0, 2, USCALED
, 2));
74 OUT_RING (chan
, (dy
<< 16) | dx
);
76 BEGIN_RING(chan
, fermi
, NVC0_3D_VTX_ATTR_DEFINE
, 3);
77 OUT_RING (chan
, VTX_ATTR(0, 2, FLOAT
, 4));
78 OUT_RINGf (chan
, (float)dx
);
79 OUT_RINGf (chan
, (float)dy
);