1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 #include "i915_context.h"
35 #include "pipe/p_shader_tokens.h"
36 #include "util/u_math.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_parse.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "draw/draw_vertex.h"
46 * Simple pass-through fragment shader to use when we don't have
47 * a real shader (or it fails to compile for some reason).
49 static unsigned passthrough
[] =
51 _3DSTATE_PIXEL_SHADER_PROGRAM
| ((2*3)-1),
53 /* declare input color:
56 (REG_TYPE_T
<< D0_TYPE_SHIFT
) |
57 (T_DIFFUSE
<< D0_NR_SHIFT
) |
62 /* move to output color:
65 (REG_TYPE_OC
<< A0_DEST_TYPE_SHIFT
) |
67 (REG_TYPE_T
<< A0_SRC0_TYPE_SHIFT
) |
68 (T_DIFFUSE
<< A0_SRC0_NR_SHIFT
)),
69 0x01230000, /* .xyzw */
74 /* 1, -1/3!, 1/5!, -1/7! */
75 static const float sin_constants
[4] = { 1.0,
77 1.0f
/ (5 * 4 * 3 * 2 * 1),
78 -1.0f
/ (7 * 6 * 5 * 4 * 3 * 2 * 1)
81 /* 1, -1/2!, 1/4!, -1/6! */
82 static const float cos_constants
[4] = { 1.0,
84 1.0f
/ (4 * 3 * 2 * 1),
85 -1.0f
/ (6 * 5 * 4 * 3 * 2 * 1)
91 * component-wise negation of ureg
94 negate(int reg
, int x
, int y
, int z
, int w
)
96 /* Another neat thing about the UREG representation */
97 return reg
^ (((x
& 1) << UREG_CHANNEL_X_NEGATE_SHIFT
) |
98 ((y
& 1) << UREG_CHANNEL_Y_NEGATE_SHIFT
) |
99 ((z
& 1) << UREG_CHANNEL_Z_NEGATE_SHIFT
) |
100 ((w
& 1) << UREG_CHANNEL_W_NEGATE_SHIFT
));
105 * In the event of a translation failure, we'll generate a simple color
106 * pass-through program.
109 i915_use_passthrough_shader(struct i915_fragment_shader
*fs
)
111 fs
->program
= (uint
*) MALLOC(sizeof(passthrough
));
113 memcpy(fs
->program
, passthrough
, sizeof(passthrough
));
114 fs
->program_len
= Elements(passthrough
);
116 fs
->num_constants
= 0;
121 i915_program_error(struct i915_fp_compile
*p
, const char *msg
, ...)
126 debug_printf("i915_program_error: ");
127 va_start( args
, msg
);
128 util_vsnprintf( buffer
, sizeof(buffer
), msg
, args
);
130 debug_printf("%s", buffer
);
136 static uint
get_mapping(struct i915_fragment_shader
* fs
, int unit
)
139 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
141 if (fs
->generic_mapping
[i
] == -1) {
142 fs
->generic_mapping
[i
] = unit
;
145 if (fs
->generic_mapping
[i
] == unit
)
148 debug_printf("Exceeded max generics\n");
153 * Construct a ureg for the given source register. Will emit
154 * constants, apply swizzling and negation as needed.
157 src_vector(struct i915_fp_compile
*p
,
158 const struct tgsi_full_src_register
*source
,
159 struct i915_fragment_shader
* fs
)
161 uint index
= source
->Register
.Index
;
162 uint src
= 0, sem_name
, sem_ind
;
164 switch (source
->Register
.File
) {
165 case TGSI_FILE_TEMPORARY
:
166 if (source
->Register
.Index
>= I915_MAX_TEMPORARY
) {
167 i915_program_error(p
, "Exceeded max temporary reg");
170 src
= UREG(REG_TYPE_R
, index
);
172 case TGSI_FILE_INPUT
:
173 /* XXX: Packing COL1, FOGC into a single attribute works for
174 * texenv programs, but will fail for real fragment programs
175 * that use these attributes and expect them to be a full 4
176 * components wide. Could use a texcoord to pass these
177 * attributes if necessary, but that won't work in the general
180 * We also use a texture coordinate to pass wpos when possible.
183 sem_name
= p
->shader
->info
.input_semantic_name
[index
];
184 sem_ind
= p
->shader
->info
.input_semantic_index
[index
];
187 case TGSI_SEMANTIC_POSITION
:
188 debug_printf("SKIP SEM POS\n");
190 assert(p->wpos_tex != -1);
191 src = i915_emit_decl(p, REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL);
194 case TGSI_SEMANTIC_COLOR
:
196 src
= i915_emit_decl(p
, REG_TYPE_T
, T_DIFFUSE
, D0_CHANNEL_ALL
);
199 /* secondary color */
200 assert(sem_ind
== 1);
201 src
= i915_emit_decl(p
, REG_TYPE_T
, T_SPECULAR
, D0_CHANNEL_XYZ
);
202 src
= swizzle(src
, X
, Y
, Z
, ONE
);
205 case TGSI_SEMANTIC_FOG
:
206 src
= i915_emit_decl(p
, REG_TYPE_T
, T_FOG_W
, D0_CHANNEL_W
);
207 src
= swizzle(src
, W
, W
, W
, W
);
209 case TGSI_SEMANTIC_GENERIC
:
211 int real_tex_unit
= get_mapping(fs
, sem_ind
);
212 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_ALL
);
216 i915_program_error(p
, "Bad source->Index");
221 case TGSI_FILE_IMMEDIATE
:
222 assert(index
< p
->num_immediates
);
223 index
= p
->immediates_map
[index
];
225 case TGSI_FILE_CONSTANT
:
226 src
= UREG(REG_TYPE_CONST
, index
);
230 i915_program_error(p
, "Bad source->File");
235 source
->Register
.SwizzleX
,
236 source
->Register
.SwizzleY
,
237 source
->Register
.SwizzleZ
,
238 source
->Register
.SwizzleW
);
241 /* There's both negate-all-components and per-component negation.
242 * Try to handle both here.
245 int n
= source
->Register
.Negate
;
246 src
= negate(src
, n
, n
, n
, n
);
251 /* XXX assertions disabled to allow arbfplight.c to run */
252 /* XXX enable these assertions, or fix things */
253 assert(!source
->Register
.Absolute
);
260 * Construct a ureg for a destination register.
263 get_result_vector(struct i915_fp_compile
*p
,
264 const struct tgsi_full_dst_register
*dest
)
266 switch (dest
->Register
.File
) {
267 case TGSI_FILE_OUTPUT
:
269 uint sem_name
= p
->shader
->info
.output_semantic_name
[dest
->Register
.Index
];
271 case TGSI_SEMANTIC_POSITION
:
272 return UREG(REG_TYPE_OD
, 0);
273 case TGSI_SEMANTIC_COLOR
:
274 return UREG(REG_TYPE_OC
, 0);
276 i915_program_error(p
, "Bad inst->DstReg.Index/semantics");
280 case TGSI_FILE_TEMPORARY
:
281 return UREG(REG_TYPE_R
, dest
->Register
.Index
);
283 i915_program_error(p
, "Bad inst->DstReg.File");
290 * Compute flags for saturation and writemask.
293 get_result_flags(const struct tgsi_full_instruction
*inst
)
296 = inst
->Dst
[0].Register
.WriteMask
;
299 if (inst
->Instruction
.Saturate
== TGSI_SAT_ZERO_ONE
)
300 flags
|= A0_DEST_SATURATE
;
302 if (writeMask
& TGSI_WRITEMASK_X
)
303 flags
|= A0_DEST_CHANNEL_X
;
304 if (writeMask
& TGSI_WRITEMASK_Y
)
305 flags
|= A0_DEST_CHANNEL_Y
;
306 if (writeMask
& TGSI_WRITEMASK_Z
)
307 flags
|= A0_DEST_CHANNEL_Z
;
308 if (writeMask
& TGSI_WRITEMASK_W
)
309 flags
|= A0_DEST_CHANNEL_W
;
316 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
319 translate_tex_src_target(struct i915_fp_compile
*p
, uint tex
)
322 case TGSI_TEXTURE_SHADOW1D
:
324 case TGSI_TEXTURE_1D
:
325 return D0_SAMPLE_TYPE_2D
;
327 case TGSI_TEXTURE_SHADOW2D
:
329 case TGSI_TEXTURE_2D
:
330 return D0_SAMPLE_TYPE_2D
;
332 case TGSI_TEXTURE_SHADOWRECT
:
334 case TGSI_TEXTURE_RECT
:
335 return D0_SAMPLE_TYPE_2D
;
337 case TGSI_TEXTURE_3D
:
338 return D0_SAMPLE_TYPE_VOLUME
;
340 case TGSI_TEXTURE_CUBE
:
341 return D0_SAMPLE_TYPE_CUBE
;
344 i915_program_error(p
, "TexSrc type");
351 * Generate texel lookup instruction.
354 emit_tex(struct i915_fp_compile
*p
,
355 const struct tgsi_full_instruction
*inst
,
357 struct i915_fragment_shader
* fs
)
359 uint texture
= inst
->Texture
.Texture
;
360 uint unit
= inst
->Src
[1].Register
.Index
;
361 uint tex
= translate_tex_src_target( p
, texture
);
362 uint sampler
= i915_emit_decl(p
, REG_TYPE_S
, unit
, tex
);
363 uint coord
= src_vector( p
, &inst
->Src
[0], fs
);
366 get_result_vector( p
, &inst
->Dst
[0] ),
367 get_result_flags( inst
),
375 * Generate a simple arithmetic instruction
376 * \param opcode the i915 opcode
377 * \param numArgs the number of input/src arguments
380 emit_simple_arith(struct i915_fp_compile
*p
,
381 const struct tgsi_full_instruction
*inst
,
382 uint opcode
, uint numArgs
,
383 struct i915_fragment_shader
* fs
)
385 uint arg1
, arg2
, arg3
;
387 assert(numArgs
<= 3);
389 arg1
= (numArgs
< 1) ? 0 : src_vector( p
, &inst
->Src
[0], fs
);
390 arg2
= (numArgs
< 2) ? 0 : src_vector( p
, &inst
->Src
[1], fs
);
391 arg3
= (numArgs
< 3) ? 0 : src_vector( p
, &inst
->Src
[2], fs
);
395 get_result_vector( p
, &inst
->Dst
[0]),
396 get_result_flags( inst
), 0,
403 /** As above, but swap the first two src regs */
405 emit_simple_arith_swap2(struct i915_fp_compile
*p
,
406 const struct tgsi_full_instruction
*inst
,
407 uint opcode
, uint numArgs
,
408 struct i915_fragment_shader
* fs
)
410 struct tgsi_full_instruction inst2
;
412 assert(numArgs
== 2);
414 /* transpose first two registers */
416 inst2
.Src
[0] = inst
->Src
[1];
417 inst2
.Src
[1] = inst
->Src
[0];
419 emit_simple_arith(p
, &inst2
, opcode
, numArgs
, fs
);
424 #define M_PI 3.14159265358979323846
428 * Translate TGSI instruction to i915 instruction.
432 * SIN, COS -- could use another taylor step?
433 * LIT -- results seem a little different to sw mesa
434 * LOG -- different to mesa on negative numbers, but this is conformant.
437 i915_translate_instruction(struct i915_fp_compile
*p
,
438 const struct tgsi_full_instruction
*inst
,
439 struct i915_fragment_shader
*fs
)
442 uint src0
, src1
, src2
, flags
;
445 switch (inst
->Instruction
.Opcode
) {
446 case TGSI_OPCODE_ABS
:
447 src0
= src_vector(p
, &inst
->Src
[0], fs
);
450 get_result_vector(p
, &inst
->Dst
[0]),
451 get_result_flags(inst
), 0,
452 src0
, negate(src0
, 1, 1, 1, 1), 0);
455 case TGSI_OPCODE_ADD
:
456 emit_simple_arith(p
, inst
, A0_ADD
, 2, fs
);
459 case TGSI_OPCODE_CMP
:
460 src0
= src_vector(p
, &inst
->Src
[0], fs
);
461 src1
= src_vector(p
, &inst
->Src
[1], fs
);
462 src2
= src_vector(p
, &inst
->Src
[2], fs
);
463 i915_emit_arith(p
, A0_CMP
,
464 get_result_vector(p
, &inst
->Dst
[0]),
465 get_result_flags(inst
),
466 0, src0
, src2
, src1
); /* NOTE: order of src2, src1 */
469 case TGSI_OPCODE_COS
:
470 src0
= src_vector(p
, &inst
->Src
[0], fs
);
471 tmp
= i915_get_utemp(p
);
475 tmp
, A0_DEST_CHANNEL_X
, 0,
476 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
478 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
480 /* By choosing different taylor constants, could get rid of this mul:
484 tmp
, A0_DEST_CHANNEL_X
, 0,
485 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
488 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
489 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
490 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
491 * result = DP4 t0, cos_constants
495 tmp
, A0_DEST_CHANNEL_XY
, 0,
496 swizzle(tmp
, X
, X
, ONE
, ONE
),
497 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
501 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
502 swizzle(tmp
, X
, Y
, X
, ONE
),
503 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
507 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
508 swizzle(tmp
, X
, X
, Z
, ONE
),
509 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
513 get_result_vector(p
, &inst
->Dst
[0]),
514 get_result_flags(inst
), 0,
515 swizzle(tmp
, ONE
, Z
, Y
, X
),
516 i915_emit_const4fv(p
, cos_constants
), 0);
519 case TGSI_OPCODE_DP2
:
520 src0
= src_vector(p
, &inst
->Src
[0], fs
);
521 src1
= src_vector(p
, &inst
->Src
[1], fs
);
525 get_result_vector(p
, &inst
->Dst
[0]),
526 get_result_flags(inst
), 0,
527 swizzle(src0
, X
, Y
, ZERO
, ZERO
), src1
, 0);
530 case TGSI_OPCODE_DP3
:
531 emit_simple_arith(p
, inst
, A0_DP3
, 2, fs
);
534 case TGSI_OPCODE_DP4
:
535 emit_simple_arith(p
, inst
, A0_DP4
, 2, fs
);
538 case TGSI_OPCODE_DPH
:
539 src0
= src_vector(p
, &inst
->Src
[0], fs
);
540 src1
= src_vector(p
, &inst
->Src
[1], fs
);
544 get_result_vector(p
, &inst
->Dst
[0]),
545 get_result_flags(inst
), 0,
546 swizzle(src0
, X
, Y
, Z
, ONE
), src1
, 0);
549 case TGSI_OPCODE_DST
:
550 src0
= src_vector(p
, &inst
->Src
[0], fs
);
551 src1
= src_vector(p
, &inst
->Src
[1], fs
);
553 /* result[0] = 1 * 1;
554 * result[1] = a[1] * b[1];
555 * result[2] = a[2] * 1;
556 * result[3] = 1 * b[3];
560 get_result_vector(p
, &inst
->Dst
[0]),
561 get_result_flags(inst
), 0,
562 swizzle(src0
, ONE
, Y
, Z
, ONE
),
563 swizzle(src1
, ONE
, Y
, ONE
, W
), 0);
566 case TGSI_OPCODE_END
:
570 case TGSI_OPCODE_EX2
:
571 src0
= src_vector(p
, &inst
->Src
[0], fs
);
575 get_result_vector(p
, &inst
->Dst
[0]),
576 get_result_flags(inst
), 0,
577 swizzle(src0
, X
, X
, X
, X
), 0, 0);
580 case TGSI_OPCODE_FLR
:
581 emit_simple_arith(p
, inst
, A0_FLR
, 1, fs
);
584 case TGSI_OPCODE_FRC
:
585 emit_simple_arith(p
, inst
, A0_FRC
, 1, fs
);
588 case TGSI_OPCODE_KIL
:
589 /* kill if src[0].x < 0 || src[0].y < 0 ... */
590 src0
= src_vector(p
, &inst
->Src
[0], fs
);
591 tmp
= i915_get_utemp(p
);
594 tmp
, /* dest reg: a dummy reg */
595 A0_DEST_CHANNEL_ALL
, /* dest writemask */
598 T0_TEXKILL
); /* opcode */
601 case TGSI_OPCODE_KILP
:
602 assert(0); /* not tested yet */
605 case TGSI_OPCODE_LG2
:
606 src0
= src_vector(p
, &inst
->Src
[0], fs
);
610 get_result_vector(p
, &inst
->Dst
[0]),
611 get_result_flags(inst
), 0,
612 swizzle(src0
, X
, X
, X
, X
), 0, 0);
615 case TGSI_OPCODE_LIT
:
616 src0
= src_vector(p
, &inst
->Src
[0], fs
);
617 tmp
= i915_get_utemp(p
);
619 /* tmp = max( a.xyzw, a.00zw )
620 * XXX: Clamp tmp.w to -128..128
622 * tmp.y = tmp.w * tmp.y
624 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
626 i915_emit_arith(p
, A0_MAX
, tmp
, A0_DEST_CHANNEL_ALL
, 0,
627 src0
, swizzle(src0
, ZERO
, ZERO
, Z
, W
), 0);
629 i915_emit_arith(p
, A0_LOG
, tmp
, A0_DEST_CHANNEL_Y
, 0,
630 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
632 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_Y
, 0,
633 swizzle(tmp
, ZERO
, Y
, ZERO
, ZERO
),
634 swizzle(tmp
, ZERO
, W
, ZERO
, ZERO
), 0);
636 i915_emit_arith(p
, A0_EXP
, tmp
, A0_DEST_CHANNEL_Y
, 0,
637 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
639 i915_emit_arith(p
, A0_CMP
,
640 get_result_vector(p
, &inst
->Dst
[0]),
641 get_result_flags(inst
), 0,
642 negate(swizzle(tmp
, ONE
, ONE
, X
, ONE
), 0, 0, 1, 0),
643 swizzle(tmp
, ONE
, X
, ZERO
, ONE
),
644 swizzle(tmp
, ONE
, X
, Y
, ONE
));
648 case TGSI_OPCODE_LRP
:
649 src0
= src_vector(p
, &inst
->Src
[0], fs
);
650 src1
= src_vector(p
, &inst
->Src
[1], fs
);
651 src2
= src_vector(p
, &inst
->Src
[2], fs
);
652 flags
= get_result_flags(inst
);
653 tmp
= i915_get_utemp(p
);
660 * result = (-c)*a + tmp
662 i915_emit_arith(p
, A0_MAD
, tmp
,
663 flags
& A0_DEST_CHANNEL_ALL
, 0, src1
, src0
, src2
);
665 i915_emit_arith(p
, A0_MAD
,
666 get_result_vector(p
, &inst
->Dst
[0]),
667 flags
, 0, negate(src2
, 1, 1, 1, 1), src0
, tmp
);
670 case TGSI_OPCODE_MAD
:
671 emit_simple_arith(p
, inst
, A0_MAD
, 3, fs
);
674 case TGSI_OPCODE_MAX
:
675 emit_simple_arith(p
, inst
, A0_MAX
, 2, fs
);
678 case TGSI_OPCODE_MIN
:
679 src0
= src_vector(p
, &inst
->Src
[0], fs
);
680 src1
= src_vector(p
, &inst
->Src
[1], fs
);
681 tmp
= i915_get_utemp(p
);
682 flags
= get_result_flags(inst
);
686 tmp
, flags
& A0_DEST_CHANNEL_ALL
, 0,
687 negate(src0
, 1, 1, 1, 1),
688 negate(src1
, 1, 1, 1, 1), 0);
692 get_result_vector(p
, &inst
->Dst
[0]),
693 flags
, 0, negate(tmp
, 1, 1, 1, 1), 0, 0);
696 case TGSI_OPCODE_MOV
:
697 emit_simple_arith(p
, inst
, A0_MOV
, 1, fs
);
700 case TGSI_OPCODE_MUL
:
701 emit_simple_arith(p
, inst
, A0_MUL
, 2, fs
);
704 case TGSI_OPCODE_POW
:
705 src0
= src_vector(p
, &inst
->Src
[0], fs
);
706 src1
= src_vector(p
, &inst
->Src
[1], fs
);
707 tmp
= i915_get_utemp(p
);
708 flags
= get_result_flags(inst
);
710 /* XXX: masking on intermediate values, here and elsewhere.
714 tmp
, A0_DEST_CHANNEL_X
, 0,
715 swizzle(src0
, X
, X
, X
, X
), 0, 0);
717 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, src1
, 0);
721 get_result_vector(p
, &inst
->Dst
[0]),
722 flags
, 0, swizzle(tmp
, X
, X
, X
, X
), 0, 0);
725 case TGSI_OPCODE_RET
:
729 case TGSI_OPCODE_RCP
:
730 src0
= src_vector(p
, &inst
->Src
[0], fs
);
734 get_result_vector(p
, &inst
->Dst
[0]),
735 get_result_flags(inst
), 0,
736 swizzle(src0
, X
, X
, X
, X
), 0, 0);
739 case TGSI_OPCODE_RSQ
:
740 src0
= src_vector(p
, &inst
->Src
[0], fs
);
744 get_result_vector(p
, &inst
->Dst
[0]),
745 get_result_flags(inst
), 0,
746 swizzle(src0
, X
, X
, X
, X
), 0, 0);
749 case TGSI_OPCODE_SCS
:
750 src0
= src_vector(p
, &inst
->Src
[0], fs
);
751 tmp
= i915_get_utemp(p
);
754 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
755 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
756 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
757 * scs.x = DP4 t1, sin_constants
758 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
759 * scs.y = DP4 t1, cos_constants
763 tmp
, A0_DEST_CHANNEL_XY
, 0,
764 swizzle(src0
, X
, X
, ONE
, ONE
),
765 swizzle(src0
, X
, ONE
, ONE
, ONE
), 0);
769 tmp
, A0_DEST_CHANNEL_ALL
, 0,
770 swizzle(tmp
, X
, Y
, X
, Y
),
771 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
773 writemask
= inst
->Dst
[0].Register
.WriteMask
;
775 if (writemask
& TGSI_WRITEMASK_Y
) {
778 if (writemask
& TGSI_WRITEMASK_X
)
779 tmp1
= i915_get_utemp(p
);
785 tmp1
, A0_DEST_CHANNEL_ALL
, 0,
786 swizzle(tmp
, X
, Y
, Y
, W
),
787 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
791 get_result_vector(p
, &inst
->Dst
[0]),
792 A0_DEST_CHANNEL_Y
, 0,
793 swizzle(tmp1
, W
, Z
, Y
, X
),
794 i915_emit_const4fv(p
, sin_constants
), 0);
797 if (writemask
& TGSI_WRITEMASK_X
) {
800 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
801 swizzle(tmp
, X
, X
, Z
, ONE
),
802 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
806 get_result_vector(p
, &inst
->Dst
[0]),
807 A0_DEST_CHANNEL_X
, 0,
808 swizzle(tmp
, ONE
, Z
, Y
, X
),
809 i915_emit_const4fv(p
, cos_constants
), 0);
813 case TGSI_OPCODE_SEQ
:
814 /* if we're both >= and <= then we're == */
815 src0
= src_vector(p
, &inst
->Src
[0], fs
);
816 src1
= src_vector(p
, &inst
->Src
[1], fs
);
817 tmp
= i915_get_utemp(p
);
821 tmp
, A0_DEST_CHANNEL_ALL
, 0,
827 get_result_vector(p
, &inst
->Dst
[0]),
828 A0_DEST_CHANNEL_ALL
, 0,
834 get_result_vector(p
, &inst
->Dst
[0]),
835 A0_DEST_CHANNEL_ALL
, 0,
836 get_result_vector(p
, &inst
->Dst
[0]),
841 case TGSI_OPCODE_SGE
:
842 emit_simple_arith(p
, inst
, A0_SGE
, 2, fs
);
845 case TGSI_OPCODE_SIN
:
846 src0
= src_vector(p
, &inst
->Src
[0], fs
);
847 tmp
= i915_get_utemp(p
);
851 tmp
, A0_DEST_CHANNEL_X
, 0,
852 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
854 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
856 /* By choosing different taylor constants, could get rid of this mul:
860 tmp
, A0_DEST_CHANNEL_X
, 0,
861 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
864 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
865 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
866 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
867 * result = DP4 t1.wzyx, sin_constants
871 tmp
, A0_DEST_CHANNEL_XY
, 0,
872 swizzle(tmp
, X
, X
, ONE
, ONE
),
873 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
877 tmp
, A0_DEST_CHANNEL_ALL
, 0,
878 swizzle(tmp
, X
, Y
, X
, Y
),
879 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
883 tmp
, A0_DEST_CHANNEL_ALL
, 0,
884 swizzle(tmp
, X
, Y
, Y
, W
),
885 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
889 get_result_vector(p
, &inst
->Dst
[0]),
890 get_result_flags(inst
), 0,
891 swizzle(tmp
, W
, Z
, Y
, X
),
892 i915_emit_const4fv(p
, sin_constants
), 0);
895 case TGSI_OPCODE_SLE
:
896 /* like SGE, but swap reg0, reg1 */
897 emit_simple_arith_swap2(p
, inst
, A0_SGE
, 2, fs
);
900 case TGSI_OPCODE_SLT
:
901 emit_simple_arith(p
, inst
, A0_SLT
, 2, fs
);
904 case TGSI_OPCODE_SGT
:
905 /* like SLT, but swap reg0, reg1 */
906 emit_simple_arith_swap2(p
, inst
, A0_SLT
, 2, fs
);
909 case TGSI_OPCODE_SNE
:
910 /* if we're < or > then we're != */
911 src0
= src_vector(p
, &inst
->Src
[0], fs
);
912 src1
= src_vector(p
, &inst
->Src
[1], fs
);
913 tmp
= i915_get_utemp(p
);
918 A0_DEST_CHANNEL_ALL
, 0,
924 get_result_vector(p
, &inst
->Dst
[0]),
925 A0_DEST_CHANNEL_ALL
, 0,
931 get_result_vector(p
, &inst
->Dst
[0]),
932 A0_DEST_CHANNEL_ALL
, 0,
933 get_result_vector(p
, &inst
->Dst
[0]),
937 case TGSI_OPCODE_SSG
:
938 /* compute (src>0) - (src<0) */
939 src0
= src_vector(p
, &inst
->Src
[0], fs
);
940 tmp
= i915_get_utemp(p
);
945 A0_DEST_CHANNEL_ALL
, 0,
947 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
), 0);
951 get_result_vector(p
, &inst
->Dst
[0]),
952 A0_DEST_CHANNEL_ALL
, 0,
953 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
),
958 get_result_vector(p
, &inst
->Dst
[0]),
959 A0_DEST_CHANNEL_ALL
, 0,
960 get_result_vector(p
, &inst
->Dst
[0]),
961 negate(tmp
, 1, 1, 1, 1), 0);
964 case TGSI_OPCODE_SUB
:
965 src0
= src_vector(p
, &inst
->Src
[0], fs
);
966 src1
= src_vector(p
, &inst
->Src
[1], fs
);
970 get_result_vector(p
, &inst
->Dst
[0]),
971 get_result_flags(inst
), 0,
972 src0
, negate(src1
, 1, 1, 1, 1), 0);
975 case TGSI_OPCODE_TEX
:
976 emit_tex(p
, inst
, T0_TEXLD
, fs
);
979 case TGSI_OPCODE_TRUNC
:
980 emit_simple_arith(p
, inst
, A0_TRC
, 1, fs
);
983 case TGSI_OPCODE_TXB
:
984 emit_tex(p
, inst
, T0_TEXLDB
, fs
);
987 case TGSI_OPCODE_TXP
:
988 emit_tex(p
, inst
, T0_TEXLDP
, fs
);
991 case TGSI_OPCODE_XPD
:
993 * result.x = src0.y * src1.z - src0.z * src1.y;
994 * result.y = src0.z * src1.x - src0.x * src1.z;
995 * result.z = src0.x * src1.y - src0.y * src1.x;
998 src0
= src_vector(p
, &inst
->Src
[0], fs
);
999 src1
= src_vector(p
, &inst
->Src
[1], fs
);
1000 tmp
= i915_get_utemp(p
);
1004 tmp
, A0_DEST_CHANNEL_ALL
, 0,
1005 swizzle(src0
, Z
, X
, Y
, ONE
),
1006 swizzle(src1
, Y
, Z
, X
, ONE
), 0);
1010 get_result_vector(p
, &inst
->Dst
[0]),
1011 get_result_flags(inst
), 0,
1012 swizzle(src0
, Y
, Z
, X
, ONE
),
1013 swizzle(src1
, Z
, X
, Y
, ONE
),
1014 negate(tmp
, 1, 1, 1, 0));
1018 i915_program_error(p
, "bad opcode %d", inst
->Instruction
.Opcode
);
1023 i915_release_utemps(p
);
1028 * Translate TGSI fragment shader into i915 hardware instructions.
1029 * \param p the translation state
1030 * \param tokens the TGSI token array
1033 i915_translate_instructions(struct i915_fp_compile
*p
,
1034 const struct tgsi_token
*tokens
,
1035 struct i915_fragment_shader
*fs
)
1037 struct i915_fragment_shader
*ifs
= p
->shader
;
1038 struct tgsi_parse_context parse
;
1040 tgsi_parse_init( &parse
, tokens
);
1042 while( !tgsi_parse_end_of_tokens( &parse
) ) {
1044 tgsi_parse_token( &parse
);
1046 switch( parse
.FullToken
.Token
.Type
) {
1047 case TGSI_TOKEN_TYPE_PROPERTY
:
1049 * We only support one cbuf, but we still need to ignore the property
1050 * correctly so we don't hit the assert at the end of the switch case.
1052 assert(parse
.FullToken
.FullProperty
.Property
.PropertyName
==
1053 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
);
1055 case TGSI_TOKEN_TYPE_DECLARATION
:
1056 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
1057 == TGSI_FILE_CONSTANT
) {
1059 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
1060 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
1062 assert(ifs
->constant_flags
[i
] == 0x0);
1063 ifs
->constant_flags
[i
] = I915_CONSTFLAG_USER
;
1064 ifs
->num_constants
= MAX2(ifs
->num_constants
, i
+ 1);
1067 else if (parse
.FullToken
.FullDeclaration
.Declaration
.File
1068 == TGSI_FILE_TEMPORARY
) {
1070 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
1071 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
1073 assert(i
< I915_MAX_TEMPORARY
);
1074 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
1075 p
->temp_flag
|= (1 << i
); /* mark temp as used */
1080 case TGSI_TOKEN_TYPE_IMMEDIATE
:
1082 const struct tgsi_full_immediate
*imm
1083 = &parse
.FullToken
.FullImmediate
;
1084 const uint pos
= p
->num_immediates
++;
1086 assert( imm
->Immediate
.NrTokens
<= 4 + 1 );
1087 for (j
= 0; j
< imm
->Immediate
.NrTokens
- 1; j
++) {
1088 p
->immediates
[pos
][j
] = imm
->u
[j
].Float
;
1093 case TGSI_TOKEN_TYPE_INSTRUCTION
:
1094 if (p
->first_instruction
) {
1095 /* resolve location of immediates */
1097 for (i
= 0; i
< p
->num_immediates
; i
++) {
1098 /* find constant slot for this immediate */
1099 for (j
= 0; j
< I915_MAX_CONSTANT
; j
++) {
1100 if (ifs
->constant_flags
[j
] == 0x0) {
1101 memcpy(ifs
->constants
[j
],
1104 /*printf("immediate %d maps to const %d\n", i, j);*/
1105 ifs
->constant_flags
[j
] = 0xf; /* all four comps used */
1106 p
->immediates_map
[i
] = j
;
1107 ifs
->num_constants
= MAX2(ifs
->num_constants
, j
+ 1);
1113 p
->first_instruction
= FALSE
;
1116 i915_translate_instruction(p
, &parse
.FullToken
.FullInstruction
, fs
);
1125 tgsi_parse_free (&parse
);
1129 static struct i915_fp_compile
*
1130 i915_init_compile(struct i915_context
*i915
,
1131 struct i915_fragment_shader
*ifs
)
1133 struct i915_fp_compile
*p
= CALLOC_STRUCT(i915_fp_compile
);
1138 /* Put new constants at end of const buffer, growing downward.
1139 * The problem is we don't know how many user-defined constants might
1140 * be specified with pipe->set_constant_buffer().
1141 * Should pre-scan the user's program to determine the highest-numbered
1142 * constant referenced.
1144 ifs
->num_constants
= 0;
1145 memset(ifs
->constant_flags
, 0, sizeof(ifs
->constant_flags
));
1147 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
1148 ifs
->generic_mapping
[i
] = -1;
1150 p
->first_instruction
= TRUE
;
1152 p
->nr_tex_indirect
= 1; /* correct? */
1155 p
->nr_decl_insn
= 0;
1157 p
->csr
= p
->program
;
1158 p
->decl
= p
->declarations
;
1161 p
->temp_flag
= ~0x0 << I915_MAX_TEMPORARY
;
1162 p
->utemp_flag
= ~0x7;
1166 /* initialize the first program word */
1167 *(p
->decl
++) = _3DSTATE_PIXEL_SHADER_PROGRAM
;
1173 /* Copy compile results to the fragment program struct and destroy the
1174 * compilation context.
1177 i915_fini_compile(struct i915_context
*i915
, struct i915_fp_compile
*p
)
1179 struct i915_fragment_shader
*ifs
= p
->shader
;
1180 unsigned long program_size
= (unsigned long) (p
->csr
- p
->program
);
1181 unsigned long decl_size
= (unsigned long) (p
->decl
- p
->declarations
);
1183 if (p
->nr_tex_indirect
> I915_MAX_TEX_INDIRECT
)
1184 i915_program_error(p
, "Exceeded max nr indirect texture lookups");
1186 if (p
->nr_tex_insn
> I915_MAX_TEX_INSN
)
1187 i915_program_error(p
, "Exceeded max TEX instructions");
1189 if (p
->nr_alu_insn
> I915_MAX_ALU_INSN
)
1190 i915_program_error(p
, "Exceeded max ALU instructions");
1192 if (p
->nr_decl_insn
> I915_MAX_DECL_INSN
)
1193 i915_program_error(p
, "Exceeded max DECL instructions");
1196 p
->NumNativeInstructions
= 0;
1197 p
->NumNativeAluInstructions
= 0;
1198 p
->NumNativeTexInstructions
= 0;
1199 p
->NumNativeTexIndirections
= 0;
1201 i915_use_passthrough_shader(ifs
);
1204 p
->NumNativeInstructions
1205 = p
->nr_alu_insn
+ p
->nr_tex_insn
+ p
->nr_decl_insn
;
1206 p
->NumNativeAluInstructions
= p
->nr_alu_insn
;
1207 p
->NumNativeTexInstructions
= p
->nr_tex_insn
;
1208 p
->NumNativeTexIndirections
= p
->nr_tex_indirect
;
1210 /* patch in the program length */
1211 p
->declarations
[0] |= program_size
+ decl_size
- 2;
1213 /* Copy compilation results to fragment program struct:
1215 assert(!ifs
->program
);
1217 = (uint
*) MALLOC((program_size
+ decl_size
) * sizeof(uint
));
1219 ifs
->program_len
= program_size
+ decl_size
;
1221 memcpy(ifs
->program
,
1223 decl_size
* sizeof(uint
));
1225 memcpy(ifs
->program
+ decl_size
,
1227 program_size
* sizeof(uint
));
1231 /* Release the compilation struct:
1238 * Find an unused texture coordinate slot to use for fragment WPOS.
1239 * Update p->fp->wpos_tex with the result (-1 if no used texcoord slot is found).
1242 i915_find_wpos_space(struct i915_fp_compile
*p
)
1246 = p
->shader
->inputs_read
| (1 << TGSI_ATTRIB_POS
); /*XXX hack*/
1251 if (inputs
& (1 << TGSI_ATTRIB_POS
)) {
1252 for (i
= 0; i
< I915_TEX_UNITS
; i
++) {
1253 if ((inputs
& (1 << (TGSI_ATTRIB_TEX0
+ i
))) == 0) {
1259 i915_program_error(p
, "No free texcoord for wpos value");
1262 if (p
->shader
->info
.input_semantic_name
[0] == TGSI_SEMANTIC_POSITION
) {
1263 /* frag shader using the fragment position input */
1275 * Rather than trying to intercept and jiggle depth writes during
1276 * emit, just move the value into its correct position at the end of
1280 i915_fixup_depth_write(struct i915_fp_compile
*p
)
1282 /* XXX assuming pos/depth is always in output[0] */
1283 if (p
->shader
->info
.output_semantic_name
[0] == TGSI_SEMANTIC_POSITION
) {
1284 const uint depth
= UREG(REG_TYPE_OD
, 0);
1287 A0_MOV
, /* opcode */
1288 depth
, /* dest reg */
1289 A0_DEST_CHANNEL_W
, /* write mask */
1291 swizzle(depth
, X
, Y
, Z
, Z
), /* src0 */
1292 0, 0 /* src1, src2 */);
1298 i915_translate_fragment_program( struct i915_context
*i915
,
1299 struct i915_fragment_shader
*fs
)
1301 struct i915_fp_compile
*p
;
1302 const struct tgsi_token
*tokens
= fs
->state
.tokens
;
1305 tgsi_dump(tokens
, 0);
1308 /* hw doesn't seem to like empty frag programs, even when the depth write
1309 * fixup gets emitted below - may that one is fishy, too? */
1310 if (fs
->info
.num_instructions
== 1) {
1311 i915_use_passthrough_shader(fs
);
1316 p
= i915_init_compile(i915
, fs
);
1317 i915_find_wpos_space(p
);
1319 i915_translate_instructions(p
, tokens
, fs
);
1320 i915_fixup_depth_write(p
);
1322 i915_fini_compile(i915
, p
);