Check for SYS/GL during library init. Reason is that
[AROS.git] / workbench / libs / mesa / src / gallium / drivers / nv50 / nv50_screen.h
blob64ad209a728a3053c8a60d67f33d523ef75df40a
1 #ifndef __NV50_SCREEN_H__
2 #define __NV50_SCREEN_H__
4 #define NOUVEAU_NVC0
5 #include "nouveau/nouveau_screen.h"
6 #include "nouveau/nouveau_fence.h"
7 #include "nouveau/nouveau_mm.h"
8 #undef NOUVEAU_NVC0
9 #include "nv50_winsys.h"
10 #include "nv50_stateobj.h"
12 #define NV50_TIC_MAX_ENTRIES 2048
13 #define NV50_TSC_MAX_ENTRIES 2048
15 struct nv50_context;
17 #define NV50_CODE_BO_SIZE_LOG2 19
19 #define NV50_SCRATCH_SIZE (2 << 20)
20 #define NV50_SCRATCH_NR_BUFFERS 2
22 #define NV50_SCREEN_RESIDENT_BO_COUNT 5
24 struct nv50_screen {
25 struct nouveau_screen base;
26 struct nouveau_winsys *nvws;
28 struct nv50_context *cur_ctx;
30 struct nouveau_bo *code;
31 struct nouveau_bo *uniforms;
32 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
33 struct nouveau_bo *stack_bo;
34 struct nouveau_bo *tls_bo;
36 uint64_t tls_size;
38 struct nouveau_resource *vp_code_heap;
39 struct nouveau_resource *gp_code_heap;
40 struct nouveau_resource *fp_code_heap;
42 struct {
43 void **entries;
44 int next;
45 uint32_t lock[NV50_TIC_MAX_ENTRIES / 32];
46 } tic;
48 struct {
49 void **entries;
50 int next;
51 uint32_t lock[NV50_TSC_MAX_ENTRIES / 32];
52 } tsc;
54 struct {
55 uint32_t *map;
56 struct nouveau_bo *bo;
57 } fence;
59 struct nouveau_notifier *sync;
61 struct nouveau_mman *mm_VRAM_fe0;
63 struct nouveau_grobj *tesla;
64 struct nouveau_grobj *eng2d;
65 struct nouveau_grobj *m2mf;
68 static INLINE struct nv50_screen *
69 nv50_screen(struct pipe_screen *screen)
71 return (struct nv50_screen *)screen;
74 void nv50_screen_make_buffers_resident(struct nv50_screen *);
76 int nv50_screen_tic_alloc(struct nv50_screen *, void *);
77 int nv50_screen_tsc_alloc(struct nv50_screen *, void *);
79 static INLINE void
80 nv50_resource_fence(struct nv04_resource *res, uint32_t flags)
82 struct nv50_screen *screen = nv50_screen(res->base.screen);
84 if (res->mm) {
85 nouveau_fence_ref(screen->base.fence.current, &res->fence);
87 if (flags & NOUVEAU_BO_WR)
88 nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
92 static INLINE void
93 nv50_resource_validate(struct nv04_resource *res, uint32_t flags)
95 struct nv50_screen *screen = nv50_screen(res->base.screen);
97 if (likely(res->bo)) {
98 nouveau_bo_validate(screen->base.channel, res->bo, flags);
100 if (flags & NOUVEAU_BO_WR)
101 res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
102 if (flags & NOUVEAU_BO_RD)
103 res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
105 nv50_resource_fence(res, flags);
109 struct nv50_format {
110 uint32_t rt;
111 uint32_t tic;
112 uint32_t vtx;
113 uint32_t usage;
116 extern const struct nv50_format nv50_format_table[];
118 static INLINE void
119 nv50_screen_tic_unlock(struct nv50_screen *screen, struct nv50_tic_entry *tic)
121 if (tic->id >= 0)
122 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
125 static INLINE void
126 nv50_screen_tsc_unlock(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
128 if (tsc->id >= 0)
129 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
132 static INLINE void
133 nv50_screen_tic_free(struct nv50_screen *screen, struct nv50_tic_entry *tic)
135 if (tic->id >= 0) {
136 screen->tic.entries[tic->id] = NULL;
137 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
141 static INLINE void
142 nv50_screen_tsc_free(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
144 if (tsc->id >= 0) {
145 screen->tsc.entries[tsc->id] = NULL;
146 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
150 #endif